| /prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 177 ISD::ArgFlagsTy ArgFlags, CCState &State);
184 ISD::ArgFlagsTy &ArgFlags, CCState &State);
458 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
|
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 177 ISD::ArgFlagsTy ArgFlags, CCState &State);
184 ISD::ArgFlagsTy &ArgFlags, CCState &State);
458 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMFastISel.cpp | 195 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 297 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags;
304 if (ArgFlags.isSExt())
306 else if (ArgFlags.isZExt())
313 if (ArgFlags.isByVal()) {
314 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, 2, ArgFlags);
335 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | [all...] |
| PPCFastISel.cpp | 183 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
[all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 194 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| MipsFastISel.cpp | 225 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
230 ISD::ArgFlagsTy ArgFlags, CCState &State) {
236 ISD::ArgFlagsTy ArgFlags, CCState &State) {
[all...] |
| /external/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.cpp | 355 ISD::ArgFlagsTy ArgFlags, CCState &State) {
360 return CC_Lanai32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State);
366 if (ArgFlags.isSExt())
368 else if (ArgFlags.isZExt())
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 39 ISD::ArgFlagsTy &ArgFlags, CCState &State)
41 assert (ArgFlags.isSRet());
52 ISD::ArgFlagsTy &ArgFlags, CCState &State)
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeISelLowering.cpp | 40 ISD::ArgFlagsTy &ArgFlags,
657 ISD::ArgFlagsTy &ArgFlags,
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 43 ISD::ArgFlagsTy &ArgFlags,
48 ISD::ArgFlagsTy &ArgFlags,
53 ISD::ArgFlagsTy &ArgFlags,
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 41 ISD::ArgFlagsTy &ArgFlags, CCState &State)
43 assert (ArgFlags.isSRet());
54 ISD::ArgFlagsTy &ArgFlags, CCState &State)
82 ISD::ArgFlagsTy &ArgFlags, CCState &State)
106 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
151 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 36 ISD::ArgFlagsTy ArgFlags, CCState &State) {
41 ArgFlags.getOrigAlign());
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
