| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| micromips-branch-relax.s | 75 bltz $3, test3
|
| micromips@bge.d | 58 [0-9a-f]+ <[^>]*> 4005 fffe bltz a1,0+0074 <text_label\+0x74>
|
| relax-at.d | 64 00000098 <foo\+0x98> bltz a1,000000ac <foo\+0xac>
96 000000f8 <foo\+0xf8> bltz v1,0000010c <foo\+0x10c>
257 000202e8 <bar\+0x98> bltz a1,000202fc <bar\+0xac>
289 00020348 <bar\+0xf8> bltz v1,0002035c <bar\+0x10c>
|
| relax.d | 63 00000098 <foo\+0x98> bltz a1,000000ac <foo\+0xac>
95 000000f8 <foo\+0xf8> bltz v1,0000010c <foo\+0x10c>
256 000202e8 <bar\+0x98> bltz a1,000202fc <bar\+0xac>
288 00020348 <bar\+0xf8> bltz v1,0002035c <bar\+0x10c>
|
| micromips-branch-relax.d | 136 [ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
176 [ 0-9a-f]+: 401e fffe bltz s8,[0-9a-f]+ <.*\+0x[0-9a-f]+>
192 [ 0-9a-f]+: 401e fffe bltz s8,[0-9a-f]+ <.*\+0x[0-9a-f]+>
292 [ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*>
300 [ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*>
|
| micromips-branch-relax-pic.d | 163 [ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
216 [ 0-9a-f]+: 401e fffe bltz s8,[0-9a-f]+ <.*\+0x[0-9a-f]+>
238 [ 0-9a-f]+: 401e fffe bltz s8,[0-9a-f]+ <.*\+0x[0-9a-f]+>
374 [ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*>
385 [ 0-9a-f]+: 4003 fffe bltz v1,[0-9a-f]+ <.*>
|
| micromips-insn32.d | [all...] |
| micromips-noinsn32.d | [all...] |
| micromips-trap.d | [all...] |
| micromips.d | [all...] |
| /external/llvm/test/MC/Mips/ |
| branch-pseudos.s | 18 # CHECK: bltz $7, local_label # encoding: [0x04,0xe0,A,A]
26 # CHECK: bltz $zero, local_label # encoding: [0x04,0x00,A,A]
162 # CHECK: bltz $8, local_label # encoding: [0x05,0x00,A,A]
202 # CHECK: bltz $7, local_label # encoding: [0x04,0xe0,A,A]
275 # CHECK: bltz $8, local_label # encoding: [0x05,0x00,A,A]
|
| /system/core/libpixelflinger/arch-mips/ |
| t32cb16blend.S | 207 bltz $a2,tail
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/iq2000/ |
| allinsn.d | 144 000000b4 <bltz>:
145 b4: 04 00 ff d2 bltz r0,0 <add>
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m32r/ |
| allinsn.d | 72 0+0054 <bltz>:
73 54: b0 ad ff eb bltz fp,0 <add>
|
| /external/valgrind/none/tests/mips64/ |
| branch_and_jump_instructions.stdout.exp | 600 --- BLTZ --- if RSval < 0 then out = RDval + 1 else out = RDval + 9
601 bltz :: out: 0x9, RSval: 0x0
602 bltz :: out: 0xa, RSval: 0x1
603 bltz :: out: 0x3, RSval: 0xffffffff
604 bltz :: out: 0x4, RSval: 0xffffffff
605 bltz :: out: 0x5, RSval: 0xfffffffe
606 bltz :: out: 0x6, RSval: 0xffffffff
607 bltz :: out: 0xf, RSval: 0x5
608 bltz :: out: 0x8, RSval: 0xfffffffffffffffd
609 bltz :: out: 0x11, RSval: 0x7
[all...] |
| /external/python/cpython2/Modules/_ctypes/libffi/src/mips/ |
| n32.S | 102 bltz t8, loadregs
|
| /external/v8/src/mips/ |
| disasm-mips.cc | [all...] |
| assembler-mips.h | 647 void bltz(Register rs, int16_t offset);
[all...] |
| assembler-mips.cc | 491 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ ||
1390 void Assembler::bltz(Register rs, int16_t offset) { function in class:v8::Assembler
[all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 651 void bltz(Register rs, int16_t offset);
[all...] |
| assembler-mips64.cc | 473 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ ||
1377 void Assembler::bltz(Register rs, int16_t offset) { function in class:v8::internal::Assembler
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tilegx/ |
| t_insns.d | 83 248: [0-9a-f]* { v1cmpne r5, r6, r7 ; bltz r15, 0 <target> }
84 250: [0-9a-f]* { v1int_l r5, r6, r7 ; bltz r15, 0 <target> }
85 258: [0-9a-f]* { v1multu r5, r6, r7 ; bltz r15, 0 <target> }
87 268: [0-9a-f]* { v2addsc r5, r6, r7 ; bltz r15, 0 <target> }
90 280: [0-9a-f]* { v2packh r5, r6, r7 ; bltz r15, 0 <target> }
93 298: [0-9a-f]* { v4shlsc r5, r6, r7 ; bltz r15, 0 <target> }
95 2a8: [0-9a-f]* { cmpltsi r5, r6, 5 ; bltz r15, 0 <target> }
96 2b0: [0-9a-f]* { cmulaf r5, r6, r7 ; bltz r15, 0 <target> }
217 678: [0-9a-f]* { dblalign r5, r6, r7 ; bltz r15, 0 <target> }
218 680: [0-9a-f]* { mula_hs_lu r5, r6, r7 ; bltz r15, 0 <target>
[all...] |
| t_insns.s | 108 { v1cmpne r5, r6, r7 ; bltz r15, target }
109 { v1int_l r5, r6, r7 ; bltz r15, target }
110 { v1multu r5, r6, r7 ; bltz r15, target }
112 { v2addsc r5, r6, r7 ; bltz r15, target }
115 { v2packh r5, r6, r7 ; bltz r15, target }
118 { v4shlsc r5, r6, r7 ; bltz r15, target }
120 { cmpltsi r5, r6, 5 ; bltz r15, target }
121 { cmulaf r5, r6, r7 ; bltz r15, target }
242 { bltz r15, target ; dblalign r5, r6, r7 }
243 { bltz r15, target ; mula_hs_lu r5, r6, r7
[all...] |
| /external/libjpeg-turbo/simd/ |
| jsimd_mips_dspr2.S | 50 bltz t9, 7f
92 bltz t9, 7f
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| mips-opc.c | [all...] |
