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  /external/llvm/lib/Target/ARM/
Thumb1FrameLowering.cpp 57 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo());
91 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
93 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo());
328 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo());
422 static_cast<const ThumbRegisterInfo *>(STI.getRegisterInfo());
467 LivePhysRegs UsedRegs(STI.getRegisterInfo());
473 const TargetRegisterInfo *TRI = STI.getRegisterInfo();
ARMSubtarget.h 374 const ARMBaseRegisterInfo *getRegisterInfo() const override {
375 return &InstrInfo->getRegisterInfo();
  /external/swiftshader/third_party/LLVM/lib/CodeGen/
PrologEpilogInserter.cpp 71 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
150 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
205 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
307 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
565 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
720 assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
722 const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
CalcSpillWeights.cpp 91 const TargetRegisterInfo &tri = *MF.getTarget().getRegisterInfo();
DeadMachineInstructionElim.cpp 88 TRI = MF.getTarget().getRegisterInfo();
MachineFunction.cpp 58 if (TM.getRegisterInfo())
59 RegInfo = new (Allocator) MachineRegisterInfo(*TM.getRegisterInfo());
301 const TargetRegisterInfo *TRI = getTarget().getRegisterInfo();
459 const TargetRegisterInfo *TRI = TM.getRegisterInfo();
  /external/llvm/lib/Target/Mips/
MipsSEFrameLowering.cpp 83 RegInfo(*Subtarget.getRegisterInfo()) {}
383 *static_cast<const MipsRegisterInfo *>(STI.getRegisterInfo());
405 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
595 STI.getRegisterInfo(), 0);
606 STI.getRegisterInfo(), 0);
673 *static_cast<const MipsRegisterInfo *>(STI.getRegisterInfo());
740 STI.getRegisterInfo());
748 STI.getRegisterInfo());
835 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
    [all...]
MipsSERegisterInfo.cpp 114 static_cast<const MipsRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
  /external/llvm/lib/Target/PowerPC/MCTargetDesc/
PPCMCCodeEmitter.cpp 327 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2);
350 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
364 return CTX.getRegisterInfo()->getEncodingValue(MO.getReg());
  /external/llvm/lib/Target/Sparc/
SparcFrameLowering.cpp 94 *static_cast<const SparcRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
234 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo();
248 const SparcRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
  /external/llvm/lib/CodeGen/
DeadMachineInstructionElim.cpp 103 TRI = MF.getSubtarget().getRegisterInfo();
ProcessImplicitDefs.cpp 143 TRI = MF.getSubtarget().getRegisterInfo();
StackMaps.cpp 91 const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
161 AP.MF ? AP.MF->getSubtarget().getRegisterInfo() : nullptr;
242 const TargetRegisterInfo *TRI = AP.MF->getSubtarget().getRegisterInfo();
337 const TargetRegisterInfo *RegInfo = AP.MF->getSubtarget().getRegisterInfo();
LocalStackSlotAllocation.cpp 106 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
277 const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
  /external/llvm/lib/Target/AArch64/
AArch64RedundantCopyElimination.cpp 172 TRI = MF.getSubtarget().getRegisterInfo();
AArch64RegisterBankInfo.cpp 125 const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
  /external/llvm/lib/Target/AMDGPU/
SILowerI1Copies.cpp 71 const TargetRegisterInfo *TRI = &TII->getRegisterInfo();
SIFrameLowering.cpp 64 const SIRegisterInfo *TRI = &TII->getRegisterInfo();
304 const SIRegisterInfo *TRI = &TII->getRegisterInfo();
SIShrinkInstructions.cpp 137 const SIRegisterInfo &TRI = TII->getRegisterInfo();
204 const SIRegisterInfo &TRI = TII->getRegisterInfo();
  /external/llvm/lib/Target/Hexagon/
HexagonBranchRelaxation.cpp 85 HRI = HST.getRegisterInfo();
HexagonSplitConst32AndConst64.cpp 79 const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
  /external/llvm/lib/Target/SystemZ/
SystemZFrameLowering.cpp 71 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
121 MBB.getParent()->getSubtarget().getRegisterInfo();
330 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
489 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo();
SystemZLongBranch.cpp 363 BRCL->addRegisterKilled(SystemZ::CC, &TII->getRegisterInfo());
381 BRCL->addRegisterKilled(SystemZ::CC, &TII->getRegisterInfo());
  /external/swiftshader/third_party/LLVM/include/llvm/Target/
TargetMachine.h 137 /// getRegisterInfo - If register information is available, return it. If
141 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
  /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
MBlazeInstrInfo.h 175 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
179 virtual const MBlazeRegisterInfo &getRegisterInfo() const { return RI; }

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