| /external/v8/src/x87/ |
| assembler-x87.h | 689 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); }
774 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); }
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.h | 587 void cmpl(Register reg0, Register reg1);
593 void testl(Register reg1, Register reg2);
595 void testl(Register reg1, const Address& address);
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.cc | [all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.h | 64 Register GetRegisterThatIsNotOneOf(Register reg1,
73 bool AreAliased(Register reg1,
147 void Swap(Register reg1,
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerX86BaseImpl.h | [all...] |
| IceAssemblerX86Base.h | 568 void cmp(Type Ty, GPRRegister reg0, GPRRegister reg1);
574 void test(Type Ty, GPRRegister reg0, GPRRegister reg1);
721 void xchg(Type Ty, GPRRegister reg0, GPRRegister reg1);
798 void arith_int(Type Ty, GPRRegister reg0, GPRRegister reg1);
[all...] |
| /external/v8/src/mips/ |
| macro-assembler-mips.cc | [all...] |
| macro-assembler-mips.h | 96 Register GetRegisterThatIsNotOneOf(Register reg1,
103 bool AreAliased(Register reg1, Register reg2, Register reg3 = no_reg,
254 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
[all...] |
| /external/vixl/src/aarch64/ |
| assembler-aarch64.cc | [all...] |
| /external/v8/src/crankshaft/x87/ |
| lithium-codegen-x87.h | 86 void X87LoadForUsage(X87Register reg1, X87Register reg2);
|
| /external/v8/src/ppc/ |
| macro-assembler-ppc.h | 59 Register GetRegisterThatIsNotOneOf(Register reg1, Register reg2 = no_reg,
67 bool AreAliased(Register reg1, Register reg2, Register reg3 = no_reg,
[all...] |
| macro-assembler-ppc.cc | [all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64_test.cc | 336 DriverStr(RepeatFFF(&mips64::Mips64Assembler::AddS, "add.s ${reg1}, ${reg2}, ${reg3}"), "add.s");
340 DriverStr(RepeatFFF(&mips64::Mips64Assembler::AddD, "add.d ${reg1}, ${reg2}, ${reg3}"), "add.d");
344 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SubS, "sub.s ${reg1}, ${reg2}, ${reg3}"), "sub.s");
348 DriverStr(RepeatFFF(&mips64::Mips64Assembler::SubD, "sub.d ${reg1}, ${reg2}, ${reg3}"), "sub.d");
352 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MulS, "mul.s ${reg1}, ${reg2}, ${reg3}"), "mul.s");
356 DriverStr(RepeatFFF(&mips64::Mips64Assembler::MulD, "mul.d ${reg1}, ${reg2}, ${reg3}"), "mul.d");
360 DriverStr(RepeatFFF(&mips64::Mips64Assembler::DivS, "div.s ${reg1}, ${reg2}, ${reg3}"), "div.s");
364 DriverStr(RepeatFFF(&mips64::Mips64Assembler::DivD, "div.d ${reg1}, ${reg2}, ${reg3}"), "div.d");
368 DriverStr(RepeatFF(&mips64::Mips64Assembler::SqrtS, "sqrt.s ${reg1}, ${reg2}"), "sqrt.s");
372 DriverStr(RepeatFF(&mips64::Mips64Assembler::SqrtD, "sqrt.d ${reg1}, ${reg2}"), "sqrt.d")
[all...] |
| /external/v8/src/full-codegen/arm64/ |
| full-codegen-arm64.cc | 66 void EmitJumpIfEitherNotSmi(Register reg1, Register reg2, Label* target) {
69 __ Orr(temp, reg1, reg2);
[all...] |
| /external/v8/src/full-codegen/mips/ |
| full-codegen-mips.cc | [all...] |
| /external/v8/src/full-codegen/mips64/ |
| full-codegen-mips64.cc | [all...] |
| /external/v8/src/full-codegen/ppc/ |
| full-codegen-ppc.cc | [all...] |
| /external/v8/src/full-codegen/s390/ |
| full-codegen-s390.cc | [all...] |
| /external/v8/src/mips64/ |
| macro-assembler-mips64.h | 102 Register GetRegisterThatIsNotOneOf(Register reg1,
109 bool AreAliased(Register reg1, Register reg2, Register reg3 = no_reg,
283 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
[all...] |
| macro-assembler-mips64.cc | [all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-metag.c | 383 /* Return TRUE if REG1 and REG2 are in paired units. */
385 is_unit_pair (const metag_reg *reg1, const metag_reg *reg2)
387 if ((reg1->unit == UNIT_A0 &&
389 (reg1->unit == UNIT_A1 &&
391 (reg1->unit == UNIT_D0 &&
393 (reg1->unit == UNIT_D1 &&
400 /* Return TRUE if REG1 and REG2 form a register pair. */
402 is_reg_pair (const metag_reg *reg1, const metag_reg *reg2)
404 if (reg1->unit == UNIT_FX &&
406 reg2->no == reg1->no + 1
[all...] |
| /art/runtime/interpreter/mterp/out/ |
| mterp_arm64.S | 306 .macro SAVE_TWO_REGS reg1, reg2, offset
307 stp \reg1, \reg2, [sp, #(\offset)]
308 .cfi_rel_offset \reg1, (\offset)
315 .macro RESTORE_TWO_REGS reg1, reg2, offset
316 ldp \reg1, \reg2, [sp, #(\offset)]
317 .cfi_restore \reg1
324 .macro SAVE_TWO_REGS_INCREASE_FRAME reg1, reg2, frame_adjustment
325 stp \reg1, \reg2, [sp, #-(\frame_adjustment)]!
327 .cfi_rel_offset \reg1, 0
334 .macro RESTORE_TWO_REGS_DECREASE_FRAME reg1, reg2, frame_adjustmen
[all...] |
| /art/compiler/optimizing/ |
| code_generator_x86_64.h | 143 void Exchange64(CpuRegister reg1, CpuRegister reg2);
|
| /external/libvpx/libvpx/third_party/libyuv/include/libyuv/ |
| row.h | 519 #define VMEMOPREG(opcode, offset, base, index, scale, reg1, reg2) \
522 #opcode " (%%r15,%%r14),%%" #reg1 ",%%" #reg2 "\n" \
547 #define VMEMOPREG(opcode, offset, base, index, scale, reg1, reg2) \
548 #opcode " " #offset "(%" #base ",%" #index "," #scale "),%%" #reg1 ",%%" \
[all...] |
| /external/pcre/dist2/src/sljit/ |
| sljitNativeARM_T2_32.c | 63 #define IS_2_LO_REGS(reg1, reg2) \
64 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7)
65 #define IS_3_LO_REGS(reg1, reg2, reg3) \
66 (reg_map[reg1] <= 7 && reg_map[reg2] <= 7 && reg_map[reg3] <= 7)
[all...] |
