| /external/valgrind/none/tests/x86/ |
| bug152818-x86.stdout.exp | 1 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 4 (EAX = 123487FD, EFLAGS = )
2 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 3 (EAX = 123487FE, EFLAGS = )
3 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 2 (EAX = 123487FF, EFLAGS = )
4 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 1 (EAX = 123487AA, EFLAGS = )
5 REP lodsb (EAX = 12348765, EFLAGS = ) => DF = 0, count = 0 (EAX = 12348765, EFLAGS =
[all...] |
| insn_basic.def | 1 ###aaa eflags[0x11,0x01] al.ub[0x1] ah.ub[0x0] : => al.ub[0x1] ah.ub[0x00] eflags[0x11,0x00]
2 ###aaa eflags[0x11,0x01] al.ub[0x9] ah.ub[0x0] : => al.ub[0x9] ah.ub[0x00] eflags[0x11,0x00]
3 ###aaa eflags[0x11,0x00] al.ub[0xa] ah.ub[0x0] : => al.ub[0x0] ah.ub[0x01] eflags[0x11,0x11]
4 ###aaa eflags[0x11,0x00] al.ub[0xf] ah.ub[0x0] : => al.ub[0x5] ah.ub[0x01] eflags[0x11,0x11]
5 ###aaa eflags[0x11,0x10] al.ub[0x1] ah.ub[0x0] : => al.ub[0x7] ah.ub[0x01] eflags[0x11,0x11
[all...] |
| insn_cmov.def | 1 cmova eflags[0x041,0x000] : r16.uw[12345] r16.uw[0] => 1.uw[12345]
2 cmova eflags[0x041,0x001] : r16.uw[12345] r16.uw[0] => 1.uw[0]
3 cmova eflags[0x041,0x040] : r16.uw[12345] r16.uw[0] => 1.uw[0]
4 cmova eflags[0x041,0x041] : r16.uw[12345] r16.uw[0] => 1.uw[0]
5 cmova eflags[0x041,0x000] : m16.uw[12345] r16.uw[0] => 1.uw[12345]
6 cmova eflags[0x041,0x001] : m16.uw[12345] r16.uw[0] => 1.uw[0]
7 cmova eflags[0x041,0x040] : m16.uw[12345] r16.uw[0] => 1.uw[0]
8 cmova eflags[0x041,0x041] : m16.uw[12345] r16.uw[0] => 1.uw[0]
9 cmovae eflags[0x001,0x000] : r16.uw[12345] r16.uw[0] => 1.uw[12345]
10 cmovae eflags[0x001,0x001] : r16.uw[12345] r16.uw[0] => 1.uw[0
[all...] |
| bug152818-x86.c | 50 "sahf \t\n" /* loading our eflags */ \
73 : "%eax", "%esi", "%ecx", "cc" /* we mess up EFLAGS */);
93 unsigned int eflags; local
123 eflags = 0;
124 pp_eflags ((eflags >> 8) & 0xFF); // scratching off AH
125 printf ("REP %s (EAX = %08X, EFLAGS = %s) => ", i_name, eax, sz_eflags);
140 eax, esi, eflags, resulting_eax, resulting_esi, resulting_eflags,
147 eax, esi, eflags, resulting_eax, resulting_esi, resulting_eflags,
158 eax, esi, eflags, resulting_eax, resulting_esi, resulting_eflags,
167 eax, esi, eflags, resulting_eax, resulting_esi, resulting_eflags
[all...] |
| /external/llvm/lib/Target/AVR/MCTargetDesc/ |
| AVRELFStreamer.cpp | 11 unsigned EFlags = 0;
15 EFlags |= ELF::EF_AVR_ARCH_AVR1;
17 EFlags |= ELF::EF_AVR_ARCH_AVR2;
19 EFlags |= ELF::EF_AVR_ARCH_AVR25;
21 EFlags |= ELF::EF_AVR_ARCH_AVR3;
23 EFlags |= ELF::EF_AVR_ARCH_AVR31;
25 EFlags |= ELF::EF_AVR_ARCH_AVR35;
27 EFlags |= ELF::EF_AVR_ARCH_AVR4;
29 EFlags |= ELF::EF_AVR_ARCH_AVR5;
31 EFlags |= ELF::EF_AVR_ARCH_AVR51
[all...] |
| /external/valgrind/none/tests/amd64/ |
| insn_basic.def | 1 adcb eflags[0x1,0x0] : imm8[12] al.ub[34] => 1.ub[46]
2 adcb eflags[0x1,0x1] : imm8[12] al.ub[34] => 1.ub[47]
3 adcb eflags[0x1,0x0] : imm8[12] bl.ub[34] => 1.ub[46]
4 adcb eflags[0x1,0x1] : imm8[12] bl.ub[34] => 1.ub[47]
5 adcb eflags[0x1,0x0] : imm8[12] m8.ub[34] => 1.ub[46]
6 adcb eflags[0x1,0x1] : imm8[12] m8.ub[34] => 1.ub[47]
7 adcb eflags[0x1,0x0] : r8.ub[12] r8.ub[34] => 1.ub[46]
8 adcb eflags[0x1,0x1] : r8.ub[12] r8.ub[34] => 1.ub[47]
9 adcb eflags[0x1,0x0] : r8.ub[12] m8.ub[34] => 1.ub[46]
10 adcb eflags[0x1,0x1] : r8.ub[12] m8.ub[34] => 1.ub[47
[all...] |
| /external/valgrind/memcheck/tests/x86-solaris/ |
| context_eflags2.c | 12 #define OBIT(eflags) (!!((eflags) & (1 << 11)))
13 #define SBIT(eflags) (!!((eflags) & (1 << 7)))
34 int eflags; local
66 : "=d" (eflags)
72 Note: This actually fails because the eflags are only approximate
78 if (!OBIT(eflags) || !SBIT(eflags))
|
| context_eflags.c | 12 #define OBIT(eflags) (!!((eflags) & (1 << 11)))
13 #define SBIT(eflags) (!!((eflags) & (1 << 7)))
28 int eflags; local
59 : "=d" (eflags)
68 printf(" overflow=%d, sign=%d\n", OBIT(eflags), SBIT(eflags));
|
| /external/syslinux/com32/lib/sys/ |
| farcall.c | 7 static inline uint32_t eflags(void) function
29 xreg.eflags.l = (xreg.eflags.l & ~EFLAGS_IF) | (eflags() & EFLAGS_IF);
|
| /external/llvm/test/CodeGen/MIR/X86/ |
| implicit-register-flag.mir | 35 ; CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
36 ; CHECK-NEXT: JG_1 %bb.2.exit, implicit %eflags
37 CMP32ri8 %edi, 10, implicit-def %eflags
38 JG_1 %bb.2.exit, implicit %eflags
41 ; CHECK: %eax = MOV32r0 implicit-def %eflags
42 %eax = MOV32r0 implicit-def %eflags
56 ; CHECK: dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al
57 dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al
65 ; CHECK: dead %r15 = XOR64rr undef %r15, undef %r15, implicit-def dead %eflags, implicit-def %r15w
66 dead %r15 = XOR64rr undef %r15, undef %r15, implicit-def dead %eflags, implicit-def %r15
[all...] |
| newline-handling.mir | 40 # CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
41 # CHECK-NEXT: JG_1 %bb.2.exit, implicit killed %eflags
44 # CHECK-NEXT: %eax = MOV32r0 implicit-def dead %eflags
57 CMP32ri8 %edi, 10, implicit-def %eflags
59 JG_1 %bb.2.exit, implicit killed %eflags
64 %eax = MOV32r0 implicit-def dead %eflags
84 # CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
85 # CHECK-NEXT: JG_1 %bb.2.exit, implicit killed %eflags
88 # CHECK-NEXT: %eax = MOV32r0 implicit-def dead %eflags
100 CMP32ri8 %edi, 10, implicit-def %eflags
[all...] |
| expected-different-implicit-register-flag.mir | 25 CMP32ri8 %eax, 10, implicit-def %eflags
26 ; CHECK: [[@LINE+1]]:42: missing implicit register operand 'implicit %eflags'
27 JG_1 %bb.2.exit, implicit-def %eflags
30 %eax = MOV32r0 implicit-def %eflags
|
| machine-basic-block-operands.mir | 44 CMP32ri8 %eax, 10, implicit-def %eflags
45 JG_1 %bb.2.exit, implicit %eflags
49 %eax = MOV32r0 implicit-def %eflags
65 CMP32ri8 %eax, 10, implicit-def %eflags
66 JG_1 %bb.3, implicit %eflags
69 %eax = MOV32r0 implicit-def %eflags
|
| cfi-def-cfa-offset.mir | 23 %rsp = SUB64ri32 %rsp, 4040, implicit-def dead %eflags
26 %rsp = ADD64ri32 %rsp, 4040, implicit-def dead %eflags
|
| dead-register-flag.mir | 21 ; CHECK: %eax = IMUL32rri8 %edi, 11, implicit-def dead %eflags
22 %eax = IMUL32rri8 %edi, 11, implicit-def dead %eflags
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ia32/ |
| ReadEflags.c | 19 Reads the current value of the EFLAGS register.
21 Reads and returns the current value of the EFLAGS register. This function is
25 @return EFLAGS on IA-32 or RFLAGS on x64.
|
| /device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/ |
| X86GetInterruptState.c | 35 IA32_EFLAGS32 EFlags;
37 EFlags.UintN = AsmReadEflags ();
38 return (BOOLEAN)(1 == EFlags.Bits.IF);
|
| /external/syslinux/com32/lib/pci/ |
| bios.c | 13 rs.eflags.l = EFLAGS_CF;
16 return (rs.eflags.l & EFLAGS_CF) ? ~(uint32_t) 0 : rs.ecx.l;
|
| /external/llvm/test/CodeGen/X86/ |
| pr27681.mir | 36 %esp = frame-setup SUB32ri8 %esp, 36, implicit-def dead %eflags
48 %ebp = SHR32rCL killed %ebp, implicit-def dead %eflags, implicit %cl
49 %ebp = XOR32rr killed %ebp, killed %ebx, implicit-def dead %eflags
50 TEST32rr %edx, %edx, implicit-def %eflags
51 %cl = SETNEr implicit %eflags
54 %cl = OR8rr killed %cl, %bl, implicit-def dead %eflags
56 %esi = ADD32rr killed %esi, killed %edi, implicit-def dead %eflags
58 %edx = SAR32rCL killed %edx, implicit-def dead %eflags, implicit %cl
59 TEST32rr killed %edx, %edx, implicit-def %eflags
60 %cl = SETNEr implicit %eflags
[all...] |
| implicit-null-checks.mir | 96 # CHECK-NEXT: %eax = FAULTING_LOAD_OP %bb.3.is_null, {{[0-9]+}}, killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir.x)
104 TEST64rr %rdi, %rdi, implicit-def %eflags
105 JE_1 %bb.3.is_null, implicit %eflags
112 %eax = AND32rm killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir.x)
113 CMP32rr killed %eax, killed %esi, implicit-def %eflags
114 JE_1 %bb.4.ret_100, implicit %eflags
142 # CHECK-NEXT: TEST64rr %rdi, %rdi, implicit-def %eflags
143 # CHECK-NEXT: JE_1 %bb.3.is_null, implicit %eflags
151 TEST64rr %rdi, %rdi, implicit-def %eflags
152 JE_1 %bb.3.is_null, implicit %eflags
[all...] |
| eflags-copy-expansion.mir | 3 # Verify that we correctly save and restore eax when copying eflags,
54 ; Copy EDI into EFLAGS
56 ; CHECK-NEXT: %al = ADD8ri %al, 127, implicit-def %eflags
57 ; CHECK-NEXT: SAHF implicit-def %eflags, implicit %ah
58 %eflags = COPY %edi
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86InstrArithmetic.td | 48 let Defs = [AL,EFLAGS,AX], Uses = [AL] in
54 (implicit EFLAGS)]>; // AL,AH = AL*GR8
56 let Defs = [AX,DX,EFLAGS], Uses = [AX], neverHasSideEffects = 1 in
61 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX], neverHasSideEffects = 1 in
64 [/*(set EAX, EDX, EFLAGS, (X86umul_flag EAX, GR32:$src))*/]>;
65 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX], neverHasSideEffects = 1 in
68 [/*(set RAX, RDX, EFLAGS, (X86umul_flag RAX, GR64:$src))*/]>;
70 let Defs = [AL,EFLAGS,AX], Uses = [AL] in
77 (implicit EFLAGS)]>; // AL,AH = AL*[mem8]
80 let Defs = [AX,DX,EFLAGS], Uses = [AX] i
[all...] |
| X86InstrCMovSetCC.td | 18 let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
24 (X86cmov GR16:$src1, GR16:$src2, CondNode, EFLAGS))]>,TB,OpSize;
29 (X86cmov GR32:$src1, GR32:$src2, CondNode, EFLAGS))]>, TB;
34 (X86cmov GR64:$src1, GR64:$src2, CondNode, EFLAGS))]>, TB;
37 let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst" in {
42 CondNode, EFLAGS))]>, TB, OpSize;
47 CondNode, EFLAGS))]>, TB;
52 CondNode, EFLAGS))]>, TB;
53 } // Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst"
78 let Uses = [EFLAGS] in
[all...] |
| /external/valgrind/memcheck/tests/x86/ |
| more_x86_fp.c | 73 unsigned int eflags; local
78 : "=r" (eflags)
80 printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C));
205 #define TEST_FCMOV(a, b, eflags, CC)\
212 : "0" (a), "u" (b), "g" (eflags));\
213 printf("fcmov%s eflags=0x%04x-> %f\n", \
214 CC, eflags, res);\
220 int eflags, i; local
225 eflags = 0;
227 eflags |= CC_C
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrCMovSetCC.td | 18 let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
24 (X86cmov GR16:$src1, GR16:$src2, CondNode, EFLAGS))],
30 (X86cmov GR32:$src1, GR32:$src2, CondNode, EFLAGS))],
36 (X86cmov GR64:$src1, GR64:$src2, CondNode, EFLAGS))],
40 let Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst",
46 CondNode, EFLAGS))], IIC_CMOV16_RM>,
52 CondNode, EFLAGS))], IIC_CMOV32_RM>,
58 CondNode, EFLAGS))], IIC_CMOV32_RM>, TB;
59 } // Uses = [EFLAGS], Predicates = [HasCMov], Constraints = "$src1 = $dst"
84 let Uses = [EFLAGS] in
[all...] |
