/external/llvm/test/MC/AArch64/ |
neon-frsqrt-frecp.s | 8 frsqrts v0.4h, v31.4h, v16.4h 9 frsqrts v4.8h, v7.8h, v15.8h 10 frsqrts v0.2s, v31.2s, v16.2s 11 frsqrts v4.4s, v7.4s, v15.4s 12 frsqrts v29.2d, v2.2d, v5.2d 14 // CHECK: frsqrts v0.4h, v31.4h, v16.4h // encoding: [0xe0,0x3f,0xd0,0x0e] 15 // CHECK: frsqrts v4.8h, v7.8h, v15.8h // encoding: [0xe4,0x3c,0xcf,0x4e] 16 // CHECK: frsqrts v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xff,0xb0,0x0e] 17 // CHECK: frsqrts v4.4s, v7.4s, v15.4s // encoding: [0xe4,0xfc,0xaf,0x4e] 18 // CHECK: frsqrts v29.2d, v2.2d, v5.2d // encoding: [0x5d,0xfc,0xe5,0x4e [all...] |
neon-scalar-recip.s | 21 frsqrts h21, h5, h12 22 frsqrts s21, s5, s12 23 frsqrts d8, d22, d18 25 // CHECK: frsqrts h21, h5, h12 // encoding: [0xb5,0x3c,0xcc,0x5e] 26 // CHECK: frsqrts s21, s5, s12 // encoding: [0xb5,0xfc,0xac,0x5e] 27 // CHECK: frsqrts d8, d22, d18 // encoding: [0xc8,0xfe,0xf2,0x5e]
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fullfp16-neon-neg.s | 168 frsqrts v0.4h, v31.4h, v16.4h 170 frsqrts v4.8h, v7.8h, v15.8h 284 frsqrts h21, h5, h12
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arm64-advsimd.s | 332 frsqrts.2s v0, v0, v0 403 ; CHECK: frsqrts.2s v0, v0, v0 ; encoding: [0x00,0xfc,0xa0,0x0e] 465 frsqrts.4h v0, v0, v0 490 ; CHECK: frsqrts.4h v0, v0, v0 ; encoding: [0x00,0x3c,0xc0,0x0e] 515 frsqrts.8h v0, v0, v0 540 ; CHECK: frsqrts.8h v0, v0, v0 ; encoding: [0x00,0x3c,0xc0,0x4e] [all...] |
neon-diagnostics.s | 397 frsqrts v0.2d, v1.2d, v2.2s 398 frsqrts v0.4h, v1.4h, v2.4h 401 // CHECK-ERROR: frsqrts v0.2d, v1.2d, v2.2s 404 // CHECK-ERROR: frsqrts v0.4h, v1.4h, v2.4h [all...] |
/external/llvm/test/CodeGen/AArch64/ |
arm64-vsqrt.ll | 37 ;CHECK: frsqrts.2s 40 %tmp3 = call <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float> %tmp1, <2 x float> %tmp2) 46 ;CHECK: frsqrts.4s 49 %tmp3 = call <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float> %tmp1, <4 x float> %tmp2) 55 ;CHECK: frsqrts.2d 58 %tmp3 = call <2 x double> @llvm.aarch64.neon.frsqrts.v2f64(<2 x double> %tmp1, <2 x double> %tmp2) 62 declare <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone 63 declare <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone 64 declare <2 x double> @llvm.aarch64.neon.frsqrts.v2f64(<2 x double>, <2 x double>) nounwind readnone 217 ; CHECK: frsqrts s0, s0, s [all...] |
/frameworks/rs/driver/runtime/arch/ |
asimd.ll | 43 declare <2 x float> @llvm.aarch64.neon.frsqrts.v2f32(<2 x float>, <2 x float>) nounwind readnone 44 declare <4 x float> @llvm.aarch64.neon.frsqrts.v4f32(<4 x float>, <4 x float>) nounwind readnone [all...] |
/external/vixl/src/aarch64/ |
logic-aarch64.cc | 4008 LogicVRegister Simulator::frsqrts(VectorFormat vform, function in class:vixl::aarch64::Simulator 4023 LogicVRegister Simulator::frsqrts(VectorFormat vform, function in class:vixl::aarch64::Simulator [all...] |
macro-assembler-aarch64.h | [all...] |
simulator-aarch64.h | [all...] |
/external/vixl/test/aarch64/ |
test-simulator-traces-aarch64.h | 546 #include "aarch64/traces/sim-frsqrts-2d-trace-aarch64.h" 547 #include "aarch64/traces/sim-frsqrts-2s-trace-aarch64.h" 548 #include "aarch64/traces/sim-frsqrts-4s-trace-aarch64.h" 549 #include "aarch64/traces/sim-frsqrts-d-trace-aarch64.h" 550 #include "aarch64/traces/sim-frsqrts-s-trace-aarch64.h" [all...] |
test-trace-aarch64.cc | 575 __ frsqrts(d4, d29, d17); 576 __ frsqrts(s14, s3, s24); [all...] |
test-simulator-aarch64.cc | [all...] |
/external/valgrind/none/tests/arm64/ |
fp_and_simd.c | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.h | 253 FRSQRTS, FRCPS, [all...] |
X86IntrinsicsInfo.h | [all...] |
X86InstrFragmentsSIMD.td | 63 def X86frsqrt14s: SDNode<"X86ISD::FRSQRTS", SDTFPBinOp>; [all...] |
/external/vixl/doc/aarch64/ |
supported-instructions-aarch64.md | [all...] |
/external/vixl/test/test-trace-reference/ |
log-disasm | 498 0x~~~~~~~~~~~~~~~~ 5ef1ffa4 frsqrts d4, d29, d17 499 0x~~~~~~~~~~~~~~~~ 5eb8fc6e frsqrts s14, s3, s24 [all...] |
log-disasm-colour | 498 0x~~~~~~~~~~~~~~~~ 5ef1ffa4 frsqrts d4, d29, d17 499 0x~~~~~~~~~~~~~~~~ 5eb8fc6e frsqrts s14, s3, s24 [all...] |
/external/clang/include/clang/Basic/ |
arm_neon.td | [all...] |
/external/valgrind/VEX/priv/ |
host_arm64_defs.c | 697 case ARM64vecb_FRSQRTS64x2: *nm = "frsqrts"; *ar = "2d"; return; 698 case ARM64vecb_FRSQRTS32x4: *nm = "frsqrts"; *ar = "4s"; return; [all...] |
/prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/clang/include/clang/Basic/ |
arm_neon.td | [all...] |
/prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/clang/include/clang/Basic/ |
arm_neon.td | [all...] |
/prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/clang/include/clang/Basic/ |
arm_neon.td | [all...] |