| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| opc-a.pl | 39 sub r122 = -1, r3 subroutine
|
| opc-a.s | 37 sub r122 = -1, r3
|
| psn.s | 5 lfetch.count.d1 [r122], 12, -1024
77 mov r122 = dahr[r55]
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| opc-a.d | 37 90: 00 d0 ff 07 25 22 \[MII\] sub r122=-1,r3
|
| regs.d | 373 [ ]*[a-f0-9]+: 01 d0 03 00 00 21 \[MII\] mov r122=r0
[all...] |
| psn.d | 14 16: b0 80 ea c5 32 00 lfetch.count.nt1 \[r122\],12,-1024
77 166: a0 07 dc 40 08 00 mov r122=dahr\[r55\]
[all...] |
| regs.s | 127 { .mii; mov r122 = r0; nop.i 0; nop.i 0;; }
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/cfi/ |
| cfi-x86_64.d | 264 DW_CFA_undefined: r122 \(k4\)
|
| /external/lz4/ |
| NEWS | 112 r122:
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPURegisterInfo.td | 146 def R122 : SPUVecReg<122, "$122">, DwarfRegNum<[122]>;
|
| SPURegisterInfo.cpp | 176 case SPU::R122: return 122;
215 SPU::R120, SPU::R121, SPU::R122, SPU::R123,
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cfi/ |
| cfi-x86_64.d | 264 DW_CFA_undefined: r122 \(k4\)
|
| /external/libunwind/src/ia64/ |
| regname.c | 77 "r120\0\0\0\0\0r121\0\0\0\0\0r122\0\0\0\0\0r123\0\0\0\0\0" \
|
| /external/llvm/test/Analysis/CostModel/ARM/ |
| cast.ll | 276 ; CHECK: Found an estimated cost of 33 for instruction: %r122 = fptoui <4 x double> undef to <4 x i8>
277 %r122 = fptoui <4 x double> undef to <4 x i8>
[all...] |
