| /external/lz4/ |
| NEWS | 67 Fixed : Restored lz4hc compression ratio (slightly lower since r124)
101 r124:
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
| opc-a.pl | 41 sub r124 = 127, r3 subroutine
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| unwind-ok.s | 144 .save.g 0xc, r124
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| unwind-ok.d | 131 [[:space:]]*P9:gr_gr\(grmask=\[r6,r7\],r124\)
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| opc-a.s | 39 sub r124 = 127, r3
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| opc-a.d | 39 9c: ff 1f 94 80 sub r124=127,r3
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| regs.d | 379 [ ]*[a-f0-9]+: 01 e0 03 00 00 21 \[MII\] mov r124=r0
[all...] |
| regs.s | 129 { .mii; mov r124 = r0; nop.i 0; nop.i 0;; }
[all...] |
| /external/libunwind/tests/ |
| Gia64-test-rbs.c | 139 into loc2-loc89 (r37-r124). */
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/cfi/ |
| cfi-x86_64.d | 268 DW_CFA_undefined: r124 \(k6\)
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPURegisterInfo.td | 148 def R124 : SPUVecReg<124, "$124">, DwarfRegNum<[124]>;
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| SPURegisterInfo.cpp | 178 case SPU::R124: return 124;
216 SPU::R124, SPU::R125, SPU::R126, SPU::R127,
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cfi/ |
| cfi-x86_64.d | 268 DW_CFA_undefined: r124 \(k6\)
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| /external/libunwind/src/ia64/ |
| regname.c | 78 "r124\0\0\0\0\0r125\0\0\0\0\0r126\0\0\0\0\0r127\0\0\0\0\0" \
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| /external/llvm/test/Analysis/CostModel/ARM/ |
| cast.ll | 280 ; CHECK: Found an estimated cost of 33 for instruction: %r124 = fptoui <4 x double> undef to <4 x i16>
281 %r124 = fptoui <4 x double> undef to <4 x i16>
[all...] |
