1 /* 2 * Copyright (C) 2012 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #include "disassembler_mips.h" 18 19 #include <ostream> 20 #include <sstream> 21 22 #include "android-base/logging.h" 23 #include "android-base/stringprintf.h" 24 25 #include "base/bit_utils.h" 26 27 using android::base::StringPrintf; 28 29 namespace art { 30 namespace mips { 31 32 struct MipsInstruction { 33 uint32_t mask; 34 uint32_t value; 35 const char* name; 36 const char* args_fmt; 37 38 bool Matches(uint32_t instruction) const { 39 return (instruction & mask) == value; 40 } 41 }; 42 43 static const char* gO32AbiRegNames[] = { 44 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", 45 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", 46 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 47 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra" 48 }; 49 50 static const char* gN64AbiRegNames[] = { 51 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", 52 "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3", 53 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", 54 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra" 55 }; 56 57 static const uint32_t kOpcodeShift = 26; 58 59 static const uint32_t kCop1 = (17 << kOpcodeShift); 60 static const uint32_t kMsa = (30 << kOpcodeShift); // MSA major opcode. 61 62 static const uint32_t kITypeMask = (0x3f << kOpcodeShift); 63 static const uint32_t kJTypeMask = (0x3f << kOpcodeShift); 64 static const uint32_t kRTypeMask = ((0x3f << kOpcodeShift) | (0x3f)); 65 static const uint32_t kSpecial0Mask = (0x3f << kOpcodeShift); 66 static const uint32_t kSpecial2Mask = (0x3f << kOpcodeShift); 67 static const uint32_t kSpecial3Mask = (0x3f << kOpcodeShift); 68 static const uint32_t kFpMask = kRTypeMask; 69 static const uint32_t kMsaMask = kRTypeMask; 70 static const uint32_t kMsaSpecialMask = (0x3f << kOpcodeShift); 71 72 static const MipsInstruction gMipsInstructions[] = { 73 // "sll r0, r0, 0" is the canonical "nop", used in delay slots. 74 { 0xffffffff, 0, "nop", "" }, 75 76 // R-type instructions. 77 { kRTypeMask, 0, "sll", "DTA", }, 78 // 0, 1, movci 79 { kRTypeMask | (0x1f << 21), 2, "srl", "DTA", }, 80 { kRTypeMask, 3, "sra", "DTA", }, 81 { kRTypeMask | (0x1f << 6), 4, "sllv", "DTS", }, 82 { kRTypeMask | (0x1f << 6), 6, "srlv", "DTS", }, 83 { kRTypeMask | (0x1f << 6), (1 << 6) | 6, "rotrv", "DTS", }, 84 { kRTypeMask | (0x1f << 6), 7, "srav", "DTS", }, 85 { kRTypeMask, 8, "jr", "S", }, 86 { kRTypeMask | (0x1f << 11), 9 | (31 << 11), "jalr", "S", }, // rd = 31 is implicit. 87 { kRTypeMask | (0x1f << 11), 9, "jr", "S", }, // rd = 0 is implicit. 88 { kRTypeMask, 9, "jalr", "DS", }, // General case. 89 { kRTypeMask | (0x1f << 6), 10, "movz", "DST", }, 90 { kRTypeMask | (0x1f << 6), 11, "movn", "DST", }, 91 { kRTypeMask, 12, "syscall", "", }, // TODO: code 92 { kRTypeMask, 13, "break", "", }, // TODO: code 93 { kRTypeMask, 15, "sync", "", }, // TODO: type 94 { kRTypeMask, 16, "mfhi", "D", }, 95 { kRTypeMask, 17, "mthi", "S", }, 96 { kRTypeMask, 18, "mflo", "D", }, 97 { kRTypeMask, 19, "mtlo", "S", }, 98 { kRTypeMask | (0x1f << 6), 20, "dsllv", "DTS", }, 99 { kRTypeMask | (0x1f << 6), 22, "dsrlv", "DTS", }, 100 { kRTypeMask | (0x1f << 6), (1 << 6) | 22, "drotrv", "DTS", }, 101 { kRTypeMask | (0x1f << 6), 23, "dsrav", "DTS", }, 102 { kRTypeMask | (0x1f << 6), 24, "mult", "ST", }, 103 { kRTypeMask | (0x1f << 6), 25, "multu", "ST", }, 104 { kRTypeMask | (0x1f << 6), 26, "div", "ST", }, 105 { kRTypeMask | (0x1f << 6), 27, "divu", "ST", }, 106 { kRTypeMask | (0x1f << 6), 24 + (2 << 6), "mul", "DST", }, 107 { kRTypeMask | (0x1f << 6), 24 + (3 << 6), "muh", "DST", }, 108 { kRTypeMask | (0x1f << 6), 26 + (2 << 6), "div", "DST", }, 109 { kRTypeMask | (0x1f << 6), 26 + (3 << 6), "mod", "DST", }, 110 { kRTypeMask, 32, "add", "DST", }, 111 { kRTypeMask, 33, "addu", "DST", }, 112 { kRTypeMask, 34, "sub", "DST", }, 113 { kRTypeMask, 35, "subu", "DST", }, 114 { kRTypeMask, 36, "and", "DST", }, 115 { kRTypeMask, 37, "or", "DST", }, 116 { kRTypeMask, 38, "xor", "DST", }, 117 { kRTypeMask, 39, "nor", "DST", }, 118 { kRTypeMask, 42, "slt", "DST", }, 119 { kRTypeMask, 43, "sltu", "DST", }, 120 { kRTypeMask, 45, "daddu", "DST", }, 121 { kRTypeMask, 46, "dsub", "DST", }, 122 { kRTypeMask, 47, "dsubu", "DST", }, 123 // TODO: tge[u], tlt[u], teg, tne 124 { kRTypeMask | (0x1f << 21), 56, "dsll", "DTA", }, 125 { kRTypeMask | (0x1f << 21), 58, "dsrl", "DTA", }, 126 { kRTypeMask | (0x1f << 21), (1 << 21) | 58, "drotr", "DTA", }, 127 { kRTypeMask | (0x1f << 21), 59, "dsra", "DTA", }, 128 { kRTypeMask | (0x1f << 21), 60, "dsll32", "DTA", }, 129 { kRTypeMask | (0x1f << 21), 62, "dsrl32", "DTA", }, 130 { kRTypeMask | (0x1f << 21), (1 << 21) | 62, "drotr32", "DTA", }, 131 { kRTypeMask | (0x1f << 21), 63, "dsra32", "DTA", }, 132 133 // SPECIAL0 134 { kSpecial0Mask | 0x307ff, 1, "movf", "DSc" }, 135 { kSpecial0Mask | 0x307ff, 0x10001, "movt", "DSc" }, 136 { kSpecial0Mask | 0x7ff, (2 << 6) | 24, "mul", "DST" }, 137 { kSpecial0Mask | 0x7ff, (3 << 6) | 24, "muh", "DST" }, 138 { kSpecial0Mask | 0x7ff, (2 << 6) | 25, "mulu", "DST" }, 139 { kSpecial0Mask | 0x7ff, (3 << 6) | 25, "muhu", "DST" }, 140 { kSpecial0Mask | 0x7ff, (2 << 6) | 26, "div", "DST" }, 141 { kSpecial0Mask | 0x7ff, (3 << 6) | 26, "mod", "DST" }, 142 { kSpecial0Mask | 0x7ff, (2 << 6) | 27, "divu", "DST" }, 143 { kSpecial0Mask | 0x7ff, (3 << 6) | 27, "modu", "DST" }, 144 { kSpecial0Mask | 0x7ff, (2 << 6) | 28, "dmul", "DST" }, 145 { kSpecial0Mask | 0x7ff, (3 << 6) | 28, "dmuh", "DST" }, 146 { kSpecial0Mask | 0x7ff, (2 << 6) | 29, "dmulu", "DST" }, 147 { kSpecial0Mask | 0x7ff, (3 << 6) | 29, "dmuhu", "DST" }, 148 { kSpecial0Mask | 0x7ff, (2 << 6) | 30, "ddiv", "DST" }, 149 { kSpecial0Mask | 0x7ff, (3 << 6) | 30, "dmod", "DST" }, 150 { kSpecial0Mask | 0x7ff, (2 << 6) | 31, "ddivu", "DST" }, 151 { kSpecial0Mask | 0x7ff, (3 << 6) | 31, "dmodu", "DST" }, 152 { kSpecial0Mask | 0x7ff, (0 << 6) | 53, "seleqz", "DST" }, 153 { kSpecial0Mask | 0x7ff, (0 << 6) | 55, "selnez", "DST" }, 154 { kSpecial0Mask | (0x1f << 21) | 0x3f, (1 << 21) | 2, "rotr", "DTA", }, 155 { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x10, "clz", "DS" }, 156 { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x11, "clo", "DS" }, 157 { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x12, "dclz", "DS" }, 158 { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x13, "dclo", "DS" }, 159 { kSpecial0Mask | 0x73f, 0x05, "lsa", "DSTj" }, 160 { kSpecial0Mask | 0x73f, 0x15, "dlsa", "DSTj" }, 161 // TODO: sdbbp 162 163 // SPECIAL2 164 { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 2, "mul", "DST" }, 165 { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 32, "clz", "DS" }, 166 { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 33, "clo", "DS" }, 167 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 0, "madd", "ST" }, 168 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 1, "maddu", "ST" }, 169 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 2, "mul", "DST" }, 170 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 4, "msub", "ST" }, 171 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 5, "msubu", "ST" }, 172 { kSpecial2Mask | 0x3f, (28 << kOpcodeShift) | 0x3f, "sdbbp", "" }, // TODO: code 173 174 // SPECIAL3 175 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift), "ext", "TSAZ", }, 176 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 3, "dext", "TSAZ", }, 177 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 4, "ins", "TSAz", }, 178 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 6, "dinsu", "TSFz", }, 179 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f, 180 (31 << kOpcodeShift) | (16 << 6) | 32, 181 "seb", 182 "DT", }, 183 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f, 184 (31 << kOpcodeShift) | (24 << 6) | 32, 185 "seh", 186 "DT", }, 187 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f, 188 (31 << kOpcodeShift) | 32, 189 "bitswap", 190 "DT", }, 191 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f, 192 (31 << kOpcodeShift) | 36, 193 "dbitswap", 194 "DT", }, 195 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f, 196 (31 << kOpcodeShift) | (2 << 6) | 36, 197 "dsbh", 198 "DT", }, 199 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f, 200 (31 << kOpcodeShift) | (5 << 6) | 36, 201 "dshd", 202 "DT", }, 203 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f, 204 (31 << kOpcodeShift) | (2 << 6) | 32, 205 "wsbh", 206 "DT", }, 207 { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x26, "sc", "Tl", }, 208 { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x27, "scd", "Tl", }, 209 { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x36, "ll", "Tl", }, 210 { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x37, "lld", "Tl", }, 211 212 // J-type instructions. 213 { kJTypeMask, 2 << kOpcodeShift, "j", "L" }, 214 { kJTypeMask, 3 << kOpcodeShift, "jal", "L" }, 215 216 // I-type instructions. 217 { kITypeMask, 4 << kOpcodeShift, "beq", "STB" }, 218 { kITypeMask, 5 << kOpcodeShift, "bne", "STB" }, 219 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (1 << 16), "bgez", "SB" }, 220 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (0 << 16), "bltz", "SB" }, 221 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (2 << 16), "bltzl", "SB" }, 222 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (16 << 16), "bltzal", "SB" }, 223 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (18 << 16), "bltzall", "SB" }, 224 { kITypeMask | (0x1f << 16), 6 << kOpcodeShift | (0 << 16), "blez", "SB" }, 225 { kITypeMask, 6 << kOpcodeShift, "bgeuc", "STB" }, 226 { kITypeMask | (0x1f << 16), 7 << kOpcodeShift | (0 << 16), "bgtz", "SB" }, 227 { kITypeMask, 7 << kOpcodeShift, "bltuc", "STB" }, 228 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (6 << 16), "dahi", "Si", }, 229 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (30 << 16), "dati", "Si", }, 230 231 { 0xffff0000, (4 << kOpcodeShift), "b", "B" }, 232 { 0xffff0000, (1 << kOpcodeShift) | (17 << 16), "bal", "B" }, 233 234 { kITypeMask, 8 << kOpcodeShift, "beqc", "STB" }, 235 236 { kITypeMask, 8 << kOpcodeShift, "addi", "TSi", }, 237 { kITypeMask, 9 << kOpcodeShift, "addiu", "TSi", }, 238 { kITypeMask, 10 << kOpcodeShift, "slti", "TSi", }, 239 { kITypeMask, 11 << kOpcodeShift, "sltiu", "TSi", }, 240 { kITypeMask, 12 << kOpcodeShift, "andi", "TSi", }, 241 { kITypeMask, 13 << kOpcodeShift, "ori", "TSi", }, 242 { kITypeMask, 14 << kOpcodeShift, "xori", "TSi", }, 243 { kITypeMask | (0x1f << 21), 15 << kOpcodeShift, "lui", "Ti", }, 244 { kITypeMask, 15 << kOpcodeShift, "aui", "TSi", }, 245 246 { kITypeMask | (0x3e3 << 16), (17 << kOpcodeShift) | (8 << 21), "bc1f", "cB" }, 247 { kITypeMask | (0x3e3 << 16), (17 << kOpcodeShift) | (8 << 21) | (1 << 16), "bc1t", "cB" }, 248 { kITypeMask | (0x1f << 21), (17 << kOpcodeShift) | (9 << 21), "bc1eqz", "tB" }, 249 { kITypeMask | (0x1f << 21), (17 << kOpcodeShift) | (13 << 21), "bc1nez", "tB" }, 250 251 { kITypeMask | (0x1f << 21), 22 << kOpcodeShift, "blezc", "TB" }, 252 253 // TODO: de-dup 254 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (1 << 21) | (1 << 16), "bgezc", "TB" }, 255 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (2 << 21) | (2 << 16), "bgezc", "TB" }, 256 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (3 << 21) | (3 << 16), "bgezc", "TB" }, 257 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (4 << 21) | (4 << 16), "bgezc", "TB" }, 258 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (5 << 21) | (5 << 16), "bgezc", "TB" }, 259 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (6 << 21) | (6 << 16), "bgezc", "TB" }, 260 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (7 << 21) | (7 << 16), "bgezc", "TB" }, 261 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (8 << 21) | (8 << 16), "bgezc", "TB" }, 262 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (9 << 21) | (9 << 16), "bgezc", "TB" }, 263 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (10 << 21) | (10 << 16), "bgezc", "TB" }, 264 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (11 << 21) | (11 << 16), "bgezc", "TB" }, 265 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (12 << 21) | (12 << 16), "bgezc", "TB" }, 266 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (13 << 21) | (13 << 16), "bgezc", "TB" }, 267 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (14 << 21) | (14 << 16), "bgezc", "TB" }, 268 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (15 << 21) | (15 << 16), "bgezc", "TB" }, 269 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (16 << 21) | (16 << 16), "bgezc", "TB" }, 270 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (17 << 21) | (17 << 16), "bgezc", "TB" }, 271 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (18 << 21) | (18 << 16), "bgezc", "TB" }, 272 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (19 << 21) | (19 << 16), "bgezc", "TB" }, 273 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (20 << 21) | (20 << 16), "bgezc", "TB" }, 274 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (21 << 21) | (21 << 16), "bgezc", "TB" }, 275 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (22 << 21) | (22 << 16), "bgezc", "TB" }, 276 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (23 << 21) | (23 << 16), "bgezc", "TB" }, 277 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (24 << 21) | (24 << 16), "bgezc", "TB" }, 278 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (25 << 21) | (25 << 16), "bgezc", "TB" }, 279 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (26 << 21) | (26 << 16), "bgezc", "TB" }, 280 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (27 << 21) | (27 << 16), "bgezc", "TB" }, 281 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (28 << 21) | (28 << 16), "bgezc", "TB" }, 282 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (29 << 21) | (29 << 16), "bgezc", "TB" }, 283 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (30 << 21) | (30 << 16), "bgezc", "TB" }, 284 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (31 << 21) | (31 << 16), "bgezc", "TB" }, 285 286 { kITypeMask, 22 << kOpcodeShift, "bgec", "STB" }, 287 288 { kITypeMask | (0x1f << 21), 23 << kOpcodeShift, "bgtzc", "TB" }, 289 290 // TODO: de-dup 291 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (1 << 21) | (1 << 16), "bltzc", "TB" }, 292 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (2 << 21) | (2 << 16), "bltzc", "TB" }, 293 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (3 << 21) | (3 << 16), "bltzc", "TB" }, 294 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (4 << 21) | (4 << 16), "bltzc", "TB" }, 295 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (5 << 21) | (5 << 16), "bltzc", "TB" }, 296 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (6 << 21) | (6 << 16), "bltzc", "TB" }, 297 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (7 << 21) | (7 << 16), "bltzc", "TB" }, 298 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (8 << 21) | (8 << 16), "bltzc", "TB" }, 299 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (9 << 21) | (9 << 16), "bltzc", "TB" }, 300 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (10 << 21) | (10 << 16), "bltzc", "TB" }, 301 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (11 << 21) | (11 << 16), "bltzc", "TB" }, 302 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (12 << 21) | (12 << 16), "bltzc", "TB" }, 303 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (13 << 21) | (13 << 16), "bltzc", "TB" }, 304 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (14 << 21) | (14 << 16), "bltzc", "TB" }, 305 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (15 << 21) | (15 << 16), "bltzc", "TB" }, 306 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (16 << 21) | (16 << 16), "bltzc", "TB" }, 307 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (17 << 21) | (17 << 16), "bltzc", "TB" }, 308 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (18 << 21) | (18 << 16), "bltzc", "TB" }, 309 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (19 << 21) | (19 << 16), "bltzc", "TB" }, 310 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (20 << 21) | (20 << 16), "bltzc", "TB" }, 311 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (21 << 21) | (21 << 16), "bltzc", "TB" }, 312 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (22 << 21) | (22 << 16), "bltzc", "TB" }, 313 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (23 << 21) | (23 << 16), "bltzc", "TB" }, 314 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (24 << 21) | (24 << 16), "bltzc", "TB" }, 315 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (25 << 21) | (25 << 16), "bltzc", "TB" }, 316 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (26 << 21) | (26 << 16), "bltzc", "TB" }, 317 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (27 << 21) | (27 << 16), "bltzc", "TB" }, 318 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (28 << 21) | (28 << 16), "bltzc", "TB" }, 319 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (29 << 21) | (29 << 16), "bltzc", "TB" }, 320 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (30 << 21) | (30 << 16), "bltzc", "TB" }, 321 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (31 << 21) | (31 << 16), "bltzc", "TB" }, 322 323 { kITypeMask, 23 << kOpcodeShift, "bltc", "STB" }, 324 325 { kITypeMask, 24 << kOpcodeShift, "bnec", "STB" }, 326 327 { kITypeMask, 25 << kOpcodeShift, "daddiu", "TSi", }, 328 { kITypeMask, 29 << kOpcodeShift, "daui", "TSi", }, 329 330 { kITypeMask, 32u << kOpcodeShift, "lb", "TO", }, 331 { kITypeMask, 33u << kOpcodeShift, "lh", "TO", }, 332 { kITypeMask, 34u << kOpcodeShift, "lwl", "TO", }, 333 { kITypeMask, 35u << kOpcodeShift, "lw", "TO", }, 334 { kITypeMask, 36u << kOpcodeShift, "lbu", "TO", }, 335 { kITypeMask, 37u << kOpcodeShift, "lhu", "TO", }, 336 { kITypeMask, 38u << kOpcodeShift, "lwr", "TO", }, 337 { kITypeMask, 39u << kOpcodeShift, "lwu", "TO", }, 338 { kITypeMask, 40u << kOpcodeShift, "sb", "TO", }, 339 { kITypeMask, 41u << kOpcodeShift, "sh", "TO", }, 340 { kITypeMask, 42u << kOpcodeShift, "swl", "TO", }, 341 { kITypeMask, 43u << kOpcodeShift, "sw", "TO", }, 342 { kITypeMask, 46u << kOpcodeShift, "swr", "TO", }, 343 { kITypeMask, 48u << kOpcodeShift, "ll", "TO", }, 344 { kITypeMask, 49u << kOpcodeShift, "lwc1", "tO", }, 345 { kJTypeMask, 50u << kOpcodeShift, "bc", "P" }, 346 { kITypeMask, 53u << kOpcodeShift, "ldc1", "tO", }, 347 { kITypeMask | (0x1f << 21), 54u << kOpcodeShift, "jic", "Ti" }, 348 { kITypeMask | (1 << 21), (54u << kOpcodeShift) | (1 << 21), "beqzc", "Sb" }, // TODO: de-dup? 349 { kITypeMask | (1 << 22), (54u << kOpcodeShift) | (1 << 22), "beqzc", "Sb" }, 350 { kITypeMask | (1 << 23), (54u << kOpcodeShift) | (1 << 23), "beqzc", "Sb" }, 351 { kITypeMask | (1 << 24), (54u << kOpcodeShift) | (1 << 24), "beqzc", "Sb" }, 352 { kITypeMask | (1 << 25), (54u << kOpcodeShift) | (1 << 25), "beqzc", "Sb" }, 353 { kITypeMask, 55u << kOpcodeShift, "ld", "TO", }, 354 { kITypeMask, 56u << kOpcodeShift, "sc", "TO", }, 355 { kITypeMask, 57u << kOpcodeShift, "swc1", "tO", }, 356 { kJTypeMask, 58u << kOpcodeShift, "balc", "P" }, 357 { kITypeMask | (0x1f << 16), (59u << kOpcodeShift) | (30 << 16), "auipc", "Si" }, 358 { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (0 << 19), "addiupc", "Sp" }, 359 { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (1 << 19), "lwpc", "So" }, 360 { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (2 << 19), "lwupc", "So" }, 361 { kITypeMask | (0x7 << 18), (59u << kOpcodeShift) | (6 << 18), "ldpc", "S0" }, 362 { kITypeMask, 61u << kOpcodeShift, "sdc1", "tO", }, 363 { kITypeMask | (0x1f << 21), 62u << kOpcodeShift, "jialc", "Ti" }, 364 { kITypeMask | (1 << 21), (62u << kOpcodeShift) | (1 << 21), "bnezc", "Sb" }, // TODO: de-dup? 365 { kITypeMask | (1 << 22), (62u << kOpcodeShift) | (1 << 22), "bnezc", "Sb" }, 366 { kITypeMask | (1 << 23), (62u << kOpcodeShift) | (1 << 23), "bnezc", "Sb" }, 367 { kITypeMask | (1 << 24), (62u << kOpcodeShift) | (1 << 24), "bnezc", "Sb" }, 368 { kITypeMask | (1 << 25), (62u << kOpcodeShift) | (1 << 25), "bnezc", "Sb" }, 369 { kITypeMask, 63u << kOpcodeShift, "sd", "TO", }, 370 371 // Floating point. 372 { kFpMask | (0x1f << 21), kCop1 | (0x00 << 21), "mfc1", "Td" }, 373 { kFpMask | (0x1f << 21), kCop1 | (0x01 << 21), "dmfc1", "Td" }, 374 { kFpMask | (0x1f << 21), kCop1 | (0x03 << 21), "mfhc1", "Td" }, 375 { kFpMask | (0x1f << 21), kCop1 | (0x04 << 21), "mtc1", "Td" }, 376 { kFpMask | (0x1f << 21), kCop1 | (0x05 << 21), "dmtc1", "Td" }, 377 { kFpMask | (0x1f << 21), kCop1 | (0x07 << 21), "mthc1", "Td" }, 378 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 1, "cmp.un.s", "adt" }, 379 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 2, "cmp.eq.s", "adt" }, 380 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 3, "cmp.ueq.s", "adt" }, 381 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 4, "cmp.lt.s", "adt" }, 382 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 5, "cmp.ult.s", "adt" }, 383 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 6, "cmp.le.s", "adt" }, 384 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 7, "cmp.ule.s", "adt" }, 385 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 17, "cmp.or.s", "adt" }, 386 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 18, "cmp.une.s", "adt" }, 387 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 19, "cmp.ne.s", "adt" }, 388 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 1, "cmp.un.d", "adt" }, 389 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 2, "cmp.eq.d", "adt" }, 390 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 3, "cmp.ueq.d", "adt" }, 391 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 4, "cmp.lt.d", "adt" }, 392 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 5, "cmp.ult.d", "adt" }, 393 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 6, "cmp.le.d", "adt" }, 394 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 7, "cmp.ule.d", "adt" }, 395 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 17, "cmp.or.d", "adt" }, 396 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 18, "cmp.une.d", "adt" }, 397 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 19, "cmp.ne.d", "adt" }, 398 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 0, "add", "fadt" }, 399 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 1, "sub", "fadt" }, 400 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 2, "mul", "fadt" }, 401 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 3, "div", "fadt" }, 402 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 4, "sqrt", "fad" }, 403 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 5, "abs", "fad" }, 404 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 6, "mov", "fad" }, 405 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 7, "neg", "fad" }, 406 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 8, "round.l", "fad" }, 407 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 9, "trunc.l", "fad" }, 408 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 10, "ceil.l", "fad" }, 409 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 11, "floor.l", "fad" }, 410 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 12, "round.w", "fad" }, 411 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 13, "trunc.w", "fad" }, 412 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 14, "ceil.w", "fad" }, 413 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 15, "floor.w", "fad" }, 414 { kFpMask | (0x201 << 16), kCop1 | (0x200 << 16) | 17, "movf", "fadc" }, 415 { kFpMask | (0x201 << 16), kCop1 | (0x201 << 16) | 17, "movt", "fadc" }, 416 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 18, "movz", "fadT" }, 417 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 19, "movn", "fadT" }, 418 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 20, "seleqz", "fadt" }, 419 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 23, "selnez", "fadt" }, 420 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 26, "rint", "fad" }, 421 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 27, "class", "fad" }, 422 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 32, "cvt.s", "fad" }, 423 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 33, "cvt.d", "fad" }, 424 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 36, "cvt.w", "fad" }, 425 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 37, "cvt.l", "fad" }, 426 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 38, "cvt.ps", "fad" }, 427 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 49, "c.un", "fCdt" }, 428 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 50, "c.eq", "fCdt" }, 429 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 51, "c.ueq", "fCdt" }, 430 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 52, "c.olt", "fCdt" }, 431 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 53, "c.ult", "fCdt" }, 432 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 54, "c.ole", "fCdt" }, 433 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 55, "c.ule", "fCdt" }, 434 { kFpMask, kCop1 | 0x10, "sel", "fadt" }, 435 { kFpMask, kCop1 | 0x1e, "max", "fadt" }, 436 { kFpMask, kCop1 | 0x1c, "min", "fadt" }, 437 438 // MSA instructions. 439 { kMsaMask | (0x1f << 21), kMsa | (0x0 << 21) | 0x1e, "and.v", "kmn" }, 440 { kMsaMask | (0x1f << 21), kMsa | (0x1 << 21) | 0x1e, "or.v", "kmn" }, 441 { kMsaMask | (0x1f << 21), kMsa | (0x2 << 21) | 0x1e, "nor.v", "kmn" }, 442 { kMsaMask | (0x1f << 21), kMsa | (0x3 << 21) | 0x1e, "xor.v", "kmn" }, 443 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0xe, "addv", "Vkmn" }, 444 { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0xe, "subv", "Vkmn" }, 445 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x12, "mulv", "Vkmn" }, 446 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x12, "div_s", "Vkmn" }, 447 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x12, "div_u", "Vkmn" }, 448 { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x12, "mod_s", "Vkmn" }, 449 { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x12, "mod_u", "Vkmn" }, 450 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x10, "add_a", "Vkmn" }, 451 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x10, "ave_s", "Vkmn" }, 452 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x10, "ave_u", "Vkmn" }, 453 { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x10, "aver_s", "Vkmn" }, 454 { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x10, "aver_u", "Vkmn" }, 455 { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0xe, "max_s", "Vkmn" }, 456 { kMsaMask | (0x7 << 23), kMsa | (0x3 << 23) | 0xe, "max_u", "Vkmn" }, 457 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0xe, "min_s", "Vkmn" }, 458 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0xe, "min_u", "Vkmn" }, 459 { kMsaMask | (0xf << 22), kMsa | (0x0 << 22) | 0x1b, "fadd", "Ukmn" }, 460 { kMsaMask | (0xf << 22), kMsa | (0x1 << 22) | 0x1b, "fsub", "Ukmn" }, 461 { kMsaMask | (0xf << 22), kMsa | (0x2 << 22) | 0x1b, "fmul", "Ukmn" }, 462 { kMsaMask | (0xf << 22), kMsa | (0x3 << 22) | 0x1b, "fdiv", "Ukmn" }, 463 { kMsaMask | (0xf << 22), kMsa | (0xe << 22) | 0x1b, "fmax", "Ukmn" }, 464 { kMsaMask | (0xf << 22), kMsa | (0xc << 22) | 0x1b, "fmin", "Ukmn" }, 465 { kMsaMask | (0x1ff << 17), kMsa | (0x19e << 17) | 0x1e, "ffint_s", "ukm" }, 466 { kMsaMask | (0x1ff << 17), kMsa | (0x19c << 17) | 0x1e, "ftint_s", "ukm" }, 467 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0xd, "sll", "Vkmn" }, 468 { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0xd, "sra", "Vkmn" }, 469 { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0xd, "srl", "Vkmn" }, 470 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x9, "slli", "kmW" }, 471 { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0x9, "srai", "kmW" }, 472 { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0x9, "srli", "kmW" }, 473 { kMsaMask | (0x3ff << 16), kMsa | (0xbe << 16) | 0x19, "move.v", "km" }, 474 { kMsaMask | (0xf << 22), kMsa | (0x1 << 22) | 0x19, "splati", "kX" }, 475 { kMsaMask | (0xff << 18), kMsa | (0xc0 << 18) | 0x1e, "fill", "vkD" }, 476 { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x7, "ldi", "kx" }, 477 { kMsaSpecialMask | (0xf << 2), kMsa | (0x8 << 2), "ld", "kw" }, 478 { kMsaSpecialMask | (0xf << 2), kMsa | (0x9 << 2), "st", "kw" }, 479 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x14, "ilvr", "Vkmn" }, 480 }; 481 482 static uint32_t ReadU32(const uint8_t* ptr) { 483 // We only support little-endian MIPS. 484 return ptr[0] | (ptr[1] << 8) | (ptr[2] << 16) | (ptr[3] << 24); 485 } 486 487 const char* DisassemblerMips::RegName(uint32_t reg) { 488 if (is_o32_abi_) { 489 return gO32AbiRegNames[reg]; 490 } else { 491 return gN64AbiRegNames[reg]; 492 } 493 } 494 495 size_t DisassemblerMips::Dump(std::ostream& os, const uint8_t* instr_ptr) { 496 uint32_t instruction = ReadU32(instr_ptr); 497 498 uint32_t rs = (instruction >> 21) & 0x1f; // I-type, R-type. 499 uint32_t rt = (instruction >> 16) & 0x1f; // I-type, R-type. 500 uint32_t rd = (instruction >> 11) & 0x1f; // R-type. 501 uint32_t sa = (instruction >> 6) & 0x1f; // R-type. 502 503 std::string opcode; 504 std::ostringstream args; 505 506 // TODO: remove this! 507 uint32_t op = (instruction >> 26) & 0x3f; 508 uint32_t function = (instruction & 0x3f); // R-type. 509 opcode = StringPrintf("op=%d fn=%d", op, function); 510 511 for (size_t i = 0; i < arraysize(gMipsInstructions); ++i) { 512 if (gMipsInstructions[i].Matches(instruction)) { 513 opcode = gMipsInstructions[i].name; 514 for (const char* args_fmt = gMipsInstructions[i].args_fmt; *args_fmt; ++args_fmt) { 515 switch (*args_fmt) { 516 case 'A': // sa (shift amount or [d]ins/[d]ext position). 517 args << sa; 518 break; 519 case 'B': // Branch offset. 520 { 521 int32_t offset = static_cast<int16_t>(instruction & 0xffff); 522 offset <<= 2; 523 offset += 4; // Delay slot. 524 args << FormatInstructionPointer(instr_ptr + offset) 525 << StringPrintf(" ; %+d", offset); 526 } 527 break; 528 case 'b': // 21-bit branch offset. 529 { 530 int32_t offset = (instruction & 0x1fffff) - ((instruction & 0x100000) << 1); 531 offset <<= 2; 532 offset += 4; // Delay slot. 533 args << FormatInstructionPointer(instr_ptr + offset) 534 << StringPrintf(" ; %+d", offset); 535 } 536 break; 537 case 'C': // Floating-point condition code flag in c.<cond>.fmt. 538 args << "cc" << (sa >> 2); 539 break; 540 case 'c': // Floating-point condition code flag in bc1f/bc1t and movf/movt. 541 args << "cc" << (rt >> 2); 542 break; 543 case 'D': args << RegName(rd); break; 544 case 'd': args << 'f' << rd; break; 545 case 'a': args << 'f' << sa; break; 546 case 'F': args << (sa + 32); break; // dinsu position. 547 case 'f': // Floating point "fmt". 548 { 549 size_t fmt = (instruction >> 21) & 0x7; // TODO: other fmts? 550 switch (fmt) { 551 case 0: opcode += ".s"; break; 552 case 1: opcode += ".d"; break; 553 case 4: opcode += ".w"; break; 554 case 5: opcode += ".l"; break; 555 case 6: opcode += ".ps"; break; 556 default: opcode += ".?"; break; 557 } 558 continue; // No ", ". 559 } 560 case 'i': // Sign-extended lower 16-bit immediate. 561 args << static_cast<int16_t>(instruction & 0xffff); 562 break; 563 case 'j': // sa value for lsa/dlsa. 564 args << (sa + 1); 565 break; 566 case 'L': // Jump label. 567 { 568 // TODO: is this right? 569 uint32_t instr_index = (instruction & 0x1ffffff); 570 uint32_t target = (instr_index << 2); 571 target |= (reinterpret_cast<uintptr_t>(instr_ptr + 4) & 0xf0000000); 572 args << reinterpret_cast<void*>(target); 573 } 574 break; 575 case 'l': // 9-bit signed offset 576 { 577 int32_t offset = static_cast<int16_t>(instruction) >> 7; 578 args << StringPrintf("%+d(%s)", offset, RegName(rs)); 579 } 580 break; 581 case 'O': // +x(rs) 582 { 583 int32_t offset = static_cast<int16_t>(instruction & 0xffff); 584 args << StringPrintf("%+d(%s)", offset, RegName(rs)); 585 if (rs == 17) { 586 args << " ; "; 587 GetDisassemblerOptions()->thread_offset_name_function_(args, offset); 588 } 589 } 590 break; 591 case 'o': // 19-bit offset in lwpc and lwupc. 592 { 593 int32_t offset = (instruction & 0x7ffff) - ((instruction & 0x40000) << 1); 594 offset <<= 2; 595 args << FormatInstructionPointer(instr_ptr + offset); 596 args << StringPrintf(" ; %+d", offset); 597 } 598 break; 599 case '0': // 18-bit offset in ldpc. 600 { 601 int32_t offset = (instruction & 0x3ffff) - ((instruction & 0x20000) << 1); 602 offset <<= 3; 603 uintptr_t ptr = RoundDown(reinterpret_cast<uintptr_t>(instr_ptr), 8); 604 args << FormatInstructionPointer(reinterpret_cast<const uint8_t*>(ptr + offset)); 605 args << StringPrintf(" ; %+d", offset); 606 } 607 break; 608 case 'P': // 26-bit offset in bc and balc. 609 { 610 int32_t offset = (instruction & 0x3ffffff) - ((instruction & 0x2000000) << 1); 611 offset <<= 2; 612 offset += 4; 613 args << FormatInstructionPointer(instr_ptr + offset); 614 args << StringPrintf(" ; %+d", offset); 615 } 616 break; 617 case 'p': // 19-bit offset in addiupc. 618 { 619 int32_t offset = (instruction & 0x7ffff) - ((instruction & 0x40000) << 1); 620 args << offset << " ; move " << RegName(rs) << ", "; 621 args << FormatInstructionPointer(instr_ptr + (offset << 2)); 622 } 623 break; 624 case 'S': args << RegName(rs); break; 625 case 's': args << 'f' << rs; break; 626 case 'T': args << RegName(rt); break; 627 case 't': args << 'f' << rt; break; 628 case 'Z': args << (rd + 1); break; // sz ([d]ext size). 629 case 'z': args << (rd - sa + 1); break; // sz ([d]ins, dinsu size). 630 case 'k': args << 'w' << sa; break; 631 case 'm': args << 'w' << rd; break; 632 case 'n': args << 'w' << rt; break; 633 case 'U': // MSA 1-bit df (word/doubleword), position 21. 634 { 635 int32_t df = (instruction >> 21) & 0x1; 636 switch (df) { 637 case 0: opcode += ".w"; break; 638 case 1: opcode += ".d"; break; 639 } 640 continue; // No ", ". 641 } 642 case 'u': // MSA 1-bit df (word/doubleword), position 16. 643 { 644 int32_t df = (instruction >> 16) & 0x1; 645 switch (df) { 646 case 0: opcode += ".w"; break; 647 case 1: opcode += ".d"; break; 648 } 649 continue; // No ", ". 650 } 651 case 'V': // MSA 2-bit df, position 21. 652 { 653 int32_t df = (instruction >> 21) & 0x3; 654 switch (df) { 655 case 0: opcode += ".b"; break; 656 case 1: opcode += ".h"; break; 657 case 2: opcode += ".w"; break; 658 case 3: opcode += ".d"; break; 659 } 660 continue; // No ", ". 661 } 662 case 'v': // MSA 2-bit df, position 16. 663 { 664 int32_t df = (instruction >> 16) & 0x3; 665 switch (df) { 666 case 0: opcode += ".b"; break; 667 case 1: opcode += ".h"; break; 668 case 2: opcode += ".w"; break; 669 case 3: opcode += ".d"; break; 670 } 671 continue; // No ", ". 672 } 673 case 'W': // MSA df/m. 674 { 675 int32_t df_m = (instruction >> 16) & 0x7f; 676 if ((df_m & (0x1 << 6)) == 0) { 677 opcode += ".d"; 678 args << (df_m & 0x3f); 679 break; 680 } 681 if ((df_m & (0x1 << 5)) == 0) { 682 opcode += ".w"; 683 args << (df_m & 0x1f); 684 break; 685 } 686 if ((df_m & (0x1 << 4)) == 0) { 687 opcode += ".h"; 688 args << (df_m & 0xf); 689 break; 690 } 691 if ((df_m & (0x1 << 3)) == 0) { 692 opcode += ".b"; 693 args << (df_m & 0x7); 694 } 695 break; 696 } 697 case 'w': // MSA +x(rs). 698 { 699 int32_t df = instruction & 0x3; 700 int32_t s10 = (instruction >> 16) & 0x3ff; 701 s10 -= (s10 & 0x200) << 1; // Sign-extend s10. 702 switch (df) { 703 case 0: opcode += ".b"; break; 704 case 1: opcode += ".h"; break; 705 case 2: opcode += ".w"; break; 706 case 3: opcode += ".d"; break; 707 } 708 args << StringPrintf("%+d(%s)", s10 << df, RegName(rd)); 709 break; 710 } 711 case 'X': // MSA df/n - ws[x]. 712 { 713 int32_t df_n = (instruction >> 16) & 0x3f; 714 if ((df_n & (0x3 << 4)) == 0) { 715 opcode += ".b"; 716 args << 'w' << rd << '[' << (df_n & 0xf) << ']'; 717 break; 718 } 719 if ((df_n & (0x3 << 3)) == 0) { 720 opcode += ".h"; 721 args << 'w' << rd << '[' << (df_n & 0x7) << ']'; 722 break; 723 } 724 if ((df_n & (0x3 << 2)) == 0) { 725 opcode += ".w"; 726 args << 'w' << rd << '[' << (df_n & 0x3) << ']'; 727 break; 728 } 729 if ((df_n & (0x3 << 1)) == 0) { 730 opcode += ".d"; 731 args << 'w' << rd << '[' << (df_n & 0x1) << ']'; 732 } 733 break; 734 } 735 case 'x': // MSA i10. 736 { 737 int32_t df = (instruction >> 21) & 0x3; 738 int32_t i10 = (instruction >> 11) & 0x3ff; 739 i10 -= (i10 & 0x200) << 1; // Sign-extend i10. 740 switch (df) { 741 case 0: opcode += ".b"; break; 742 case 1: opcode += ".h"; break; 743 case 2: opcode += ".w"; break; 744 case 3: opcode += ".d"; break; 745 } 746 args << i10; 747 break; 748 } 749 } 750 if (*(args_fmt + 1)) { 751 args << ", "; 752 } 753 } 754 break; 755 } 756 } 757 758 // Special cases for sequences of: 759 // pc-relative +/- 2GB branch: 760 // auipc reg, imm 761 // jic reg, imm 762 // pc-relative +/- 2GB branch and link: 763 // auipc reg, imm 764 // jialc reg, imm 765 if (((op == 0x36 || op == 0x3E) && rs == 0 && rt != 0) && // ji[al]c 766 last_ptr_ && (intptr_t)instr_ptr - (intptr_t)last_ptr_ == 4 && 767 (last_instr_ & 0xFC1F0000) == 0xEC1E0000 && // auipc 768 ((last_instr_ >> 21) & 0x1F) == rt) { 769 uint32_t offset = (last_instr_ << 16) | (instruction & 0xFFFF); 770 offset -= (offset & 0x8000) << 1; 771 offset -= 4; 772 if (op == 0x36) { 773 args << " ; bc "; 774 } else { 775 args << " ; balc "; 776 } 777 args << FormatInstructionPointer(instr_ptr + (int32_t)offset); 778 args << StringPrintf(" ; %+d", (int32_t)offset); 779 } 780 781 os << FormatInstructionPointer(instr_ptr) 782 << StringPrintf(": %08x\t%-7s ", instruction, opcode.c_str()) 783 << args.str() << '\n'; 784 last_ptr_ = instr_ptr; 785 last_instr_ = instruction; 786 return 4; 787 } 788 789 void DisassemblerMips::Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) { 790 for (const uint8_t* cur = begin; cur < end; cur += 4) { 791 Dump(os, cur); 792 } 793 } 794 795 } // namespace mips 796 } // namespace art 797
