1 %default {"opcode":"lsl"} 2 /* 3 * Generic 64-bit shift operation. 4 */ 5 /* binop/2addr vA, vB */ 6 lsr w1, wINST, #12 // w1<- B 7 ubfx w2, wINST, #8, #4 // w2<- A 8 GET_VREG w1, w1 // x1<- vB 9 GET_VREG_WIDE x0, w2 // x0<- vA 10 FETCH_ADVANCE_INST 1 // advance rPC, load rINST 11 $opcode x0, x0, x1 // Do the shift. Only low 6 bits of x1 are used. 12 GET_INST_OPCODE ip // extract opcode from rINST 13 SET_VREG_WIDE x0, w2 // vAA<- result 14 GOTO_OPCODE ip // jump to next instruction 15 /* 10-13 instructions */ 16
