1 %default {"result":"","rem":"0"} 2 /* 3 * 32-bit binary div/rem operation. Handles special case of op1=-1. 4 */ 5 /* div/rem/lit16 vA, vB, #+CCCC */ 6 /* Need A in rINST, ssssCCCC in ecx, vB in eax */ 7 movl rINST, %eax # rax <- 000000BA 8 sarl $$4, %eax # eax <- B 9 GET_VREG %eax, %rax # eax <- vB 10 movswl 2(rPC), %ecx # ecx <- ssssCCCC 11 andb $$0xf, rINSTbl # rINST <- A 12 testl %ecx, %ecx 13 jz common_errDivideByZero 14 cmpl $$-1, %ecx 15 je 2f 16 cdq # rax <- sign-extended of eax 17 idivl %ecx 18 1: 19 SET_VREG $result, rINSTq # vA <- result 20 ADVANCE_PC_FETCH_AND_GOTO_NEXT 2 21 2: 22 .if $rem 23 xorl $result, $result 24 .else 25 negl $result 26 .endif 27 jmp 1b 28
