1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef __BL_COMMON_H__ 32 #define __BL_COMMON_H__ 33 34 #define SECURE 0x0 35 #define NON_SECURE 0x1 36 #define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE)) 37 38 #define UP 1 39 #define DOWN 0 40 41 /******************************************************************************* 42 * Constants to identify the location of a memory region in a given memory 43 * layout. 44 ******************************************************************************/ 45 #define TOP 0x1 46 #define BOTTOM !TOP 47 48 /****************************************************************************** 49 * Opcode passed in x0 to tell next EL that we want to run an image. 50 * Corresponds to the function ID of the only SMC that the BL1 exception 51 * handlers service. That's why the chosen value is the first function ID of 52 * the ARM SMC64 range. 53 *****************************************************************************/ 54 #define RUN_IMAGE 0xC0000000 55 56 /******************************************************************************* 57 * Constants that allow assembler code to access members of and the 58 * 'entry_point_info' structure at their correct offsets. 59 ******************************************************************************/ 60 #define ENTRY_POINT_INFO_PC_OFFSET 0x08 61 #define ENTRY_POINT_INFO_ARGS_OFFSET 0x18 62 63 #define PARAM_EP_SECURITY_MASK 0x1 64 #define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK) 65 #define SET_SECURITY_STATE(x, security) \ 66 ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security)) 67 68 #define EP_EE_MASK 0x2 69 #define EP_EE_LITTLE 0x0 70 #define EP_EE_BIG 0x2 71 #define EP_GET_EE(x) (x & EP_EE_MASK) 72 #define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee)) 73 74 #define EP_ST_MASK 0x4 75 #define EP_ST_DISABLE 0x0 76 #define EP_ST_ENABLE 0x4 77 #define EP_GET_ST(x) (x & EP_ST_MASK) 78 #define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee)) 79 80 #define PARAM_EP 0x01 81 #define PARAM_IMAGE_BINARY 0x02 82 #define PARAM_BL31 0x03 83 84 #define VERSION_1 0x01 85 86 #define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \ 87 (_p)->h.type = (uint8_t)(_type); \ 88 (_p)->h.version = (uint8_t)(_ver); \ 89 (_p)->h.size = (uint16_t)sizeof(*_p); \ 90 (_p)->h.attr = (uint32_t)(_attr) ; \ 91 } while (0) 92 93 /******************************************************************************* 94 * Constant that indicates if this is the first version of the reset handler 95 * contained in an image. This will be the case when the image is BL1 or when 96 * its BL3-1 and RESET_TO_BL31 is true. This constant enables a subsequent 97 * version of the reset handler to perform actions that override the ones 98 * performed in the first version of the code. This will be required when the 99 * first version exists in an un-modifiable image e.g. a BootROM image. 100 ******************************************************************************/ 101 #if IMAGE_BL1 || (IMAGE_BL31 && RESET_TO_BL31) 102 #define FIRST_RESET_HANDLER_CALL 103 #endif 104 105 #ifndef __ASSEMBLY__ 106 #include <cdefs.h> /* For __dead2 */ 107 #include <cassert.h> 108 #include <stdint.h> 109 #include <stddef.h> 110 111 /******************************************************************************* 112 * Structure used for telling the next BL how much of a particular type of 113 * memory is available for its use and how much is already used. 114 ******************************************************************************/ 115 typedef struct meminfo { 116 uint64_t total_base; 117 size_t total_size; 118 uint64_t free_base; 119 size_t free_size; 120 } meminfo_t; 121 122 typedef struct aapcs64_params { 123 unsigned long arg0; 124 unsigned long arg1; 125 unsigned long arg2; 126 unsigned long arg3; 127 unsigned long arg4; 128 unsigned long arg5; 129 unsigned long arg6; 130 unsigned long arg7; 131 } aapcs64_params_t; 132 133 /*************************************************************************** 134 * This structure provides version information and the size of the 135 * structure, attributes for the structure it represents 136 ***************************************************************************/ 137 typedef struct param_header { 138 uint8_t type; /* type of the structure */ 139 uint8_t version; /* version of this structure */ 140 uint16_t size; /* size of this structure in bytes */ 141 uint32_t attr; /* attributes: unused bits SBZ */ 142 } param_header_t; 143 144 /***************************************************************************** 145 * This structure represents the superset of information needed while 146 * switching exception levels. The only two mechanisms to do so are 147 * ERET & SMC. Security state is indicated using bit zero of header 148 * attribute 149 * NOTE: BL1 expects entrypoint followed by spsr while processing 150 * SMC to jump to BL31 from the start of entry_point_info 151 *****************************************************************************/ 152 typedef struct entry_point_info { 153 param_header_t h; 154 uintptr_t pc; 155 uint32_t spsr; 156 aapcs64_params_t args; 157 } entry_point_info_t; 158 159 /***************************************************************************** 160 * Image info binary provides information from the image loader that 161 * can be used by the firmware to manage available trusted RAM. 162 * More advanced firmware image formats can provide additional 163 * information that enables optimization or greater flexibility in the 164 * common firmware code 165 *****************************************************************************/ 166 typedef struct image_info { 167 param_header_t h; 168 uintptr_t image_base; /* physical address of base of image */ 169 uint32_t image_size; /* bytes read from image file */ 170 } image_info_t; 171 172 /******************************************************************************* 173 * This structure represents the superset of information that can be passed to 174 * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be 175 * populated only if BL2 detects its presence. A pointer to a structure of this 176 * type should be passed in X3 to BL31's cold boot entrypoint 177 * 178 * Use of this structure and the X3 parameter is not mandatory: the BL3-1 179 * platform code can use other mechanisms to provide the necessary information 180 * about BL3-2 and BL3-3 to the common and SPD code. 181 * 182 * BL3-1 image information is mandatory if this structure is used. If either of 183 * the optional BL3-2 and BL3-3 image information is not provided, this is 184 * indicated by the respective image_info pointers being zero. 185 ******************************************************************************/ 186 typedef struct bl31_params { 187 param_header_t h; 188 image_info_t *bl31_image_info; 189 entry_point_info_t *bl32_ep_info; 190 image_info_t *bl32_image_info; 191 entry_point_info_t *bl33_ep_info; 192 image_info_t *bl33_image_info; 193 } bl31_params_t; 194 195 196 /* 197 * Compile time assertions related to the 'entry_point_info' structure to 198 * ensure that the assembler and the compiler view of the offsets of 199 * the structure members is the same. 200 */ 201 CASSERT(ENTRY_POINT_INFO_PC_OFFSET == 202 __builtin_offsetof(entry_point_info_t, pc), \ 203 assert_BL31_pc_offset_mismatch); 204 205 CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \ 206 __builtin_offsetof(entry_point_info_t, args), \ 207 assert_BL31_args_offset_mismatch); 208 209 CASSERT(sizeof(unsigned long) == 210 __builtin_offsetof(entry_point_info_t, spsr) - \ 211 __builtin_offsetof(entry_point_info_t, pc), \ 212 assert_entrypoint_and_spsr_should_be_adjacent); 213 214 /******************************************************************************* 215 * Function & variable prototypes 216 ******************************************************************************/ 217 unsigned long page_align(unsigned long, unsigned); 218 void change_security_state(unsigned int); 219 unsigned long image_size(const char *); 220 int load_image(meminfo_t *mem_layout, 221 const char *image_name, 222 uint64_t image_base, 223 image_info_t *image_data, 224 entry_point_info_t *entry_point_info); 225 extern const char build_message[]; 226 extern const char version_string[]; 227 228 void reserve_mem(uint64_t *free_base, size_t *free_size, 229 uint64_t addr, size_t size); 230 231 #endif /*__ASSEMBLY__*/ 232 233 #endif /* __BL_COMMON_H__ */ 234
