1 /* 2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch_helpers.h> 32 #include <assert.h> 33 #include <bl_common.h> 34 #include <context_mgmt.h> 35 #include <string.h> 36 #include "tspd_private.h" 37 38 /******************************************************************************* 39 * Given a secure payload entrypoint info pointer, entry point PC, register 40 * width, cpu id & pointer to a context data structure, this function will 41 * initialize tsp context and entry point info for the secure payload 42 ******************************************************************************/ 43 void tspd_init_tsp_ep_state(struct entry_point_info *tsp_entry_point, 44 uint32_t rw, 45 uint64_t pc, 46 tsp_context_t *tsp_ctx) 47 { 48 uint32_t ep_attr; 49 50 /* Passing a NULL context is a critical programming error */ 51 assert(tsp_ctx); 52 assert(tsp_entry_point); 53 assert(pc); 54 55 /* 56 * We support AArch64 TSP for now. 57 * TODO: Add support for AArch32 TSP 58 */ 59 assert(rw == TSP_AARCH64); 60 61 /* Associate this context with the cpu specified */ 62 tsp_ctx->mpidr = read_mpidr_el1(); 63 tsp_ctx->state = 0; 64 set_tsp_pstate(tsp_ctx->state, TSP_PSTATE_OFF); 65 clr_std_smc_active_flag(tsp_ctx->state); 66 67 cm_set_context(&tsp_ctx->cpu_ctx, SECURE); 68 69 /* initialise an entrypoint to set up the CPU context */ 70 ep_attr = SECURE | EP_ST_ENABLE; 71 if (read_sctlr_el3() & SCTLR_EE_BIT) 72 ep_attr |= EP_EE_BIG; 73 SET_PARAM_HEAD(tsp_entry_point, PARAM_EP, VERSION_1, ep_attr); 74 75 tsp_entry_point->pc = pc; 76 tsp_entry_point->spsr = SPSR_64(MODE_EL1, 77 MODE_SP_ELX, 78 DISABLE_ALL_EXCEPTIONS); 79 memset(&tsp_entry_point->args, 0, sizeof(tsp_entry_point->args)); 80 } 81 82 /******************************************************************************* 83 * This function takes an SP context pointer and: 84 * 1. Applies the S-EL1 system register context from tsp_ctx->cpu_ctx. 85 * 2. Saves the current C runtime state (callee saved registers) on the stack 86 * frame and saves a reference to this state. 87 * 3. Calls el3_exit() so that the EL3 system and general purpose registers 88 * from the tsp_ctx->cpu_ctx are used to enter the secure payload image. 89 ******************************************************************************/ 90 uint64_t tspd_synchronous_sp_entry(tsp_context_t *tsp_ctx) 91 { 92 uint64_t rc; 93 94 assert(tsp_ctx != NULL); 95 assert(tsp_ctx->c_rt_ctx == 0); 96 97 /* Apply the Secure EL1 system register context and switch to it */ 98 assert(cm_get_context(SECURE) == &tsp_ctx->cpu_ctx); 99 cm_el1_sysregs_context_restore(SECURE); 100 cm_set_next_eret_context(SECURE); 101 102 rc = tspd_enter_sp(&tsp_ctx->c_rt_ctx); 103 #if DEBUG 104 tsp_ctx->c_rt_ctx = 0; 105 #endif 106 107 return rc; 108 } 109 110 111 /******************************************************************************* 112 * This function takes an SP context pointer and: 113 * 1. Saves the S-EL1 system register context tp tsp_ctx->cpu_ctx. 114 * 2. Restores the current C runtime state (callee saved registers) from the 115 * stack frame using the reference to this state saved in tspd_enter_sp(). 116 * 3. It does not need to save any general purpose or EL3 system register state 117 * as the generic smc entry routine should have saved those. 118 ******************************************************************************/ 119 void tspd_synchronous_sp_exit(tsp_context_t *tsp_ctx, uint64_t ret) 120 { 121 assert(tsp_ctx != NULL); 122 /* Save the Secure EL1 system register context */ 123 assert(cm_get_context(SECURE) == &tsp_ctx->cpu_ctx); 124 cm_el1_sysregs_context_save(SECURE); 125 126 assert(tsp_ctx->c_rt_ctx != 0); 127 tspd_exit_sp(tsp_ctx->c_rt_ctx, ret); 128 129 /* Should never reach here */ 130 assert(0); 131 } 132
