1 /** @file Lcd.c 2 3 Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR> 4 5 This program and the accompanying materials 6 are licensed and made available under the terms and conditions of the BSD License 7 which accompanies this distribution. The full text of the license may be found at 8 http://opensource.org/licenses/bsd-license.php 9 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 13 **/ 14 15 #include <Library/DebugLib.h> 16 #include <Library/IoLib.h> 17 #include <Library/LcdPlatformLib.h> 18 #include <Library/MemoryAllocationLib.h> 19 #include <Library/PcdLib.h> 20 21 #include <Drivers/HdLcd.h> 22 23 #include "LcdGraphicsOutputDxe.h" 24 25 /********************************************************************** 26 * 27 * This file contains all the bits of the Lcd that are 28 * platform independent. 29 * 30 **********************************************************************/ 31 32 EFI_STATUS 33 LcdInitialize ( 34 IN EFI_PHYSICAL_ADDRESS VramBaseAddress 35 ) 36 { 37 // Disable the controller 38 MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE); 39 40 // Disable all interrupts 41 MmioWrite32(HDLCD_REG_INT_MASK, 0); 42 43 // Define start of the VRAM. This never changes for any graphics mode 44 MmioWrite32(HDLCD_REG_FB_BASE, (UINT32) VramBaseAddress); 45 46 // Setup various registers that never change 47 MmioWrite32(HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8); 48 MmioWrite32(HDLCD_REG_POLARITIES, HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | HDLCD_VSYNC_HIGH); 49 MmioWrite32(HDLCD_REG_PIXEL_FORMAT, HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL); 50 MmioWrite32(HDLCD_REG_RED_SELECT, (0 << 16 | 8 << 8 | 0)); 51 MmioWrite32(HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8)); 52 MmioWrite32(HDLCD_REG_BLUE_SELECT, (0 << 16 | 8 << 8 | 16)); 53 54 return EFI_SUCCESS; 55 } 56 57 EFI_STATUS 58 LcdSetMode ( 59 IN UINT32 ModeNumber 60 ) 61 { 62 EFI_STATUS Status; 63 UINT32 HRes; 64 UINT32 HSync; 65 UINT32 HBackPorch; 66 UINT32 HFrontPorch; 67 UINT32 VRes; 68 UINT32 VSync; 69 UINT32 VBackPorch; 70 UINT32 VFrontPorch; 71 UINT32 BytesPerPixel; 72 LCD_BPP LcdBpp; 73 74 75 // Set the video mode timings and other relevant information 76 Status = LcdPlatformGetTimings (ModeNumber, 77 &HRes,&HSync,&HBackPorch,&HFrontPorch, 78 &VRes,&VSync,&VBackPorch,&VFrontPorch); 79 ASSERT_EFI_ERROR (Status); 80 if (EFI_ERROR( Status )) { 81 return EFI_DEVICE_ERROR; 82 } 83 84 Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp); 85 ASSERT_EFI_ERROR (Status); 86 if (EFI_ERROR( Status )) { 87 return EFI_DEVICE_ERROR; 88 } 89 90 BytesPerPixel = GetBytesPerPixel(LcdBpp); 91 92 // Disable the controller 93 MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE); 94 95 // Update the frame buffer information with the new settings 96 MmioWrite32(HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel); 97 MmioWrite32(HDLCD_REG_FB_LINE_PITCH, HRes * BytesPerPixel); 98 MmioWrite32(HDLCD_REG_FB_LINE_COUNT, VRes - 1); 99 100 // Set the vertical timing information 101 MmioWrite32(HDLCD_REG_V_SYNC, VSync); 102 MmioWrite32(HDLCD_REG_V_BACK_PORCH, VBackPorch); 103 MmioWrite32(HDLCD_REG_V_DATA, VRes - 1); 104 MmioWrite32(HDLCD_REG_V_FRONT_PORCH, VFrontPorch); 105 106 // Set the horizontal timing information 107 MmioWrite32(HDLCD_REG_H_SYNC, HSync); 108 MmioWrite32(HDLCD_REG_H_BACK_PORCH, HBackPorch); 109 MmioWrite32(HDLCD_REG_H_DATA, HRes - 1); 110 MmioWrite32(HDLCD_REG_H_FRONT_PORCH, HFrontPorch); 111 112 // Enable the controller 113 MmioWrite32(HDLCD_REG_COMMAND, HDLCD_ENABLE); 114 115 return EFI_SUCCESS; 116 } 117 118 VOID 119 LcdShutdown ( 120 VOID 121 ) 122 { 123 // Disable the controller 124 MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE); 125 } 126 127 EFI_STATUS 128 LcdIdentify ( 129 VOID 130 ) 131 { 132 return EFI_SUCCESS; 133 } 134
