1 /*++ 2 3 Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR> 4 This program and the accompanying materials 5 are licensed and made available under the terms and conditions of the BSD License 6 which accompanies this distribution. The full text of the license may be found at 7 http://opensource.org/licenses/bsd-license.php 8 9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11 12 13 Module Name: 14 15 IoHighLevel.c 16 17 Abstract: 18 19 High-level Io/Mmio functions. 20 21 --*/ 22 23 #include "DxeCpuIoLibInternal.h" 24 25 // 26 // Globle varible to cache pointer to CpuIo protocol. 27 // 28 STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL; 29 30 /** 31 The constructor function caches the pointer to CpuIo protocol. 32 33 The constructor function locates CpuIo protocol from protocol database. 34 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS. 35 36 @param ImageHandle The firmware allocated handle for the EFI image. 37 @param SystemTable A pointer to the EFI System Table. 38 39 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. 40 41 **/ 42 EFI_STATUS 43 EFIAPI 44 IoLibConstructor ( 45 IN EFI_HANDLE ImageHandle, 46 IN EFI_SYSTEM_TABLE *SystemTable 47 ) 48 { 49 EFI_STATUS Status; 50 51 Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID**) &mCpuIo); 52 ASSERT_EFI_ERROR (Status); 53 54 return Status; 55 } 56 57 /** 58 Reads registers in the EFI CPU I/O space. 59 60 Reads the I/O port specified by Port with registers width specified by Width. 61 The read value is returned. If such operations are not supported, then ASSERT(). 62 This function must guarantee that all I/O read and write operations are serialized. 63 64 @param Port The base address of the I/O operation. 65 The caller is responsible for aligning the Address if required. 66 @param Width The width of the I/O operation. 67 68 @return Data read from registers in the EFI CPU I/O space. 69 70 **/ 71 UINT64 72 EFIAPI 73 IoReadWorker ( 74 IN UINTN Port, 75 IN EFI_CPU_IO_PROTOCOL_WIDTH Width 76 ) 77 { 78 EFI_STATUS Status; 79 UINT64 Data; 80 81 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data); 82 ASSERT_EFI_ERROR (Status); 83 84 return Data; 85 } 86 87 /** 88 Writes registers in the EFI CPU I/O space. 89 90 Writes the I/O port specified by Port with registers width and value specified by Width 91 and Data respectively. Data is returned. If such operations are not supported, then ASSERT(). 92 This function must guarantee that all I/O read and write operations are serialized. 93 94 @param Port The base address of the I/O operation. 95 The caller is responsible for aligning the Address if required. 96 @param Width The width of the I/O operation. 97 @param Data The value to write to the I/O port. 98 99 @return The paramter of Data. 100 101 **/ 102 UINT64 103 EFIAPI 104 IoWriteWorker ( 105 IN UINTN Port, 106 IN EFI_CPU_IO_PROTOCOL_WIDTH Width, 107 IN UINT64 Data 108 ) 109 { 110 EFI_STATUS Status; 111 112 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data); 113 ASSERT_EFI_ERROR (Status); 114 115 return Data; 116 } 117 118 /** 119 Reads memory-mapped registers in the EFI system memory space. 120 121 Reads the MMIO registers specified by Address with registers width specified by Width. 122 The read value is returned. If such operations are not supported, then ASSERT(). 123 This function must guarantee that all MMIO read and write operations are serialized. 124 125 @param Address The MMIO register to read. 126 The caller is responsible for aligning the Address if required. 127 @param Width The width of the I/O operation. 128 129 @return Data read from registers in the EFI system memory space. 130 131 **/ 132 UINT64 133 EFIAPI 134 MmioReadWorker ( 135 IN UINTN Address, 136 IN EFI_CPU_IO_PROTOCOL_WIDTH Width 137 ) 138 { 139 EFI_STATUS Status; 140 UINT64 Data; 141 142 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data); 143 ASSERT_EFI_ERROR (Status); 144 145 return Data; 146 } 147 148 /** 149 Writes memory-mapped registers in the EFI system memory space. 150 151 Writes the MMIO registers specified by Address with registers width and value specified by Width 152 and Data respectively. Data is returned. If such operations are not supported, then ASSERT(). 153 This function must guarantee that all MMIO read and write operations are serialized. 154 155 @param Address The MMIO register to read. 156 The caller is responsible for aligning the Address if required. 157 @param Width The width of the I/O operation. 158 159 @return Data read from registers in the EFI system memory space. 160 161 **/ 162 UINT64 163 EFIAPI 164 MmioWriteWorker ( 165 IN UINTN Address, 166 IN EFI_CPU_IO_PROTOCOL_WIDTH Width, 167 IN UINT64 Data 168 ) 169 { 170 EFI_STATUS Status; 171 172 Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data); 173 ASSERT_EFI_ERROR (Status); 174 175 return Data; 176 } 177 178 /** 179 Reads an 8-bit I/O port. 180 181 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned. 182 This function must guarantee that all I/O read and write operations are 183 serialized. 184 185 If 8-bit I/O port operations are not supported, then ASSERT(). 186 187 @param Port The I/O port to read. 188 189 @return The value read. 190 191 **/ 192 UINT8 193 EFIAPI 194 IoRead8 ( 195 IN UINTN Port 196 ) 197 { 198 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8); 199 } 200 201 /** 202 Writes an 8-bit I/O port. 203 204 Writes the 8-bit I/O port specified by Port with the value specified by Value 205 and returns Value. This function must guarantee that all I/O read and write 206 operations are serialized. 207 208 If 8-bit I/O port operations are not supported, then ASSERT(). 209 210 @param Port The I/O port to write. 211 @param Value The value to write to the I/O port. 212 213 @return The value written the I/O port. 214 215 **/ 216 UINT8 217 EFIAPI 218 IoWrite8 ( 219 IN UINTN Port, 220 IN UINT8 Value 221 ) 222 { 223 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value); 224 } 225 226 /** 227 Reads a 16-bit I/O port. 228 229 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned. 230 This function must guarantee that all I/O read and write operations are 231 serialized. 232 233 If 16-bit I/O port operations are not supported, then ASSERT(). 234 235 @param Port The I/O port to read. 236 237 @return The value read. 238 239 **/ 240 UINT16 241 EFIAPI 242 IoRead16 ( 243 IN UINTN Port 244 ) 245 { 246 // 247 // Make sure Port is aligned on a 16-bit boundary. 248 // 249 ASSERT ((Port & 1) == 0); 250 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16); 251 } 252 253 /** 254 Writes a 16-bit I/O port. 255 256 Writes the 16-bit I/O port specified by Port with the value specified by Value 257 and returns Value. This function must guarantee that all I/O read and write 258 operations are serialized. 259 260 If 16-bit I/O port operations are not supported, then ASSERT(). 261 262 @param Port The I/O port to write. 263 @param Value The value to write to the I/O port. 264 265 @return The value written the I/O port. 266 267 **/ 268 UINT16 269 EFIAPI 270 IoWrite16 ( 271 IN UINTN Port, 272 IN UINT16 Value 273 ) 274 { 275 // 276 // Make sure Port is aligned on a 16-bit boundary. 277 // 278 ASSERT ((Port & 1) == 0); 279 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value); 280 } 281 282 /** 283 Reads a 32-bit I/O port. 284 285 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned. 286 This function must guarantee that all I/O read and write operations are 287 serialized. 288 289 If 32-bit I/O port operations are not supported, then ASSERT(). 290 291 @param Port The I/O port to read. 292 293 @return The value read. 294 295 **/ 296 UINT32 297 EFIAPI 298 IoRead32 ( 299 IN UINTN Port 300 ) 301 { 302 // 303 // Make sure Port is aligned on a 32-bit boundary. 304 // 305 ASSERT ((Port & 3) == 0); 306 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32); 307 } 308 309 /** 310 Writes a 32-bit I/O port. 311 312 Writes the 32-bit I/O port specified by Port with the value specified by Value 313 and returns Value. This function must guarantee that all I/O read and write 314 operations are serialized. 315 316 If 32-bit I/O port operations are not supported, then ASSERT(). 317 318 @param Port The I/O port to write. 319 @param Value The value to write to the I/O port. 320 321 @return The value written the I/O port. 322 323 **/ 324 UINT32 325 EFIAPI 326 IoWrite32 ( 327 IN UINTN Port, 328 IN UINT32 Value 329 ) 330 { 331 // 332 // Make sure Port is aligned on a 32-bit boundary. 333 // 334 ASSERT ((Port & 3) == 0); 335 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value); 336 } 337 338 /** 339 Reads a 64-bit I/O port. 340 341 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned. 342 This function must guarantee that all I/O read and write operations are 343 serialized. 344 345 If 64-bit I/O port operations are not supported, then ASSERT(). 346 347 @param Port The I/O port to read. 348 349 @return The value read. 350 351 **/ 352 UINT64 353 EFIAPI 354 IoRead64 ( 355 IN UINTN Port 356 ) 357 { 358 // 359 // Make sure Port is aligned on a 64-bit boundary. 360 // 361 ASSERT ((Port & 7) == 0); 362 return IoReadWorker (Port, EfiCpuIoWidthUint64); 363 } 364 365 /** 366 Writes a 64-bit I/O port. 367 368 Writes the 64-bit I/O port specified by Port with the value specified by Value 369 and returns Value. This function must guarantee that all I/O read and write 370 operations are serialized. 371 372 If 64-bit I/O port operations are not supported, then ASSERT(). 373 374 @param Port The I/O port to write. 375 @param Value The value to write to the I/O port. 376 377 @return The value written the I/O port. 378 379 **/ 380 UINT64 381 EFIAPI 382 IoWrite64 ( 383 IN UINTN Port, 384 IN UINT64 Value 385 ) 386 { 387 // 388 // Make sure Port is aligned on a 64-bit boundary. 389 // 390 ASSERT ((Port & 7) == 0); 391 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value); 392 } 393 394 /** 395 Reads an 8-bit MMIO register. 396 397 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is 398 returned. This function must guarantee that all MMIO read and write 399 operations are serialized. 400 401 If 8-bit MMIO register operations are not supported, then ASSERT(). 402 403 @param Address The MMIO register to read. 404 405 @return The value read. 406 407 **/ 408 UINT8 409 EFIAPI 410 MmioRead8 ( 411 IN UINTN Address 412 ) 413 { 414 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8); 415 } 416 417 /** 418 Writes an 8-bit MMIO register. 419 420 Writes the 8-bit MMIO register specified by Address with the value specified 421 by Value and returns Value. This function must guarantee that all MMIO read 422 and write operations are serialized. 423 424 If 8-bit MMIO register operations are not supported, then ASSERT(). 425 426 @param Address The MMIO register to write. 427 @param Value The value to write to the MMIO register. 428 429 **/ 430 UINT8 431 EFIAPI 432 MmioWrite8 ( 433 IN UINTN Address, 434 IN UINT8 Value 435 ) 436 { 437 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value); 438 } 439 440 /** 441 Reads a 16-bit MMIO register. 442 443 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is 444 returned. This function must guarantee that all MMIO read and write 445 operations are serialized. 446 447 If 16-bit MMIO register operations are not supported, then ASSERT(). 448 449 @param Address The MMIO register to read. 450 451 @return The value read. 452 453 **/ 454 UINT16 455 EFIAPI 456 MmioRead16 ( 457 IN UINTN Address 458 ) 459 { 460 // 461 // Make sure Address is aligned on a 16-bit boundary. 462 // 463 ASSERT ((Address & 1) == 0); 464 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16); 465 } 466 467 /** 468 Writes a 16-bit MMIO register. 469 470 Writes the 16-bit MMIO register specified by Address with the value specified 471 by Value and returns Value. This function must guarantee that all MMIO read 472 and write operations are serialized. 473 474 If 16-bit MMIO register operations are not supported, then ASSERT(). 475 476 @param Address The MMIO register to write. 477 @param Value The value to write to the MMIO register. 478 479 **/ 480 UINT16 481 EFIAPI 482 MmioWrite16 ( 483 IN UINTN Address, 484 IN UINT16 Value 485 ) 486 { 487 // 488 // Make sure Address is aligned on a 16-bit boundary. 489 // 490 ASSERT ((Address & 1) == 0); 491 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value); 492 } 493 494 /** 495 Reads a 32-bit MMIO register. 496 497 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is 498 returned. This function must guarantee that all MMIO read and write 499 operations are serialized. 500 501 If 32-bit MMIO register operations are not supported, then ASSERT(). 502 503 @param Address The MMIO register to read. 504 505 @return The value read. 506 507 **/ 508 UINT32 509 EFIAPI 510 MmioRead32 ( 511 IN UINTN Address 512 ) 513 { 514 // 515 // Make sure Address is aligned on a 32-bit boundary. 516 // 517 ASSERT ((Address & 3) == 0); 518 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32); 519 } 520 521 /** 522 Writes a 32-bit MMIO register. 523 524 Writes the 32-bit MMIO register specified by Address with the value specified 525 by Value and returns Value. This function must guarantee that all MMIO read 526 and write operations are serialized. 527 528 If 32-bit MMIO register operations are not supported, then ASSERT(). 529 530 @param Address The MMIO register to write. 531 @param Value The value to write to the MMIO register. 532 533 **/ 534 UINT32 535 EFIAPI 536 MmioWrite32 ( 537 IN UINTN Address, 538 IN UINT32 Value 539 ) 540 { 541 // 542 // Make sure Address is aligned on a 32-bit boundary. 543 // 544 ASSERT ((Address & 3) == 0); 545 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value); 546 } 547 548 /** 549 Reads a 64-bit MMIO register. 550 551 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is 552 returned. This function must guarantee that all MMIO read and write 553 operations are serialized. 554 555 If 64-bit MMIO register operations are not supported, then ASSERT(). 556 557 @param Address The MMIO register to read. 558 559 @return The value read. 560 561 **/ 562 UINT64 563 EFIAPI 564 MmioRead64 ( 565 IN UINTN Address 566 ) 567 { 568 // 569 // Make sure Address is aligned on a 64-bit boundary. 570 // 571 ASSERT ((Address & 7) == 0); 572 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64); 573 } 574 575 /** 576 Writes a 64-bit MMIO register. 577 578 Writes the 64-bit MMIO register specified by Address with the value specified 579 by Value and returns Value. This function must guarantee that all MMIO read 580 and write operations are serialized. 581 582 If 64-bit MMIO register operations are not supported, then ASSERT(). 583 584 @param Address The MMIO register to write. 585 @param Value The value to write to the MMIO register. 586 587 **/ 588 UINT64 589 EFIAPI 590 MmioWrite64 ( 591 IN UINTN Address, 592 IN UINT64 Value 593 ) 594 { 595 // 596 // Make sure Address is aligned on a 64-bit boundary. 597 // 598 ASSERT ((Address & 7) == 0); 599 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value); 600 } 601
