1 /** @file 2 This file contains definitions for the SPD fields on an SDRAM. 3 4 Copyright (c) 2007 - 2008, Intel Corporation. All rights reserved.<BR> 5 This program and the accompanying materials 6 are licensed and made available under the terms and conditions of the BSD License 7 which accompanies this distribution. The full text of the license may be found at 8 http://opensource.org/licenses/bsd-license.php 9 10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 12 **/ 13 14 #ifndef _SDRAM_SPD_H_ 15 #define _SDRAM_SPD_H_ 16 17 // 18 // SDRAM SPD field definitions 19 // 20 #define SPD_MEMORY_TYPE 2 21 #define SPD_SDRAM_ROW_ADDR 3 22 #define SPD_SDRAM_COL_ADDR 4 23 #define SPD_SDRAM_MODULE_ROWS 5 24 #define SPD_SDRAM_MODULE_DATA_WIDTH_LSB 6 25 #define SPD_SDRAM_MODULE_DATA_WIDTH_MSB 7 26 #define SPD_SDRAM_ECC_SUPPORT 11 27 #define SPD_SDRAM_REFRESH 12 28 #define SPD_SDRAM_WIDTH 13 29 #define SPD_SDRAM_ERROR_WIDTH 14 30 #define SPD_SDRAM_BURST_LENGTH 16 31 #define SPD_SDRAM_NO_OF_BANKS 17 32 #define SPD_SDRAM_CAS_LATENCY 18 33 #define SPD_SDRAM_MODULE_ATTR 21 34 35 #define SPD_SDRAM_TCLK1_PULSE 9 ///< cycle time for highest cas latency 36 #define SPD_SDRAM_TAC1_PULSE 10 ///< access time for highest cas latency 37 #define SPD_SDRAM_TCLK2_PULSE 23 ///< cycle time for 2nd highest cas latency 38 #define SPD_SDRAM_TAC2_PULSE 24 ///< access time for 2nd highest cas latency 39 #define SPD_SDRAM_TCLK3_PULSE 25 ///< cycle time for 3rd highest cas latency 40 #define SPD_SDRAM_TAC3_PULSE 26 ///< access time for 3rd highest cas latency 41 #define SPD_SDRAM_MIN_PRECHARGE 27 42 #define SPD_SDRAM_ACTIVE_MIN 28 43 #define SPD_SDRAM_RAS_CAS 29 44 #define SPD_SDRAM_RAS_PULSE 30 45 #define SPD_SDRAM_DENSITY 31 46 47 // 48 // Memory Type Definitions 49 // 50 #define SPD_VAL_SDR_TYPE 4 ///< SDR SDRAM memory 51 #define SPD_VAL_DDR_TYPE 7 ///< DDR SDRAM memory 52 #define SPD_VAL_DDR2_TYPE 8 ///< DDR2 SDRAM memory 53 // 54 // ECC Type Definitions 55 // 56 #define SPD_ECC_TYPE_NONE 0x00 ///< No error checking 57 #define SPD_ECC_TYPE_PARITY 0x01 ///< No error checking 58 #define SPD_ECC_TYPE_ECC 0x02 ///< Error checking only 59 // 60 // Module Attributes (Bit positions) 61 // 62 #define SPD_BUFFERED 0x01 63 #define SPD_REGISTERED 0x02 64 65 #endif 66
