1 /** @file 2 Generic definitions for registers in the Intel Ich devices. 3 4 These definitions should work for any version of Ich. 5 6 Copyright (c) 2009 - 2011, Intel Corporation. All rights reserved.<BR> 7 This program and the accompanying materials 8 are licensed and made available under the terms and conditions of the BSD License 9 which accompanies this distribution. The full text of the license may be found at 10 http://opensource.org/licenses/bsd-license.php 11 12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 15 **/ 16 17 #ifndef _GENERIC_ICH_H_ 18 #define _GENERIC_ICH_H_ 19 20 /** GenericIchDefs Generic ICH Definitions. 21 22 Definitions beginning with "R_" are registers. 23 Definitions beginning with "B_" are bits within registers. 24 Definitions beginning with "V_" are meaningful values of bits within the registers. 25 **/ 26 ///@{ 27 28 /// IchPciAddressing PCI Bus Address for ICH. 29 ///@{ 30 #define PCI_BUS_NUMBER_ICH 0x00 ///< ICH is on PCI Bus 0. 31 #define PCI_DEVICE_NUMBER_ICH_LPC 31 ///< ICH is Device 31. 32 #define PCI_FUNCTION_NUMBER_ICH_LPC 0 ///< ICH is Function 0. 33 ///@} 34 35 /// IchAcpiCntr Control for the ICH's ACPI Counter. 36 ///@{ 37 #define R_ICH_LPC_ACPI_BASE 0x40 38 #define B_ICH_LPC_ACPI_BASE_BAR 0x0000FF80 39 #define R_ICH_LPC_ACPI_CNT 0x44 40 #define B_ICH_LPC_ACPI_CNT_ACPI_EN 0x80 41 ///@} 42 43 /// IchAcpiTimer The ICH's ACPI Timer. 44 ///@{ 45 #define R_ACPI_PM1_TMR 0x08 46 #define V_ACPI_TMR_FREQUENCY 3579545 47 #define V_ACPI_PM1_TMR_MAX_VAL 0x1000000 ///< The timer is 24 bit overflow. 48 ///@} 49 50 /// Macro to generate the PCI address of any given ICH Register. 51 #define PCI_ICH_LPC_ADDRESS(Register) \ 52 ((UINTN)(PCI_LIB_ADDRESS (PCI_BUS_NUMBER_ICH, PCI_DEVICE_NUMBER_ICH_LPC, PCI_FUNCTION_NUMBER_ICH_LPC, Register))) 53 54 ///@} 55 #endif // _GENERIC_ICH_H_ 56
