1 ## @file 2 # FDF file of Clanton Peak CRB platform with 32-bit DXE 3 # 4 # This package provides QuarkNcSocId platform specific modules. 5 # Copyright (c) 2013 - 2015 Intel Corporation. 6 # 7 # This program and the accompanying materials 8 # are licensed and made available under the terms and conditions of the BSD License 9 # which accompanies this distribution. The full text of the license may be found at 10 # http://opensource.org/licenses/bsd-license.php 11 # 12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 # 15 ## 16 17 ################################################################################ 18 # 19 # Defines Section - statements that will be processed to create a Makefile. 20 # 21 ################################################################################ 22 [Defines] 23 # Address 0x100000000 (4 GB reset address) 24 # Base Size 25 # +---------------------------+ 26 # FLASH_BASE | FD.Quark: | 0x800000 (8 MB) 27 # 0xFF800000 | BaseAddress | 28 # +---------------------------+ 29 # 30 # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part. 31 # 0xFF800000 + 0x400000 = 0xFFC00000. 32 # 33 # Address 0x0 (0xFF800000 for 8 MB SPI part) 34 # +---------------------------+ 35 # FLASH_FV_PAYLOAD_BASE | Payload Image | FLASH_FV_PAYLOAD_SIZE 36 # 0x00400000 | | 0x00100000 37 # +---------------------------+ 38 # FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE 39 # 0x00500000 | | 0x001E0000 40 # +---------------------------+ 41 # NVRAM_AREA_BASE | NVRAM Area= | NVRAM_AREA_SIZE 42 # 0x006E0000 | Variable + FTW Working + | 43 # | FTW Spare | 44 # +---+-------------------+---+ 45 # NVRAM_AREA_VARIABLE_BASE | | NVRAM_AREA_VARIABLE_SIZE 46 # | | 47 # +-------------------+ 48 # FTW_WORKING_BASE | | FTW_WORKING_SIZE 49 # | | 50 # +-------------------+ 51 # FTW_SPARE_BASE | | FTW_SPARE_SIZE 52 # | | 53 # +---+-------------------+---+ 54 # RMU_BINARY_BASE | RMU Binary | RMU_BINARY_SIZE 55 # 0x00700000 | | 0x00008000 56 # +---------------------------+ 57 # PLATFORM_DATA_BASE | PlatformData Binary | PLATFORM_DATA_SIZE 58 # 0x00710000 | | 0x00001000 59 # +---------------------------+ 60 # FVRECOVERY_IMAGE_BASE | FVRECOVERY Image | FVRECOVERY_IMAGE_SIZE 61 # 0x720000 | | 0x000E0000 62 # +---------------------------+ 63 64 # 65 # Define value used to compute FLASH regions below reset vector location just below 4GB 66 # 67 DEFINE RESET_ADDRESS = 0x100000000 # 4 GB 68 69 # 70 # Set size of FLASH to 8MB 71 # 72 DEFINE FLASH_SIZE = 0x800000 73 DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device 74 75 # 76 # Set FLASH block size to 4KB 77 # 78 DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB 79 80 # 81 # Misc settings 82 # 83 DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks 84 85 # 86 # Start PAYLOAD at 4MB into 8MB FLASH 87 # 88 DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000 89 DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000 90 91 # 92 # Put FVMAIN between PAYLOAD and RMU Binary 93 # 94 DEFINE FLASH_FV_MAIN_BASE = 0x00500000 95 DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000 96 97 # 98 # Place NV Storage just above Platform Data Base 99 # 100 DEFINE NVRAM_AREA_VARIABLE_BASE = 0x006E0000 101 DEFINE NVRAM_AREA_SIZE = 0x00020000 102 103 DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x0000E000 104 DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE) 105 DEFINE FTW_WORKING_SIZE = 0x00002000 106 DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE) 107 DEFINE FTW_SPARE_SIZE = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE) 108 109 # 110 # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000) 111 # 112 DEFINE RMU_BINARY_BASE = 0x00700000 # HW fixed address 113 DEFINE RMU_BINARY_SIZE = 0x00008000 # HW fixed address, so fixed size 114 115 # 116 # Platform Data Base must be 64KB above RMU 117 # 118 DEFINE VPD_BASE = 0x00708000 119 DEFINE VPD_SIZE = 0x00001000 120 121 # 122 # Place FV Recovery above NV Storage 123 # 124 DEFINE FVRECOVERY_IMAGE_SIZE = 0x000F0000 125 DEFINE FVRECOVERY_IMAGE_BASE = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE) 126 127 ################################################################################ 128 # 129 # FD Section 130 # The [FD] Section is made up of the definition statements and a 131 # description of what goes into the Flash Device Image. Each FD section 132 # defines one flash "device" image. A flash device image may be one of 133 # the following: Removable media bootable image (like a boot floppy 134 # image,) an Option ROM image (that would be "flashed" into an add-in 135 # card,) a System "Flash" image (that would be burned into a system's 136 # flash) or an Update ("Capsule") image that will be used to update and 137 # existing system flash. 138 # 139 ################################################################################ 140 [FD.Quark] 141 BaseAddress = 0xFF800000 #The base address of the Flash Device; set to same value as FLASH_BASE. 142 Size = 0x800000 #The size in bytes of the Flash Device; set to same value as FLASH_SIZE. 143 ErasePolarity = 1 144 BlockSize = $(FLASH_BLOCKSIZE) 145 NumBlocks = 0x800 #The number of blocks for the Flash Device. 146 147 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE) 148 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE) 149 150 ################################################################################ 151 # 152 # Following are lists of FD Region layout which correspond to the locations of different 153 # images within the flash device. 154 # 155 # Regions must be defined in ascending order and may not overlap. 156 # 157 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by 158 # the pipe "|" character, followed by the size of the region, also in hex with the leading 159 # "0x" characters. Like: 160 # Offset|Size 161 # PcdOffsetCName|PcdSizeCName 162 # RegionType <FV, DATA, or FILE> 163 # 164 ################################################################################ 165 166 ######################################################## 167 # Quark Payload Image 168 ######################################################## 169 $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE) 170 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize 171 FV = PAYLOAD 172 173 ######################################################## 174 # Quark FVMAIN Image (Compressed) 175 ######################################################## 176 $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE) 177 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize 178 FV = FVMAIN_COMPACT 179 180 ############################################################################# 181 # Quark NVRAM Area 182 # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare 183 ############################################################################# 184 $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE) 185 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize 186 #NV_VARIABLE_STORE 187 DATA = { 188 ## This is the EFI_FIRMWARE_VOLUME_HEADER 189 # ZeroVector [] 190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 192 # FileSystemGuid: gEfiSystemNvDataFvGuid = 193 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} 194 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, 195 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, 196 # FvLength: 0x20000 197 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 198 #Signature "_FVH" #Attributes 199 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, 200 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision 201 0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02, 202 #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block 203 0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA), 204 #Blockmap[1]: End 205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 206 ## This is the VARIABLE_STORE_HEADER 207 !if $(SECURE_BOOT_ENABLE) 208 # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } } 209 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, 210 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, 211 !else 212 # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} 213 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, 214 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, 215 !endif 216 #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8 217 # This can speed up the Variable Dispatch a bit. 218 0xB8, 0xDF, 0x00, 0x00, 219 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 220 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 221 } 222 223 $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE) 224 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize 225 #NV_FTW_WORKING 226 DATA = { 227 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid = 228 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }} 229 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49, 230 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95, 231 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved 232 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF, 233 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0 234 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 235 } 236 237 $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE) 238 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize 239 #NV_FTW_SPARE 240 241 ######################################################### 242 # Quark Remote Management Unit Binary 243 ######################################################### 244 $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE) 245 INF QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf 246 247 ######################################################### 248 # PlatformData Binary, default for standalone is none built-in so user selects. 249 ######################################################### 250 $(VPD_BASE)|$(VPD_SIZE) 251 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress 252 FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin 253 254 ####################### 255 # Quark FVRECOVERY Image 256 ####################### 257 $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE) 258 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize 259 FV = FVRECOVERY 260 261 ################################################################################ 262 # 263 # FV Section 264 # 265 # [FV] section is used to define what components or modules are placed within a flash 266 # device file. This section also defines order the components and modules are positioned 267 # within the image. The [FV] section consists of define statements, set statements and 268 # module statements. 269 # 270 ################################################################################ 271 [FV.FVRECOVERY] 272 BlockSize = $(FLASH_BLOCKSIZE) 273 FvAlignment = 16 #FV alignment and FV attributes setting. 274 ERASE_POLARITY = 1 275 MEMORY_MAPPED = TRUE 276 STICKY_WRITE = TRUE 277 LOCK_CAP = TRUE 278 LOCK_STATUS = TRUE 279 WRITE_DISABLED_CAP = TRUE 280 WRITE_ENABLED_CAP = TRUE 281 WRITE_STATUS = TRUE 282 WRITE_LOCK_CAP = TRUE 283 WRITE_LOCK_STATUS = TRUE 284 READ_DISABLED_CAP = TRUE 285 READ_ENABLED_CAP = TRUE 286 READ_STATUS = TRUE 287 READ_LOCK_CAP = TRUE 288 READ_LOCK_STATUS = TRUE 289 FvNameGuid = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8 290 291 ################################################################################ 292 # 293 # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image. 294 # Parsing tools will scan the INF file to determine the type of component or module. 295 # The component or module type is used to reference the standard rules 296 # defined elsewhere in the FDF file. 297 # 298 # The format for INF statements is: 299 # INF $(PathAndInfFileName) 300 # 301 ################################################################################ 302 303 ## 304 # PEI Apriori file example, more PEIM module added later. 305 ## 306 APRIORI PEI { 307 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf 308 # PlatformConfigPei should be immediately after Pcd driver. 309 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf 310 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf 311 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf 312 INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf 313 } 314 315 ## 316 # SEC Phase modules 317 ## 318 INF UefiCpuPkg/SecCore/SecCore.inf 319 320 INF MdeModulePkg/Core/Pei/PeiMain.inf 321 322 ## 323 # PEI Phase RAW Data files. 324 ## 325 FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) { 326 SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin 327 } 328 329 INF RuleOverride = NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf 330 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf 331 INF RuleOverride = NORELOC MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf 332 INF RuleOverride = NORELOC MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf 333 INF RuleOverride = NORELOC MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf 334 INF RuleOverride = NORELOC MdeModulePkg/Universal/Variable/Pei/VariablePei.inf 335 INF RuleOverride = NORELOC UefiCpuPkg/CpuMpPei/CpuMpPei.inf 336 INF RuleOverride = NORELOC MdeModulePkg/Universal/CapsulePei/CapsulePei.inf 337 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf 338 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf 339 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf 340 INF QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf 341 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf 342 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf 343 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf 344 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf 345 346 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 { 347 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid} 348 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID 349 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS 350 } 351 } 352 353 ################################################################################ 354 # 355 # FV Section 356 # 357 # [FV] section is used to define what components or modules are placed within a flash 358 # device file. This section also defines order the components and modules are positioned 359 # within the image. The [FV] section consists of define statements, set statements and 360 # module statements. 361 # 362 ################################################################################ 363 [FV.FVRECOVERY_COMPONENTS] 364 BlockSize = $(FLASH_BLOCKSIZE) 365 FvAlignment = 16 #FV alignment and FV attributes setting. 366 ERASE_POLARITY = 1 367 MEMORY_MAPPED = TRUE 368 STICKY_WRITE = TRUE 369 LOCK_CAP = TRUE 370 LOCK_STATUS = TRUE 371 WRITE_DISABLED_CAP = TRUE 372 WRITE_ENABLED_CAP = TRUE 373 WRITE_STATUS = TRUE 374 WRITE_LOCK_CAP = TRUE 375 WRITE_LOCK_STATUS = TRUE 376 READ_DISABLED_CAP = TRUE 377 READ_ENABLED_CAP = TRUE 378 READ_STATUS = TRUE 379 READ_LOCK_CAP = TRUE 380 READ_LOCK_STATUS = TRUE 381 382 INF QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf 383 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf 384 INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf 385 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf 386 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf 387 INF FatPkg/FatPei/FatPei.inf 388 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf 389 390 ################################################################################ 391 # 392 # FV Section 393 # 394 # [FV] section is used to define what components or modules are placed within a flash 395 # device file. This section also defines order the components and modules are positioned 396 # within the image. The [FV] section consists of define statements, set statements and 397 # module statements. 398 # 399 ################################################################################ 400 [FV.FVMAIN] 401 BlockSize = $(FLASH_BLOCKSIZE) 402 FvAlignment = 16 403 ERASE_POLARITY = 1 404 MEMORY_MAPPED = TRUE 405 STICKY_WRITE = TRUE 406 LOCK_CAP = TRUE 407 LOCK_STATUS = TRUE 408 WRITE_DISABLED_CAP = TRUE 409 WRITE_ENABLED_CAP = TRUE 410 WRITE_STATUS = TRUE 411 WRITE_LOCK_CAP = TRUE 412 WRITE_LOCK_STATUS = TRUE 413 READ_DISABLED_CAP = TRUE 414 READ_ENABLED_CAP = TRUE 415 READ_STATUS = TRUE 416 READ_LOCK_CAP = TRUE 417 READ_LOCK_STATUS = TRUE 418 FvNameGuid = 30D9ED01-38D2-418a-90D5-C561750BF80F 419 420 ## 421 # DXE Phase modules 422 ## 423 INF MdeModulePkg/Core/Dxe/DxeMain.inf 424 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf 425 426 !if $(SOURCE_DEBUG_ENABLE) 427 INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf 428 !endif 429 430 # 431 # Early SoC / Platform modules 432 # 433 INF QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf 434 435 ## 436 # EDK Core modules 437 ## 438 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf 439 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf 440 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf 441 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf 442 INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf 443 INF MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf 444 445 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf 446 INF UefiCpuPkg/CpuDxe/CpuDxe.inf 447 INF MdeModulePkg/Universal/Metronome/Metronome.inf 448 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf 449 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf 450 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf 451 !if $(SECURE_BOOT_ENABLE) 452 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf 453 !endif 454 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf 455 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf 456 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf 457 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf 458 INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf 459 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf 460 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf 461 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf 462 463 # 464 # Platform 465 # 466 INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf 467 INF MdeModulePkg/Application/UiApp/UiApp.inf 468 469 INF QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf 470 INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf 471 INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf 472 INF QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf 473 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf 474 INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf 475 INF QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf 476 INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf 477 INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf 478 INF QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf 479 480 # 481 # ACPI 482 # 483 INF QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf 484 INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf 485 #INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf 486 INF QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/BootScriptExecutorDxe.inf 487 INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf 488 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf 489 INF QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf 490 INF RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf 491 492 # 493 # SMM 494 # 495 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf 496 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf 497 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf 498 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf 499 INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf 500 INF QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf 501 INF QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf 502 INF QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf 503 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf 504 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf 505 506 # 507 # SMBIOS 508 # 509 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf 510 INF QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf 511 INF QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf 512 513 # 514 # PCI 515 # 516 INF QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf 517 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf 518 INF QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf 519 !if $(SOURCE_DEBUG_ENABLE) 520 !else 521 INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf 522 !endif 523 524 # 525 # USB 526 # 527 !if $(PERFORMANCE_ENABLE) 528 !else 529 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf 530 INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf 531 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf 532 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf 533 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf 534 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf 535 !endif 536 537 # 538 # SDIO 539 # 540 !if $(PERFORMANCE_ENABLE) 541 !else 542 INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf 543 INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf 544 !endif 545 546 # 547 # Console 548 # 549 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf 550 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf 551 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf 552 553 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf 554 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf 555 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf 556 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf 557 558 # 559 # File System Modules 560 # 561 !if $(PERFORMANCE_ENABLE) 562 INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf 563 !else 564 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf 565 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf 566 INF FatPkg/EnhancedFatDxe/Fat.inf 567 !endif 568 569 ################################################################################ 570 # 571 # FV Section 572 # 573 # [FV] section is used to define what components or modules are placed within a flash 574 # device file. This section also defines order the components and modules are positioned 575 # within the image. The [FV] section consists of define statements, set statements and 576 # module statements. 577 # 578 ################################################################################ 579 [FV.FVMAIN_COMPACT] 580 FvAlignment = 16 581 ERASE_POLARITY = 1 582 MEMORY_MAPPED = TRUE 583 STICKY_WRITE = TRUE 584 LOCK_CAP = TRUE 585 LOCK_STATUS = TRUE 586 WRITE_DISABLED_CAP = TRUE 587 WRITE_ENABLED_CAP = TRUE 588 WRITE_STATUS = TRUE 589 WRITE_LOCK_CAP = TRUE 590 WRITE_LOCK_STATUS = TRUE 591 READ_DISABLED_CAP = TRUE 592 READ_ENABLED_CAP = TRUE 593 READ_STATUS = TRUE 594 READ_LOCK_CAP = TRUE 595 READ_LOCK_STATUS = TRUE 596 597 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { 598 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID 599 SECTION FV_IMAGE = FVMAIN 600 } 601 } 602 603 ################################################################################ 604 # 605 # FV Section 606 # 607 # [FV] section is used to define what components or modules are placed within a flash 608 # device file. This section also defines order the components and modules are positioned 609 # within the image. The [FV] section consists of define statements, set statements and 610 # module statements. 611 # 612 ################################################################################ 613 [FV.PAYLOAD] 614 BlockSize = $(FLASH_BLOCKSIZE) 615 FvAlignment = 16 #FV alignment and FV attributes setting. 616 ERASE_POLARITY = 1 617 MEMORY_MAPPED = TRUE 618 STICKY_WRITE = TRUE 619 LOCK_CAP = TRUE 620 LOCK_STATUS = TRUE 621 WRITE_DISABLED_CAP = TRUE 622 WRITE_ENABLED_CAP = TRUE 623 WRITE_STATUS = TRUE 624 WRITE_LOCK_CAP = TRUE 625 WRITE_LOCK_STATUS = TRUE 626 READ_DISABLED_CAP = TRUE 627 READ_ENABLED_CAP = TRUE 628 READ_STATUS = TRUE 629 READ_LOCK_CAP = TRUE 630 READ_LOCK_STATUS = TRUE 631 632 # 633 # Shell and Applications 634 # 635 INF RuleOverride = TIANOCOMPRESSED ShellPkg/Application/Shell/Shell.inf 636 !if $(PERFORMANCE_ENABLE) 637 INF RuleOverride = TIANOCOMPRESSED PerformancePkg/Dp_App/Dp.inf 638 !endif 639 640 ################################################################################ 641 # 642 # Rules are use with the [FV] section's module INF type to define 643 # how an FFS file is created for a given INF file. The following Rule are the default 644 # rules for the different module type. User can add the customized rules to define the 645 # content of the FFS file. 646 # 647 ################################################################################ 648 [Rule.Common.SEC] 649 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { 650 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi 651 RAW BIN Align = 16 |.com 652 } 653 654 [Rule.Common.PEI_CORE] 655 FILE PEI_CORE = $(NAMED_GUID) { 656 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi 657 UI STRING="$(MODULE_NAME)" Optional 658 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 659 } 660 661 [Rule.Common.PEIM.NORELOC] 662 FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED { 663 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 664 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi 665 UI STRING="$(MODULE_NAME)" Optional 666 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 667 } 668 669 [Rule.Common.PEIM] 670 FILE PEIM = $(NAMED_GUID) { 671 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 672 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi 673 UI STRING="$(MODULE_NAME)" Optional 674 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 675 } 676 677 [Rule.Common.DXE_CORE] 678 FILE DXE_CORE = $(NAMED_GUID) { 679 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 680 UI STRING="$(MODULE_NAME)" Optional 681 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 682 } 683 684 [Rule.Common.UEFI_DRIVER] 685 FILE DRIVER = $(NAMED_GUID) { 686 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 687 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 688 UI STRING="$(MODULE_NAME)" Optional 689 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 690 } 691 692 [Rule.Common.DXE_DRIVER] 693 FILE DRIVER = $(NAMED_GUID) { 694 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 695 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 696 UI STRING="$(MODULE_NAME)" Optional 697 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 698 } 699 700 [Rule.Common.DXE_RUNTIME_DRIVER] 701 FILE DRIVER = $(NAMED_GUID) { 702 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 703 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 704 UI STRING="$(MODULE_NAME)" Optional 705 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 706 } 707 708 [Rule.Common.DXE_SMM_DRIVER] 709 FILE SMM = $(NAMED_GUID) { 710 SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 711 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 712 UI STRING="$(MODULE_NAME)" Optional 713 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 714 } 715 716 [Rule.Common.SMM_CORE] 717 FILE SMM_CORE = $(NAMED_GUID) { 718 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 719 UI STRING="$(MODULE_NAME)" Optional 720 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 721 } 722 723 [Rule.Common.UEFI_APPLICATION] 724 FILE APPLICATION = $(NAMED_GUID) { 725 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 726 UI STRING="$(MODULE_NAME)" Optional 727 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 728 } 729 730 [Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED] 731 FILE APPLICATION = $(NAMED_GUID) { 732 UI STRING="$(MODULE_NAME)" Optional 733 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 734 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { # TIANO COMPRESS GUID 735 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 736 } 737 } 738 739 [Rule.Common.UEFI_APPLICATION.UI] 740 FILE APPLICATION = $(NAMED_GUID) { 741 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 742 UI STRING="Enter Setup" 743 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 744 } 745 746 [Rule.Common.USER_DEFINED.ACPITABLE] 747 FILE FREEFORM = $(NAMED_GUID) { 748 RAW ACPI |.acpi 749 RAW ASL |.aml 750 } 751
