1 /****************************************************************************** 2 * 3 * Copyright (C) 2015 The Android Open Source Project 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ***************************************************************************** 18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore 19 */ 20 /*! 21 ************************************************************************** 22 * \file ih264d_process_intra_mb.c 23 * 24 * \brief 25 * Contains routines that decode a I slice type 26 * 27 * Detailed_description 28 * 29 * \date 30 * 07/07/2003 31 * 32 * \author NS 33 ************************************************************************** 34 */ 35 36 #include <string.h> 37 #include "ih264d_bitstrm.h" 38 #include "ih264d_defs.h" 39 #include "ih264d_debug.h" 40 #include "ih264d_tables.h" 41 #include "ih264d_structs.h" 42 #include "ih264d_defs.h" 43 #include "ih264d_parse_cavlc.h" 44 #include "ih264d_mb_utils.h" 45 #include "ih264d_parse_slice.h" 46 #include "ih264d_process_intra_mb.h" 47 #include "ih264d_error_handler.h" 48 #include "ih264d_quant_scaling.h" 49 #include "ih264d_tables.h" 50 51 /*! 52 ************************************************************************** 53 * \if Function name : ih264d_itrans_recon_luma_dc \endif 54 * 55 * \brief 56 * This function does InvTransform, scaling and reconstruction of Luma DC. 57 * 58 * \return 59 * 0 on Success and Error code otherwise 60 ************************************************************************** 61 */ 62 void ih264d_itrans_recon_luma_dc(dec_struct_t *ps_dec, 63 WORD16* pi2_src, 64 WORD16* pi2_coeff_block, 65 const UWORD16 *pu2_weigh_mat) 66 { 67 WORD32 i; 68 WORD16 pi2_out[16]; 69 WORD32 pi4_tmp[16]; 70 WORD16 *pi2_out_ptr = &pi2_out[0]; 71 PROFILE_DISABLE_IQ_IT_RECON_RETURN() 72 ps_dec->pf_ihadamard_scaling_4x4(pi2_src, pi2_out, 73 ps_dec->pu2_quant_scale_y, pu2_weigh_mat, 74 ps_dec->u1_qp_y_div6, pi4_tmp); 75 for(i = 0; i < 4; i++) 76 { 77 pi2_coeff_block[0] = pi2_out_ptr[0]; 78 pi2_coeff_block[4 * 16] = pi2_out_ptr[4]; 79 pi2_coeff_block[8 * 16] = pi2_out_ptr[8]; 80 pi2_coeff_block[12 * 16] = pi2_out_ptr[12]; 81 82 pi2_out_ptr++; /* Point to next column */ 83 pi2_coeff_block += 16; 84 } 85 } 86 /*! 87 ************************************************************************** 88 * \if Function name : ih264d_read_intra_pred_modes \endif 89 * 90 * \brief 91 * Reads the intra pred mode related values of I4x4 MB from bitstream. 92 * 93 * This function will read the prev intra pred mode flags and 94 * stores it in pu1_prev_intra4x4_pred_mode_flag. If the u4_flag 95 * indicates that most probable mode is not intra pred mode, then 96 * the rem_intra4x4_pred_mode is read and stored in 97 * pu1_rem_intra4x4_pred_mode array. 98 * 99 * 100 * \return 101 * 0 on success and Error code otherwise 102 * 103 ************************************************************************** 104 */ 105 WORD32 ih264d_read_intra_pred_modes(dec_struct_t * ps_dec, 106 UWORD8 * pu1_prev_intra4x4_pred_mode_flag, 107 UWORD8 * pu1_rem_intra4x4_pred_mode, 108 UWORD32 u4_trans_form8x8) 109 { 110 WORD32 i4x4_luma_blk_idx = 0, i8x8_luma_blk_idx = 0; 111 112 dec_bit_stream_t * ps_bitstrm = ps_dec->ps_bitstrm; 113 114 if(!u4_trans_form8x8) 115 { 116 for(i4x4_luma_blk_idx = 0; i4x4_luma_blk_idx < 16; ++i4x4_luma_blk_idx) 117 { 118 UWORD32 u4_temp; 119 SWITCHOFFTRACE; 120 121 GETBIT(u4_temp, ps_bitstrm->u4_ofst, ps_bitstrm->pu4_buffer); 122 *pu1_prev_intra4x4_pred_mode_flag = (UWORD8)u4_temp; 123 if(!(*pu1_prev_intra4x4_pred_mode_flag)) 124 { 125 GETBITS(u4_temp, ps_bitstrm->u4_ofst, ps_bitstrm->pu4_buffer, 3); 126 127 *(pu1_rem_intra4x4_pred_mode) = (UWORD8)u4_temp; 128 } 129 130 pu1_prev_intra4x4_pred_mode_flag++; 131 pu1_rem_intra4x4_pred_mode++; 132 } 133 } 134 else 135 { 136 /**********************************************************************/ 137 /* prev_intra4x4_pred_modes to be interpreted as */ 138 /* prev_intra8x8_pred_modes in case of transform 8x8 */ 139 /**********************************************************************/ 140 for(i8x8_luma_blk_idx = 0; i8x8_luma_blk_idx < 4; i8x8_luma_blk_idx++) 141 { 142 UWORD32 u4_temp; 143 GETBIT(u4_temp, ps_bitstrm->u4_ofst, ps_bitstrm->pu4_buffer); 144 *pu1_prev_intra4x4_pred_mode_flag = (UWORD8)u4_temp; 145 if(!(*pu1_prev_intra4x4_pred_mode_flag)) 146 { 147 GETBITS(u4_temp, ps_bitstrm->u4_ofst, ps_bitstrm->pu4_buffer, 3); 148 149 (*pu1_rem_intra4x4_pred_mode) = (UWORD8)u4_temp; 150 } 151 pu1_prev_intra4x4_pred_mode_flag++; 152 pu1_rem_intra4x4_pred_mode++; 153 } 154 } 155 return (0); 156 } 157 WORD32 ih264d_unpack_coeff4x4_4x4blk(dec_struct_t * ps_dec, 158 WORD16 *pi2_out_coeff_data, 159 UWORD8 *pu1_inv_scan) 160 { 161 tu_sblk4x4_coeff_data_t *ps_tu_4x4 = (tu_sblk4x4_coeff_data_t *)ps_dec->pv_proc_tu_coeff_data; 162 UWORD16 u2_sig_coeff_map = ps_tu_4x4->u2_sig_coeff_map; 163 WORD32 idx = 0; 164 WORD16 *pi2_coeff_data = &ps_tu_4x4->ai2_level[0]; 165 WORD32 dc_only_flag = 0; 166 WORD32 num_coeff = 0; 167 168 PROFILE_DISABLE_UNPACK_LUMA() 169 while(u2_sig_coeff_map) 170 { 171 idx = CLZ(u2_sig_coeff_map); 172 173 idx = 31 - idx; 174 RESET_BIT(u2_sig_coeff_map,idx); 175 176 idx = pu1_inv_scan[idx]; 177 pi2_out_coeff_data[idx] = *pi2_coeff_data++; 178 num_coeff++; 179 } 180 181 if((num_coeff == 1) && (idx == 0)) 182 { 183 dc_only_flag = 1; 184 } 185 186 { 187 WORD32 offset; 188 offset = (UWORD8 *)pi2_coeff_data - (UWORD8 *)ps_tu_4x4; 189 offset = ALIGN4(offset); 190 ps_dec->pv_proc_tu_coeff_data = (void *)((UWORD8 *)ps_dec->pv_proc_tu_coeff_data + offset); 191 } 192 193 return dc_only_flag; 194 } 195 196 UWORD32 ih264d_unpack_coeff4x4_8x8blk(dec_struct_t * ps_dec, 197 dec_mb_info_t * ps_cur_mb_info, 198 UWORD16 ui2_luma_csbp, 199 WORD16 *pi2_out_coeff_data) 200 { 201 UWORD8 *pu1_inv_scan; 202 UWORD8 u1_mb_field_decoding_flag = ps_cur_mb_info->u1_mb_field_decodingflag; 203 UWORD8 u1_field_coding_flag = ps_cur_mb_info->ps_curmb->u1_mb_fld; 204 UWORD32 u4_luma_dc_only_csbp = 0; 205 WORD32 dc_only_flag = 0; 206 207 PROFILE_DISABLE_UNPACK_LUMA() 208 if(u1_field_coding_flag || u1_mb_field_decoding_flag) 209 { 210 pu1_inv_scan = (UWORD8 *)gau1_ih264d_inv_scan_fld; 211 } 212 else 213 { 214 pu1_inv_scan = (UWORD8 *)gau1_ih264d_inv_scan; 215 } 216 217 // sub 0 218 if(ui2_luma_csbp & 0x1) 219 { 220 memset(pi2_out_coeff_data,0,16*sizeof(WORD16)); 221 dc_only_flag = ih264d_unpack_coeff4x4_4x4blk(ps_dec, 222 pi2_out_coeff_data, 223 pu1_inv_scan); 224 225 INSERT_BIT(u4_luma_dc_only_csbp, 0, dc_only_flag); 226 } 227 228 pi2_out_coeff_data += 16; 229 // sub 1 230 if(ui2_luma_csbp & 0x2) 231 { 232 memset(pi2_out_coeff_data,0,16*sizeof(WORD16)); 233 dc_only_flag = ih264d_unpack_coeff4x4_4x4blk(ps_dec, 234 pi2_out_coeff_data, 235 pu1_inv_scan); 236 INSERT_BIT(u4_luma_dc_only_csbp, 1, dc_only_flag); 237 } 238 239 pi2_out_coeff_data += 16 + 32; 240 // sub 2 241 if(ui2_luma_csbp & 0x10) 242 { 243 memset(pi2_out_coeff_data,0,16*sizeof(WORD16)); 244 dc_only_flag = ih264d_unpack_coeff4x4_4x4blk(ps_dec, 245 pi2_out_coeff_data, 246 pu1_inv_scan); 247 INSERT_BIT(u4_luma_dc_only_csbp, 4, dc_only_flag); 248 } 249 250 pi2_out_coeff_data += 16; 251 // sub 3 252 if(ui2_luma_csbp & 0x20) 253 { 254 memset(pi2_out_coeff_data,0,16*sizeof(WORD16)); 255 dc_only_flag = ih264d_unpack_coeff4x4_4x4blk(ps_dec, 256 pi2_out_coeff_data, 257 pu1_inv_scan); 258 INSERT_BIT(u4_luma_dc_only_csbp, 5, dc_only_flag); 259 } 260 return u4_luma_dc_only_csbp; 261 } 262 WORD32 ih264d_unpack_coeff8x8_8x8blk_cavlc(dec_struct_t * ps_dec, 263 dec_mb_info_t * ps_cur_mb_info, 264 UWORD16 ui2_luma_csbp, 265 WORD16 *pi2_out_coeff_data) 266 { 267 UWORD8 *pu1_inv_scan; 268 UWORD8 u1_mb_field_decoding_flag = ps_cur_mb_info->u1_mb_field_decodingflag; 269 UWORD8 u1_field_coding_flag = ps_cur_mb_info->ps_curmb->u1_mb_fld; 270 WORD32 dc_only_flag = 0; 271 272 PROFILE_DISABLE_UNPACK_LUMA() 273 if(ui2_luma_csbp & 0x33) 274 { 275 memset(pi2_out_coeff_data,0,64*sizeof(WORD16)); 276 } 277 278 if(!u1_mb_field_decoding_flag) 279 { 280 pu1_inv_scan = 281 (UWORD8*)gau1_ih264d_inv_scan_prog8x8_cavlc[0]; 282 } 283 else 284 { 285 pu1_inv_scan = 286 (UWORD8*)gau1_ih264d_inv_scan_int8x8_cavlc[0]; 287 } 288 // sub 0 289 if(ui2_luma_csbp & 0x1) 290 { 291 dc_only_flag = ih264d_unpack_coeff4x4_4x4blk(ps_dec, 292 pi2_out_coeff_data, 293 pu1_inv_scan); 294 } 295 296 if(!u1_mb_field_decoding_flag) 297 { 298 pu1_inv_scan = 299 (UWORD8*)gau1_ih264d_inv_scan_prog8x8_cavlc[1]; 300 } 301 else 302 { 303 pu1_inv_scan = 304 (UWORD8*)gau1_ih264d_inv_scan_int8x8_cavlc[1]; 305 } 306 // sub 1 307 if(ui2_luma_csbp & 0x2) 308 { 309 dc_only_flag = 0; 310 ih264d_unpack_coeff4x4_4x4blk(ps_dec, 311 pi2_out_coeff_data, 312 pu1_inv_scan); 313 } 314 315 if(!u1_mb_field_decoding_flag) 316 { 317 pu1_inv_scan = 318 (UWORD8*)gau1_ih264d_inv_scan_prog8x8_cavlc[2]; 319 } 320 else 321 { 322 pu1_inv_scan = 323 (UWORD8*)gau1_ih264d_inv_scan_int8x8_cavlc[2]; 324 } 325 // sub 2 326 if(ui2_luma_csbp & 0x10) 327 { 328 dc_only_flag = 0; 329 ih264d_unpack_coeff4x4_4x4blk(ps_dec, 330 pi2_out_coeff_data, 331 pu1_inv_scan); 332 } 333 334 if(!u1_mb_field_decoding_flag) 335 { 336 pu1_inv_scan = 337 (UWORD8*)gau1_ih264d_inv_scan_prog8x8_cavlc[3]; 338 } 339 else 340 { 341 pu1_inv_scan = 342 (UWORD8*)gau1_ih264d_inv_scan_int8x8_cavlc[3]; 343 } 344 // sub 3 345 if(ui2_luma_csbp & 0x20) 346 { 347 dc_only_flag = 0; 348 ih264d_unpack_coeff4x4_4x4blk(ps_dec, 349 pi2_out_coeff_data, 350 pu1_inv_scan); 351 } 352 return dc_only_flag; 353 } 354 void ih264d_unpack_coeff4x4_8x8blk_chroma(dec_struct_t * ps_dec, 355 dec_mb_info_t * ps_cur_mb_info, 356 UWORD16 ui2_chroma_csbp, 357 WORD16 *pi2_out_coeff_data) 358 { 359 UWORD8 *pu1_inv_scan; 360 UWORD8 u1_mb_field_decoding_flag = ps_cur_mb_info->u1_mb_field_decodingflag; 361 UWORD8 u1_field_coding_flag = ps_cur_mb_info->ps_curmb->u1_mb_fld; 362 363 PROFILE_DISABLE_UNPACK_CHROMA() 364 if(u1_field_coding_flag || u1_mb_field_decoding_flag) 365 { 366 pu1_inv_scan = (UWORD8 *)gau1_ih264d_inv_scan_fld; 367 } 368 else 369 { 370 pu1_inv_scan = (UWORD8 *)gau1_ih264d_inv_scan; 371 } 372 373 if(ui2_chroma_csbp & 0x1) 374 { 375 memset(pi2_out_coeff_data,0,16*sizeof(WORD16)); 376 ih264d_unpack_coeff4x4_4x4blk(ps_dec, 377 pi2_out_coeff_data, 378 pu1_inv_scan); 379 } 380 pi2_out_coeff_data += 16; 381 if(ui2_chroma_csbp & 0x2) 382 { 383 memset(pi2_out_coeff_data,0,16*sizeof(WORD16)); 384 ih264d_unpack_coeff4x4_4x4blk(ps_dec, 385 pi2_out_coeff_data, 386 pu1_inv_scan); 387 } 388 389 pi2_out_coeff_data += 16; 390 if(ui2_chroma_csbp & 0x4) 391 { 392 memset(pi2_out_coeff_data,0,16*sizeof(WORD16)); 393 ih264d_unpack_coeff4x4_4x4blk(ps_dec, 394 pi2_out_coeff_data, 395 pu1_inv_scan); 396 } 397 398 pi2_out_coeff_data += 16; 399 if(ui2_chroma_csbp & 0x8) 400 { 401 memset(pi2_out_coeff_data,0,16*sizeof(WORD16)); 402 ih264d_unpack_coeff4x4_4x4blk(ps_dec, 403 pi2_out_coeff_data, 404 pu1_inv_scan); 405 } 406 } 407 UWORD32 ih264d_unpack_luma_coeff4x4_mb(dec_struct_t * ps_dec, 408 dec_mb_info_t * ps_cur_mb_info, 409 UWORD8 intra_flag) 410 { 411 UWORD8 u1_mb_type = ps_cur_mb_info->u1_mb_type; 412 UWORD16 ui2_luma_csbp = ps_cur_mb_info->u2_luma_csbp; 413 UWORD8 *pu1_inv_scan = ps_dec->pu1_inv_scan; 414 WORD16 *pi2_coeff_data = ps_dec->pi2_coeff_data; 415 416 PROFILE_DISABLE_UNPACK_LUMA() 417 if(!ps_cur_mb_info->u1_tran_form8x8) 418 { 419 UWORD32 u4_luma_dc_only_csbp = 0; 420 UWORD32 u4_temp = 0; 421 WORD16* pi2_dc_val = NULL; 422 /* 423 * Reserve the pointer to dc vals. The dc vals will be copied 424 * after unpacking of ac vals since memset to 0 inside. 425 */ 426 if(intra_flag && (u1_mb_type != I_4x4_MB)) 427 { 428 if(CHECKBIT(ps_cur_mb_info->u1_yuv_dc_block_flag,0)) 429 { 430 pi2_dc_val = (WORD16 *)ps_dec->pv_proc_tu_coeff_data; 431 432 ps_dec->pv_proc_tu_coeff_data = (void *)(pi2_dc_val + 16); 433 } 434 } 435 436 if(ui2_luma_csbp) 437 { 438 pi2_coeff_data = ps_dec->pi2_coeff_data; 439 u4_temp = ih264d_unpack_coeff4x4_8x8blk(ps_dec, 440 ps_cur_mb_info, 441 ui2_luma_csbp, 442 pi2_coeff_data); 443 u4_luma_dc_only_csbp = u4_temp; 444 445 pi2_coeff_data += 32; 446 447 ui2_luma_csbp = ui2_luma_csbp >> 2; 448 u4_temp = ih264d_unpack_coeff4x4_8x8blk(ps_dec, 449 ps_cur_mb_info, 450 ui2_luma_csbp, 451 pi2_coeff_data); 452 453 u4_luma_dc_only_csbp |= (u4_temp << 2); 454 455 pi2_coeff_data += 32 + 64; 456 457 ui2_luma_csbp = ui2_luma_csbp >> 6; 458 u4_temp = ih264d_unpack_coeff4x4_8x8blk(ps_dec, 459 ps_cur_mb_info, 460 ui2_luma_csbp, 461 pi2_coeff_data); 462 463 u4_luma_dc_only_csbp |= (u4_temp << 8); 464 465 pi2_coeff_data += 32; 466 467 ui2_luma_csbp = ui2_luma_csbp >> 2; 468 u4_temp = ih264d_unpack_coeff4x4_8x8blk(ps_dec, 469 ps_cur_mb_info, 470 ui2_luma_csbp, 471 pi2_coeff_data); 472 u4_luma_dc_only_csbp |= (u4_temp << 10); 473 } 474 475 if(pi2_dc_val != NULL) 476 { 477 WORD32 i; 478 pi2_coeff_data = ps_dec->pi2_coeff_data; 479 for(i = 0; i < 4; i++) 480 { 481 pi2_coeff_data[0] = pi2_dc_val[0]; 482 pi2_coeff_data[4 * 16] = pi2_dc_val[4]; 483 pi2_coeff_data[8 * 16] = pi2_dc_val[8]; 484 pi2_coeff_data[12 * 16] = pi2_dc_val[12]; 485 486 pi2_dc_val++; /* Point to next column */ 487 pi2_coeff_data += 16; 488 } 489 u4_luma_dc_only_csbp = ps_cur_mb_info->u2_luma_csbp ^ 0xFFFF; 490 } 491 return u4_luma_dc_only_csbp; 492 } 493 else 494 { 495 UWORD32 u4_luma_dc_only_cbp = 0; 496 WORD32 dc_only_flag; 497 if(ui2_luma_csbp) 498 { 499 pi2_coeff_data = ps_dec->pi2_coeff_data; 500 dc_only_flag = ih264d_unpack_coeff8x8_8x8blk_cavlc(ps_dec, 501 ps_cur_mb_info, 502 ui2_luma_csbp, 503 pi2_coeff_data); 504 INSERT_BIT(u4_luma_dc_only_cbp, 0, dc_only_flag); 505 506 pi2_coeff_data += 64; 507 508 ui2_luma_csbp = ui2_luma_csbp >> 2; 509 dc_only_flag = ih264d_unpack_coeff8x8_8x8blk_cavlc(ps_dec, 510 ps_cur_mb_info, 511 ui2_luma_csbp, 512 pi2_coeff_data); 513 514 INSERT_BIT(u4_luma_dc_only_cbp, 1, dc_only_flag); 515 516 pi2_coeff_data += 64; 517 518 ui2_luma_csbp = ui2_luma_csbp >> 6; 519 dc_only_flag = ih264d_unpack_coeff8x8_8x8blk_cavlc(ps_dec, 520 ps_cur_mb_info, 521 ui2_luma_csbp, 522 pi2_coeff_data); 523 524 INSERT_BIT(u4_luma_dc_only_cbp, 2, dc_only_flag); 525 526 pi2_coeff_data += 64; 527 ui2_luma_csbp = ui2_luma_csbp >> 2; 528 dc_only_flag = ih264d_unpack_coeff8x8_8x8blk_cavlc(ps_dec, 529 ps_cur_mb_info, 530 ui2_luma_csbp, 531 pi2_coeff_data); 532 INSERT_BIT(u4_luma_dc_only_cbp, 3, dc_only_flag); 533 } 534 return u4_luma_dc_only_cbp; 535 } 536 537 } 538 539 void ih264d_unpack_chroma_coeff4x4_mb(dec_struct_t * ps_dec, 540 dec_mb_info_t * ps_cur_mb_info) 541 { 542 UWORD8 u1_mb_type = ps_cur_mb_info->u1_mb_type; 543 UWORD16 ui2_chroma_csbp = ps_cur_mb_info->u2_chroma_csbp; 544 UWORD8 *pu1_inv_scan = ps_dec->pu1_inv_scan; 545 WORD16 *pi2_coeff_data = ps_dec->pi2_coeff_data; 546 WORD32 i; 547 WORD16 *pi2_dc_val_u = NULL; 548 WORD16 *pi2_dc_val_v = NULL; 549 550 PROFILE_DISABLE_UNPACK_CHROMA() 551 if((ps_cur_mb_info->u1_cbp >> 4) == CBPC_ALLZERO) 552 return; 553 554 /* 555 * Reserve the pointers to dc vals. The dc vals will be copied 556 * after unpacking of ac vals since memset to 0 inside. 557 */ 558 if(CHECKBIT(ps_cur_mb_info->u1_yuv_dc_block_flag,1)) 559 { 560 pi2_dc_val_u = (WORD16 *)ps_dec->pv_proc_tu_coeff_data; 561 562 ps_dec->pv_proc_tu_coeff_data = (void *)(pi2_dc_val_u + 4); 563 } 564 if(CHECKBIT(ps_cur_mb_info->u1_yuv_dc_block_flag,2)) 565 { 566 pi2_dc_val_v = (WORD16 *)ps_dec->pv_proc_tu_coeff_data; 567 568 ps_dec->pv_proc_tu_coeff_data = (void *)(pi2_dc_val_v + 4); 569 } 570 571 if((ps_cur_mb_info->u1_cbp >> 4) == CBPC_NONZERO) 572 { 573 pi2_coeff_data = ps_dec->pi2_coeff_data; 574 ih264d_unpack_coeff4x4_8x8blk_chroma(ps_dec, 575 ps_cur_mb_info, 576 ui2_chroma_csbp, 577 pi2_coeff_data); 578 579 pi2_coeff_data += 64; 580 ui2_chroma_csbp = ui2_chroma_csbp >> 4; 581 ih264d_unpack_coeff4x4_8x8blk_chroma(ps_dec, 582 ps_cur_mb_info, 583 ui2_chroma_csbp, 584 pi2_coeff_data); 585 586 } 587 588 pi2_coeff_data = ps_dec->pi2_coeff_data; 589 if(pi2_dc_val_u != NULL) 590 { 591 pi2_coeff_data[0] = *pi2_dc_val_u++; 592 pi2_coeff_data[1 * 16] = *pi2_dc_val_u++; 593 pi2_coeff_data[2 * 16] = *pi2_dc_val_u++; 594 pi2_coeff_data[3 * 16] = *pi2_dc_val_u++; 595 } 596 else 597 { 598 pi2_coeff_data[0] = 0; 599 pi2_coeff_data[1 * 16] = 0; 600 pi2_coeff_data[2 * 16] = 0; 601 pi2_coeff_data[3 * 16] = 0; 602 } 603 pi2_coeff_data += 64; 604 if(pi2_dc_val_v != NULL) 605 { 606 pi2_coeff_data[0] = *pi2_dc_val_v++; 607 pi2_coeff_data[1 * 16] = *pi2_dc_val_v++; 608 pi2_coeff_data[2 * 16] = *pi2_dc_val_v++; 609 pi2_coeff_data[3 * 16] = *pi2_dc_val_v++; 610 } 611 else 612 { 613 pi2_coeff_data[0] = 0; 614 pi2_coeff_data[1 * 16] = 0; 615 pi2_coeff_data[2 * 16] = 0; 616 pi2_coeff_data[3 * 16] = 0; 617 } 618 } 619 UWORD32 ih264d_unpack_luma_coeff8x8_mb(dec_struct_t * ps_dec, 620 dec_mb_info_t * ps_cur_mb_info) 621 { 622 WORD32 blk_8x8_cnt; 623 WORD16 *pi2_out_coeff_data = ps_dec->pi2_coeff_data; 624 UWORD8 u1_field_coding_flag = ps_cur_mb_info->ps_curmb->u1_mb_fld; 625 UWORD8 *pu1_inv_scan; 626 UWORD32 u4_luma_dc_only_cbp = 0; 627 628 PROFILE_DISABLE_UNPACK_LUMA() 629 if(!u1_field_coding_flag) 630 { 631 /*******************************************************************/ 632 /* initializing inverse scan matrices */ 633 /*******************************************************************/ 634 pu1_inv_scan = (UWORD8 *)gau1_ih264d_inv_scan_prog8x8_cabac; 635 } 636 else 637 { 638 /*******************************************************************/ 639 /* initializing inverse scan matrices */ 640 /*******************************************************************/ 641 pu1_inv_scan = (UWORD8 *)gau1_ih264d_inv_scan_int8x8_cabac; 642 } 643 644 for(blk_8x8_cnt = 0; blk_8x8_cnt < 4; blk_8x8_cnt++) 645 { 646 if(CHECKBIT(ps_cur_mb_info->u1_cbp, blk_8x8_cnt)) 647 { 648 tu_blk8x8_coeff_data_t *ps_tu_8x8 = (tu_blk8x8_coeff_data_t *)ps_dec->pv_proc_tu_coeff_data; 649 UWORD32 u4_sig_coeff_map; 650 WORD32 idx = 0; 651 WORD16 *pi2_coeff_data = &ps_tu_8x8->ai2_level[0]; 652 WORD32 num_coeff = 0; 653 654 /* memset 64 coefficient to zero */ 655 memset(pi2_out_coeff_data,0,64*sizeof(WORD16)); 656 657 u4_sig_coeff_map = ps_tu_8x8->au4_sig_coeff_map[1]; 658 659 while(u4_sig_coeff_map) 660 { 661 idx = CLZ(u4_sig_coeff_map); 662 663 idx = 31 - idx; 664 RESET_BIT(u4_sig_coeff_map,idx); 665 666 idx = pu1_inv_scan[idx + 32]; 667 pi2_out_coeff_data[idx] = *pi2_coeff_data++; 668 num_coeff++; 669 } 670 671 u4_sig_coeff_map = ps_tu_8x8->au4_sig_coeff_map[0]; 672 while(u4_sig_coeff_map) 673 { 674 idx = CLZ(u4_sig_coeff_map); 675 676 idx = 31 - idx; 677 RESET_BIT(u4_sig_coeff_map,idx); 678 679 idx = pu1_inv_scan[idx]; 680 pi2_out_coeff_data[idx] = *pi2_coeff_data++; 681 num_coeff++; 682 } 683 684 if((num_coeff == 1) && (idx == 0)) 685 { 686 SET_BIT(u4_luma_dc_only_cbp,blk_8x8_cnt); 687 } 688 689 690 { 691 WORD32 offset; 692 offset = (UWORD8 *)pi2_coeff_data - (UWORD8 *)ps_tu_8x8; 693 offset = ALIGN4(offset); 694 ps_dec->pv_proc_tu_coeff_data = (void *)((UWORD8 *)ps_dec->pv_proc_tu_coeff_data + offset); 695 } 696 } 697 pi2_out_coeff_data += 64; 698 } 699 700 return u4_luma_dc_only_cbp; 701 } 702 /*! 703 ************************************************************************** 704 * \if Function name : ih264d_process_intra_mb \endif 705 * 706 * \brief 707 * This function decodes an I MB. Intraprediction is carried out followed 708 * by InvTramsform. Both IntraPrediction and Reconstrucion are carried out 709 * row buffer itself. 710 * 711 * 712 * \return 713 * 0 on Success and Error code otherwise 714 ************************************************************************** 715 */ 716 WORD32 ih264d_process_intra_mb(dec_struct_t * ps_dec, 717 dec_mb_info_t * ps_cur_mb_info, 718 UWORD8 u1_mb_num) 719 { 720 UWORD8 u1_mb_type = ps_cur_mb_info->u1_mb_type; 721 UWORD8 uc_temp = ps_cur_mb_info->u1_mb_ngbr_availablity; 722 UWORD8 u1_top_available = BOOLEAN(uc_temp & TOP_MB_AVAILABLE_MASK); 723 UWORD8 u1_left_available = BOOLEAN(uc_temp & LEFT_MB_AVAILABLE_MASK); 724 UWORD8 u1_use_top_right_mb = BOOLEAN(uc_temp & TOP_RIGHT_MB_AVAILABLE_MASK); 725 UWORD8 u1_use_top_left_mb = BOOLEAN(uc_temp & TOP_LEFT_MB_AVAILABLE_MASK); 726 UWORD8 uc_useTopMB = u1_top_available; 727 UWORD16 u2_use_left_mb = u1_left_available; 728 UWORD16 u2_use_left_mb_pack; 729 UWORD8 *pu1_luma_pred_buffer; 730 /* CHANGED CODE */ 731 UWORD8 *pu1_luma_rec_buffer; 732 UWORD8 *puc_top; 733 734 mb_neigbour_params_t *ps_left_mb; 735 mb_neigbour_params_t *ps_top_mb; 736 mb_neigbour_params_t *ps_top_right_mb; 737 mb_neigbour_params_t *ps_curmb; 738 739 UWORD16 u2_mbx = ps_cur_mb_info->u2_mbx; 740 UWORD32 ui_pred_width, ui_rec_width; 741 WORD16 *pi2_y_coeff; 742 UWORD8 u1_mbaff, u1_topmb, u1_mb_field_decoding_flag; 743 UWORD32 u4_num_pmbair; 744 UWORD16 ui2_luma_csbp = ps_cur_mb_info->u2_luma_csbp; 745 UWORD8 *pu1_yleft, *pu1_ytop_left; 746 /* Chroma variables*/ 747 UWORD8 *pu1_top_u; 748 UWORD8 *pu1_uleft; 749 UWORD8 *pu1_u_top_left; 750 /* CHANGED CODE */ 751 UWORD8 *pu1_mb_cb_rei1_buffer, *pu1_mb_cr_rei1_buffer; 752 UWORD32 u4_recwidth_cr; 753 /* CHANGED CODE */ 754 tfr_ctxt_t *ps_frame_buf = ps_dec->ps_frame_buf_ip_recon; 755 UWORD32 u4_luma_dc_only_csbp = 0; 756 UWORD32 u4_luma_dc_only_cbp = 0; 757 758 UWORD8 *pu1_prev_intra4x4_pred_mode_data = (UWORD8 *)ps_dec->pv_proc_tu_coeff_data; //Pointer to keep track of intra4x4_pred_mode data in pv_proc_tu_coeff_data buffer 759 u1_mbaff = ps_dec->ps_cur_slice->u1_mbaff_frame_flag; 760 u1_topmb = ps_cur_mb_info->u1_topmb; 761 u4_num_pmbair = (u1_mb_num >> u1_mbaff); 762 763 764 /*--------------------------------------------------------------------*/ 765 /* Find the current MB's mb params */ 766 /*--------------------------------------------------------------------*/ 767 u1_mb_field_decoding_flag = ps_cur_mb_info->u1_mb_field_decodingflag; 768 769 ps_curmb = ps_cur_mb_info->ps_curmb; 770 ps_top_mb = ps_cur_mb_info->ps_top_mb; 771 ps_left_mb = ps_cur_mb_info->ps_left_mb; 772 ps_top_right_mb = ps_cur_mb_info->ps_top_right_mb; 773 774 /*--------------------------------------------------------------------*/ 775 /* Check whether neighbouring MB is Inter MB and */ 776 /* constrained intra pred is 1. */ 777 /*--------------------------------------------------------------------*/ 778 u2_use_left_mb_pack = (u2_use_left_mb << 8) + u2_use_left_mb; 779 780 if(ps_dec->ps_cur_pps->u1_constrained_intra_pred_flag) 781 { 782 UWORD8 u1_left = (UWORD8)u2_use_left_mb; 783 784 uc_useTopMB = uc_useTopMB 785 && ((ps_top_mb->u1_mb_type != P_MB) 786 && (ps_top_mb->u1_mb_type != B_MB)); 787 u2_use_left_mb = u2_use_left_mb 788 && ((ps_left_mb->u1_mb_type != P_MB) 789 && (ps_left_mb->u1_mb_type != B_MB)); 790 791 u2_use_left_mb_pack = (u2_use_left_mb << 8) + u2_use_left_mb; 792 if(u1_mbaff) 793 { 794 if(u1_mb_field_decoding_flag ^ ps_left_mb->u1_mb_fld) 795 { 796 u1_left = u1_left 797 && (((ps_left_mb + 1)->u1_mb_type != P_MB) 798 && ((ps_left_mb + 1)->u1_mb_type 799 != B_MB)); 800 u2_use_left_mb = u2_use_left_mb && u1_left; 801 if(u1_mb_field_decoding_flag) 802 u2_use_left_mb_pack = (u1_left << 8) 803 + (u2_use_left_mb_pack & 0xff); 804 else 805 u2_use_left_mb_pack = (u2_use_left_mb << 8) 806 + (u2_use_left_mb); 807 } 808 } 809 u1_use_top_right_mb = 810 u1_use_top_right_mb 811 && ((ps_top_right_mb->u1_mb_type != P_MB) 812 && (ps_top_right_mb->u1_mb_type 813 != B_MB)); 814 815 u1_use_top_left_mb = 816 u1_use_top_left_mb 817 && ((ps_cur_mb_info->u1_topleft_mbtype != P_MB) 818 && (ps_cur_mb_info->u1_topleft_mbtype 819 != B_MB)); 820 } 821 822 /*********************Common pointer calculations *************************/ 823 /* CHANGED CODE */ 824 pu1_luma_pred_buffer = ps_dec->pu1_y; 825 pu1_luma_rec_buffer = ps_frame_buf->pu1_dest_y + (u4_num_pmbair << 4); 826 pu1_mb_cb_rei1_buffer = ps_frame_buf->pu1_dest_u 827 + (u4_num_pmbair << 3) * YUV420SP_FACTOR; 828 pu1_mb_cr_rei1_buffer = ps_frame_buf->pu1_dest_v + (u4_num_pmbair << 3); 829 ui_pred_width = MB_SIZE; 830 ui_rec_width = ps_dec->u2_frm_wd_y << u1_mb_field_decoding_flag; 831 u4_recwidth_cr = ps_dec->u2_frm_wd_uv << u1_mb_field_decoding_flag; 832 /************* Current and top luma pointer *****************/ 833 834 if(u1_mbaff) 835 { 836 if(u1_topmb == 0) 837 { 838 pu1_luma_rec_buffer += ( 839 u1_mb_field_decoding_flag ? 840 (ui_rec_width >> 1) : 841 (ui_rec_width << 4)); 842 pu1_mb_cb_rei1_buffer += ( 843 u1_mb_field_decoding_flag ? 844 (u4_recwidth_cr >> 1) : 845 (u4_recwidth_cr << 3)); 846 pu1_mb_cr_rei1_buffer += ( 847 u1_mb_field_decoding_flag ? 848 (u4_recwidth_cr >> 1) : 849 (u4_recwidth_cr << 3)); 850 } 851 } 852 853 /* CHANGED CODE */ 854 if(ps_dec->u4_use_intrapred_line_copy == 1) 855 { 856 puc_top = ps_dec->pu1_prev_y_intra_pred_line + (ps_cur_mb_info->u2_mbx << 4); 857 pu1_top_u = ps_dec->pu1_prev_u_intra_pred_line 858 + (ps_cur_mb_info->u2_mbx << 3) * YUV420SP_FACTOR; 859 } 860 else 861 { 862 puc_top = pu1_luma_rec_buffer - ui_rec_width; 863 pu1_top_u = pu1_mb_cb_rei1_buffer - u4_recwidth_cr; 864 } 865 /* CHANGED CODE */ 866 867 /************* Left pointer *****************/ 868 pu1_yleft = pu1_luma_rec_buffer - 1; 869 pu1_uleft = pu1_mb_cb_rei1_buffer - 1 * YUV420SP_FACTOR; 870 871 /**************Top Left pointer calculation**********/ 872 pu1_ytop_left = puc_top - 1; 873 pu1_u_top_left = pu1_top_u - 1 * YUV420SP_FACTOR; 874 875 /* CHANGED CODE */ 876 PROFILE_DISABLE_INTRA_PRED() 877 { 878 pu1_prev_intra4x4_pred_mode_data = (UWORD8 *)ps_dec->pv_proc_tu_coeff_data; 879 if(u1_mb_type == I_4x4_MB && ps_cur_mb_info->u1_tran_form8x8 == 0) 880 { 881 ps_dec->pv_proc_tu_coeff_data = (void *)((UWORD8 *)ps_dec->pv_proc_tu_coeff_data + 32); 882 883 } 884 else if (u1_mb_type == I_4x4_MB && ps_cur_mb_info->u1_tran_form8x8 == 1) 885 { 886 ps_dec->pv_proc_tu_coeff_data = (void *)((UWORD8 *)ps_dec->pv_proc_tu_coeff_data + 8); 887 } 888 } 889 if(!ps_cur_mb_info->u1_tran_form8x8) 890 { 891 u4_luma_dc_only_csbp = ih264d_unpack_luma_coeff4x4_mb(ps_dec, 892 ps_cur_mb_info, 893 1); 894 } 895 else 896 { 897 if(!ps_dec->ps_cur_pps->u1_entropy_coding_mode) 898 { 899 u4_luma_dc_only_cbp = ih264d_unpack_luma_coeff4x4_mb(ps_dec, 900 ps_cur_mb_info, 901 1); 902 } 903 else 904 { 905 u4_luma_dc_only_cbp = ih264d_unpack_luma_coeff8x8_mb(ps_dec, 906 ps_cur_mb_info); 907 } 908 } 909 910 pi2_y_coeff = ps_dec->pi2_coeff_data; 911 912 if(u1_mb_type != I_4x4_MB) 913 { 914 UWORD8 u1_intrapred_mode = MB_TYPE_TO_INTRA_16x16_MODE(u1_mb_type); 915 /*--------------------------------------------------------------------*/ 916 /* 16x16 IntraPrediction */ 917 /*--------------------------------------------------------------------*/ 918 { 919 UWORD8 u1_packed_modes = (u1_top_available << 1) 920 + u1_left_available; 921 UWORD8 u1_err_code = 922 (u1_intrapred_mode & 1) ? 923 u1_intrapred_mode : 924 (u1_intrapred_mode ^ 2); 925 926 if((u1_err_code & u1_packed_modes) ^ u1_err_code) 927 { 928 u1_intrapred_mode = 0; 929 ps_dec->i4_error_code = ERROR_INTRAPRED; 930 } 931 } 932 { 933 /* Align the size to multiple of 8, so that SIMD functions 934 can read 64 bits at a time. Only 33 bytes are actaully used */ 935 UWORD8 au1_ngbr_pels[40]; 936 /* Get neighbour pixels */ 937 /* left pels */ 938 if(u2_use_left_mb) 939 { 940 WORD32 i; 941 for(i = 0; i < 16; i++) 942 au1_ngbr_pels[16 - 1 - i] = pu1_yleft[i * ui_rec_width]; 943 } 944 else 945 { 946 memset(au1_ngbr_pels, 0, 16); 947 } 948 949 /* top left pels */ 950 au1_ngbr_pels[16] = *pu1_ytop_left; 951 952 /* top pels */ 953 if(uc_useTopMB) 954 { 955 memcpy(au1_ngbr_pels + 16 + 1, puc_top, 16); 956 } 957 else 958 { 959 memset(au1_ngbr_pels + 16 + 1, 0, 16); 960 } 961 PROFILE_DISABLE_INTRA_PRED() 962 ps_dec->apf_intra_pred_luma_16x16[u1_intrapred_mode]( 963 au1_ngbr_pels, pu1_luma_rec_buffer, 1, ui_rec_width, 964 ((uc_useTopMB << 2) | u2_use_left_mb)); 965 } 966 { 967 UWORD32 i; 968 WORD16 ai2_tmp[16]; 969 for(i = 0; i < 16; i++) 970 { 971 WORD16 *pi2_level = pi2_y_coeff + (i << 4); 972 UWORD8 *pu1_pred_sblk = pu1_luma_rec_buffer 973 + ((i & 0x3) * BLK_SIZE) 974 + (i >> 2) * (ui_rec_width << 2); 975 PROFILE_DISABLE_IQ_IT_RECON() 976 { 977 if(CHECKBIT(ps_cur_mb_info->u2_luma_csbp, i)) 978 { 979 ps_dec->pf_iquant_itrans_recon_luma_4x4( 980 pi2_level, 981 pu1_pred_sblk, 982 pu1_pred_sblk, 983 ui_rec_width, 984 ui_rec_width, 985 gau2_ih264_iquant_scale_4x4[ps_cur_mb_info->u1_qp_rem6], 986 (UWORD16 *)ps_dec->s_high_profile.i2_scalinglist4x4[0], 987 ps_cur_mb_info->u1_qp_div6, ai2_tmp, 1, 988 pi2_level); 989 } 990 else if((CHECKBIT(u4_luma_dc_only_csbp, i)) && pi2_level[0] != 0) 991 { 992 ps_dec->pf_iquant_itrans_recon_luma_4x4_dc( 993 pi2_level, 994 pu1_pred_sblk, 995 pu1_pred_sblk, 996 ui_rec_width, 997 ui_rec_width, 998 gau2_ih264_iquant_scale_4x4[ps_cur_mb_info->u1_qp_rem6], 999 (UWORD16 *)ps_dec->s_high_profile.i2_scalinglist4x4[0], 1000 ps_cur_mb_info->u1_qp_div6, ai2_tmp, 1, 1001 pi2_level); 1002 } 1003 } 1004 } 1005 } 1006 } 1007 else if(!ps_cur_mb_info->u1_tran_form8x8) 1008 { 1009 UWORD8 u1_is_left_sub_block, u1_is_top_sub_block = uc_useTopMB; 1010 UWORD8 u1_sub_blk_x, u1_sub_blk_y, u1_sub_mb_num; 1011 WORD8 i1_top_pred_mode; 1012 WORD8 i1_left_pred_mode; 1013 UWORD8 *pu1_top, *pu1_left, *pu1_top_left, *pu1_top_right; 1014 WORD8 *pi1_cur_pred_mode, *pi1_left_pred_mode, *pc_topPredMode; 1015 UWORD16 ui2_left_pred_buf_width = 0xffff; 1016 WORD8 i1_intra_pred; 1017 UWORD8 *pu1_prev_intra4x4_pred_mode_flag = pu1_prev_intra4x4_pred_mode_data; 1018 UWORD8 *pu1_rem_intra4x4_pred_mode = pu1_prev_intra4x4_pred_mode_data + 16; 1019 WORD16 *pi2_y_coeff1; 1020 UWORD8 u1_cur_sub_block; 1021 UWORD16 ui2_top_rt_mask; 1022 1023 /*--------------------------------------------------------------------*/ 1024 /* 4x4 IntraPrediction */ 1025 /*--------------------------------------------------------------------*/ 1026 /* Calculation of Top Right subblock mask */ 1027 /* */ 1028 /* (a) Set it to default mask */ 1029 /* [It has 0 for sublocks which will never have top-right sub block] */ 1030 /* */ 1031 /* (b) If top MB is not available */ 1032 /* Clear the bits of the first row sub blocks */ 1033 /* */ 1034 /* (c) Set/Clear bit for top-right sublock of MB */ 1035 /* [5 sub-block in decoding order] based on TOP RIGHT MB availablity */ 1036 /*--------------------------------------------------------------------*/ 1037 1038 pu1_top = puc_top; 1039 1040 ui2_top_rt_mask = (u1_use_top_right_mb << 3) | (0x5750); 1041 if(uc_useTopMB) 1042 ui2_top_rt_mask |= 0x7; 1043 1044 /*Top Related initialisations*/ 1045 1046 1047 pi1_cur_pred_mode = ps_cur_mb_info->ps_curmb->pi1_intrapredmodes; 1048 pc_topPredMode = ps_cur_mb_info->ps_top_mb->pi1_intrapredmodes; 1049 /*-------------------------------------- 1050 if(u1_mbaff) 1051 { 1052 1053 pi1_cur_pred_mode += (u2_mbx << 2); 1054 pc_topPredMode = pi1_cur_pred_mode + ps_cur_mb_info->i1_offset; 1055 pi1_cur_pred_mode += (u1_topmb) ? 0: 4; 1056 }*/ 1057 1058 if(u1_top_available) 1059 { 1060 if(ps_top_mb->u1_mb_type == I_4x4_MB) 1061 *(WORD32*)pi1_cur_pred_mode = *(WORD32*)pc_topPredMode; 1062 else 1063 *(WORD32*)pi1_cur_pred_mode = 1064 (uc_useTopMB) ? DC_DC_DC_DC : NOT_VALID; 1065 } 1066 else 1067 *(WORD32*)pi1_cur_pred_mode = NOT_VALID; 1068 /* CHANGED CODE */ 1069 1070 /* CHANGED CODE */ 1071 1072 /*Left Related initialisations*/ 1073 pi1_left_pred_mode = ps_dec->pi1_left_pred_mode; 1074 if(!u1_mbaff) 1075 { 1076 1077 if(u1_left_available) 1078 { 1079 1080 if(ps_left_mb->u1_mb_type != I_4x4_MB) 1081 *(WORD32*)pi1_left_pred_mode = 1082 (u2_use_left_mb_pack) ? 1083 DC_DC_DC_DC : 1084 NOT_VALID; 1085 1086 } 1087 else 1088 { 1089 1090 *(WORD32*)pi1_left_pred_mode = NOT_VALID; 1091 } 1092 1093 } 1094 else 1095 { 1096 UWORD8 u1_curMbfld = ps_cur_mb_info->u1_mb_field_decodingflag; 1097 UWORD8 u1_leftMbfld = ps_left_mb->u1_mb_fld; 1098 1099 if(u1_curMbfld ^ u1_leftMbfld) 1100 { 1101 1102 if(u1_topmb 1103 | ((u1_topmb == 0) 1104 && ((ps_curmb - 1)->u1_mb_type 1105 != I_4x4_MB))) 1106 { 1107 if(u1_left_available) 1108 { 1109 if(ps_left_mb->u1_mb_type != I_4x4_MB) 1110 { 1111 if(CHECKBIT(u2_use_left_mb_pack,0) == 0) 1112 *(WORD32*)pi1_left_pred_mode = NOT_VALID; 1113 else 1114 *(WORD32*)pi1_left_pred_mode = DC_DC_DC_DC; 1115 } 1116 } 1117 else 1118 *(WORD32*)pi1_left_pred_mode = NOT_VALID; 1119 1120 if(u1_curMbfld) 1121 { 1122 if(u1_left_available) 1123 { 1124 if((ps_left_mb + 1)->u1_mb_type != I_4x4_MB) 1125 { 1126 if(u2_use_left_mb_pack >> 8) 1127 *(WORD32*)(pi1_left_pred_mode + 4) = 1128 DC_DC_DC_DC; 1129 else 1130 *(WORD32*)(pi1_left_pred_mode + 4) = 1131 NOT_VALID; 1132 } 1133 } 1134 else 1135 *(WORD32*)(pi1_left_pred_mode + 4) = NOT_VALID; 1136 pi1_left_pred_mode[1] = pi1_left_pred_mode[2]; 1137 pi1_left_pred_mode[2] = pi1_left_pred_mode[4]; 1138 pi1_left_pred_mode[3] = pi1_left_pred_mode[6]; 1139 *(WORD32*)(pi1_left_pred_mode + 4) = 1140 *(WORD32*)pi1_left_pred_mode; 1141 } 1142 else 1143 { 1144 1145 pi1_left_pred_mode[7] = pi1_left_pred_mode[3]; 1146 pi1_left_pred_mode[6] = pi1_left_pred_mode[3]; 1147 pi1_left_pred_mode[5] = pi1_left_pred_mode[2]; 1148 pi1_left_pred_mode[4] = pi1_left_pred_mode[2]; 1149 pi1_left_pred_mode[3] = pi1_left_pred_mode[1]; 1150 pi1_left_pred_mode[2] = pi1_left_pred_mode[1]; 1151 pi1_left_pred_mode[1] = pi1_left_pred_mode[0]; 1152 } 1153 } 1154 pi1_left_pred_mode += (u1_topmb) ? 0 : 4; 1155 } 1156 else 1157 { 1158 1159 pi1_left_pred_mode += (u1_topmb) ? 0 : 4; 1160 if(u1_left_available) 1161 { 1162 1163 if(ps_left_mb->u1_mb_type != I_4x4_MB) 1164 *(WORD32*)pi1_left_pred_mode = 1165 (u2_use_left_mb_pack) ? 1166 DC_DC_DC_DC : 1167 NOT_VALID; 1168 } 1169 else 1170 *(WORD32*)pi1_left_pred_mode = NOT_VALID; 1171 } 1172 } 1173 /* One time pointer initialisations*/ 1174 pi2_y_coeff1 = pi2_y_coeff; 1175 pu1_top_left = pu1_ytop_left; 1176 1177 /* Scan the sub-blocks in Raster Scan Order */ 1178 for(u1_sub_mb_num = 0; u1_sub_mb_num < 16; u1_sub_mb_num++) 1179 { 1180 /* Align the size to multiple of 8, so that SIMD functions 1181 can read 64 bits at a time. Only 13 bytes are actaully used */ 1182 UWORD8 au1_ngbr_pels[16]; 1183 1184 u1_sub_blk_x = u1_sub_mb_num & 0x3; 1185 u1_sub_blk_y = u1_sub_mb_num >> 2; 1186 i1_top_pred_mode = pi1_cur_pred_mode[u1_sub_blk_x]; 1187 i1_left_pred_mode = pi1_left_pred_mode[u1_sub_blk_y]; 1188 u1_use_top_right_mb = (!!CHECKBIT(ui2_top_rt_mask, u1_sub_mb_num)); 1189 1190 /*********** left subblock availability**********/ 1191 if(u1_sub_blk_x) 1192 u1_is_left_sub_block = 1; 1193 else 1194 u1_is_left_sub_block = 1195 (u1_sub_blk_y < 2) ? 1196 (CHECKBIT(u2_use_left_mb_pack, 1197 0)) : 1198 (u2_use_left_mb_pack >> 8); 1199 1200 /* CHANGED CODE */ 1201 if(u1_sub_blk_y) 1202 u1_is_top_sub_block = 1; 1203 1204 /* CHANGED CODE */ 1205 /***************** Top *********************/ 1206 if(ps_dec->u4_use_intrapred_line_copy == 1) 1207 { 1208 1209 if(u1_sub_blk_y) 1210 pu1_top = pu1_luma_rec_buffer - ui_rec_width; 1211 else 1212 pu1_top = puc_top + (u1_sub_blk_x << 2); 1213 } 1214 else 1215 { 1216 pu1_top = pu1_luma_rec_buffer - ui_rec_width; 1217 } 1218 /***************** Top Right *********************/ 1219 pu1_top_right = pu1_top + 4; 1220 /***************** Top Left *********************/ 1221 pu1_top_left = pu1_top - 1; 1222 /***************** Left *********************/ 1223 pu1_left = pu1_luma_rec_buffer - 1; 1224 /* CHANGED CODE */ 1225 1226 /*---------------------------------------------------------------*/ 1227 /* Calculation of Intra prediction mode */ 1228 /*---------------------------------------------------------------*/ 1229 i1_intra_pred = ((i1_left_pred_mode < 0) | (i1_top_pred_mode < 0)) ? 1230 DC : MIN(i1_left_pred_mode, i1_top_pred_mode); 1231 { 1232 UWORD8 u1_packed_modes = (u1_is_top_sub_block << 1) 1233 + u1_is_left_sub_block; 1234 UWORD8 *pu1_intra_err_codes = 1235 (UWORD8 *)gau1_ih264d_intra_pred_err_code; 1236 UWORD8 uc_b2b0 = ((u1_sub_mb_num & 4) >> 1) | (u1_sub_mb_num & 1); 1237 UWORD8 uc_b3b1 = ((u1_sub_mb_num & 8) >> 2) 1238 | ((u1_sub_mb_num & 2) >> 1); 1239 1240 u1_cur_sub_block = (uc_b3b1 << 2) + uc_b2b0; 1241 PROFILE_DISABLE_INTRA_PRED() 1242 if(!pu1_prev_intra4x4_pred_mode_flag[u1_cur_sub_block]) 1243 { 1244 i1_intra_pred = 1245 pu1_rem_intra4x4_pred_mode[u1_cur_sub_block] 1246 + (pu1_rem_intra4x4_pred_mode[u1_cur_sub_block] 1247 >= i1_intra_pred); 1248 } 1249 i1_intra_pred = CLIP3(0, 8, i1_intra_pred); 1250 { 1251 UWORD8 u1_err_code = pu1_intra_err_codes[i1_intra_pred]; 1252 1253 if((u1_err_code & u1_packed_modes) ^ u1_err_code) 1254 { 1255 i1_intra_pred = 0; 1256 ps_dec->i4_error_code = ERROR_INTRAPRED; 1257 } 1258 1259 } 1260 } 1261 { 1262 /* Get neighbour pixels */ 1263 /* left pels */ 1264 if(u1_is_left_sub_block) 1265 { 1266 WORD32 i; 1267 for(i = 0; i < 4; i++) 1268 au1_ngbr_pels[4 - 1 - i] = pu1_left[i * ui_rec_width]; 1269 } 1270 else 1271 { 1272 memset(au1_ngbr_pels, 0, 4); 1273 } 1274 1275 /* top left pels */ 1276 au1_ngbr_pels[4] = *pu1_top_left; 1277 1278 /* top pels */ 1279 if(u1_is_top_sub_block) 1280 { 1281 memcpy(au1_ngbr_pels + 4 + 1, pu1_top, 4); 1282 } 1283 else 1284 { 1285 memset(au1_ngbr_pels + 4 + 1, 0, 4); 1286 } 1287 1288 /* top right pels */ 1289 if(u1_use_top_right_mb) 1290 { 1291 memcpy(au1_ngbr_pels + 4 * 2 + 1, pu1_top_right, 4); 1292 } 1293 else if(u1_is_top_sub_block) 1294 { 1295 memset(au1_ngbr_pels + 4 * 2 + 1, au1_ngbr_pels[4 * 2], 4); 1296 } 1297 } 1298 PROFILE_DISABLE_INTRA_PRED() 1299 ps_dec->apf_intra_pred_luma_4x4[i1_intra_pred]( 1300 au1_ngbr_pels, pu1_luma_rec_buffer, 1, 1301 ui_rec_width, 1302 ((u1_is_top_sub_block << 2) | u1_is_left_sub_block)); 1303 1304 /* CHANGED CODE */ 1305 if(CHECKBIT(ui2_luma_csbp, u1_sub_mb_num)) 1306 { 1307 WORD16 ai2_tmp[16]; 1308 PROFILE_DISABLE_IQ_IT_RECON() 1309 { 1310 if(CHECKBIT(u4_luma_dc_only_csbp, u1_sub_mb_num)) 1311 { 1312 ps_dec->pf_iquant_itrans_recon_luma_4x4_dc( 1313 pi2_y_coeff1, 1314 pu1_luma_rec_buffer, 1315 pu1_luma_rec_buffer, 1316 ui_rec_width, 1317 ui_rec_width, 1318 gau2_ih264_iquant_scale_4x4[ps_cur_mb_info->u1_qp_rem6], 1319 (UWORD16 *)ps_dec->s_high_profile.i2_scalinglist4x4[0], 1320 ps_cur_mb_info->u1_qp_div6, ai2_tmp, 0, 1321 NULL); 1322 } 1323 else 1324 { 1325 ps_dec->pf_iquant_itrans_recon_luma_4x4( 1326 pi2_y_coeff1, 1327 pu1_luma_rec_buffer, 1328 pu1_luma_rec_buffer, 1329 ui_rec_width, 1330 ui_rec_width, 1331 gau2_ih264_iquant_scale_4x4[ps_cur_mb_info->u1_qp_rem6], 1332 (UWORD16 *)ps_dec->s_high_profile.i2_scalinglist4x4[0], 1333 ps_cur_mb_info->u1_qp_div6, ai2_tmp, 0, 1334 NULL); 1335 } 1336 } 1337 1338 } 1339 1340 /*---------------------------------------------------------------*/ 1341 /* Update sub block number */ 1342 /*---------------------------------------------------------------*/ 1343 pi2_y_coeff1 += 16; 1344 pu1_luma_rec_buffer += 1345 (u1_sub_blk_x == 3) ? (ui_rec_width << 2) - 12 : 4; 1346 pu1_luma_pred_buffer += 1347 (u1_sub_blk_x == 3) ? (ui_pred_width << 2) - 12 : 4; 1348 /* CHANGED CODE */ 1349 pi1_cur_pred_mode[u1_sub_blk_x] = i1_intra_pred; 1350 pi1_left_pred_mode[u1_sub_blk_y] = i1_intra_pred; 1351 } 1352 } 1353 else if((u1_mb_type == I_4x4_MB) && (ps_cur_mb_info->u1_tran_form8x8 == 1)) 1354 { 1355 UWORD8 u1_is_left_sub_block, u1_is_top_sub_block = uc_useTopMB; 1356 UWORD8 u1_sub_blk_x, u1_sub_blk_y, u1_sub_mb_num; 1357 WORD8 i1_top_pred_mode; 1358 WORD8 i1_left_pred_mode; 1359 UWORD8 *pu1_top, *pu1_left, *pu1_top_left; 1360 WORD8 *pi1_cur_pred_mode, *pi1_left_pred_mode, *pc_topPredMode; 1361 UWORD16 ui2_left_pred_buf_width = 0xffff; 1362 WORD8 i1_intra_pred; 1363 UWORD8 *pu1_prev_intra4x4_pred_mode_flag = pu1_prev_intra4x4_pred_mode_data; 1364 UWORD8 *pu1_rem_intra4x4_pred_mode = pu1_prev_intra4x4_pred_mode_data + 4; 1365 WORD16 *pi2_y_coeff1; 1366 UWORD16 ui2_top_rt_mask; 1367 UWORD32 u4_4x4_left_offset = 0; 1368 1369 /*--------------------------------------------------------------------*/ 1370 /* 8x8 IntraPrediction */ 1371 /*--------------------------------------------------------------------*/ 1372 /* Calculation of Top Right subblock mask */ 1373 /* */ 1374 /* (a) Set it to default mask */ 1375 /* [It has 0 for sublocks which will never have top-right sub block] */ 1376 /* */ 1377 /* (b) If top MB is not available */ 1378 /* Clear the bits of the first row sub blocks */ 1379 /* */ 1380 /* (c) Set/Clear bit for top-right sublock of MB */ 1381 /* [5 sub-block in decoding order] based on TOP RIGHT MB availablity */ 1382 /* */ 1383 /* ui2_top_rt_mask: marks availibility of top right(neighbour) */ 1384 /* in the 8x8 Block ordering */ 1385 /* */ 1386 /* tr0 tr1 */ 1387 /* 0 1 tr3 */ 1388 /* 2 3 */ 1389 /* */ 1390 /* Top rights for 0 is in top MB */ 1391 /* top right of 1 will be in top right MB */ 1392 /* top right of 3 in right MB and hence not available */ 1393 /* This corresponds to ui2_top_rt_mask having default value 0x4 */ 1394 /*--------------------------------------------------------------------*/ 1395 1396 ui2_top_rt_mask = (u1_use_top_right_mb << 1) | (0x4); 1397 1398 if(uc_useTopMB) 1399 { 1400 ui2_top_rt_mask |= 0x1; 1401 } 1402 1403 /* Top Related initialisations */ 1404 pi1_cur_pred_mode = ps_cur_mb_info->ps_curmb->pi1_intrapredmodes; 1405 pc_topPredMode = ps_cur_mb_info->ps_top_mb->pi1_intrapredmodes; 1406 /* 1407 if(u1_mbaff) 1408 { 1409 pi1_cur_pred_mode += (u2_mbx << 2); 1410 pc_topPredMode = pi1_cur_pred_mode + ps_cur_mb_info->i1_offset; 1411 pi1_cur_pred_mode += (u1_topmb) ? 0: 4; 1412 } 1413 */ 1414 if(u1_top_available) 1415 { 1416 if(ps_top_mb->u1_mb_type == I_4x4_MB) 1417 { 1418 *(WORD32*)pi1_cur_pred_mode = *(WORD32*)pc_topPredMode; 1419 } 1420 else 1421 { 1422 *(WORD32*)pi1_cur_pred_mode = 1423 (uc_useTopMB) ? DC_DC_DC_DC : NOT_VALID; 1424 } 1425 } 1426 else 1427 { 1428 *(WORD32*)pi1_cur_pred_mode = NOT_VALID; 1429 } 1430 1431 pu1_top = puc_top - 8; 1432 1433 /*Left Related initialisations*/ 1434 pi1_left_pred_mode = ps_dec->pi1_left_pred_mode; 1435 1436 if(!u1_mbaff) 1437 { 1438 if(u1_left_available) 1439 { 1440 if(ps_left_mb->u1_mb_type != I_4x4_MB) 1441 { 1442 *(WORD32*)pi1_left_pred_mode = 1443 (u2_use_left_mb_pack) ? 1444 DC_DC_DC_DC : 1445 NOT_VALID; 1446 } 1447 } 1448 else 1449 { 1450 *(WORD32*)pi1_left_pred_mode = NOT_VALID; 1451 } 1452 } 1453 else 1454 { 1455 UWORD8 u1_curMbfld = ps_cur_mb_info->u1_mb_field_decodingflag; 1456 1457 UWORD8 u1_leftMbfld = ps_left_mb->u1_mb_fld; 1458 1459 if((!u1_curMbfld) && (u1_leftMbfld)) 1460 { 1461 u4_4x4_left_offset = 1; 1462 } 1463 1464 if(u1_curMbfld ^ u1_leftMbfld) 1465 { 1466 1467 if(u1_topmb 1468 | ((u1_topmb == 0) 1469 && ((ps_curmb - 1)->u1_mb_type 1470 != I_4x4_MB))) 1471 1472 { 1473 if(u1_left_available) 1474 { 1475 if(ps_left_mb->u1_mb_type != I_4x4_MB) 1476 { 1477 if(CHECKBIT(u2_use_left_mb_pack,0) == 0) 1478 { 1479 *(WORD32*)pi1_left_pred_mode = NOT_VALID; 1480 } 1481 else 1482 { 1483 *(WORD32*)pi1_left_pred_mode = DC_DC_DC_DC; 1484 } 1485 } 1486 } 1487 else 1488 { 1489 *(WORD32*)pi1_left_pred_mode = NOT_VALID; 1490 } 1491 1492 if(u1_curMbfld) 1493 { 1494 if(u1_left_available) 1495 { 1496 if((ps_left_mb + 1)->u1_mb_type != I_4x4_MB) 1497 { 1498 if(u2_use_left_mb_pack >> 8) 1499 { 1500 *(WORD32*)(pi1_left_pred_mode + 4) = 1501 DC_DC_DC_DC; 1502 } 1503 else 1504 { 1505 *(WORD32*)(pi1_left_pred_mode + 4) = 1506 NOT_VALID; 1507 } 1508 } 1509 } 1510 else 1511 { 1512 *(WORD32*)(pi1_left_pred_mode + 4) = NOT_VALID; 1513 } 1514 1515 pi1_left_pred_mode[1] = pi1_left_pred_mode[2]; 1516 pi1_left_pred_mode[2] = pi1_left_pred_mode[4]; 1517 pi1_left_pred_mode[3] = pi1_left_pred_mode[6]; 1518 *(WORD32*)(pi1_left_pred_mode + 4) = 1519 *(WORD32*)pi1_left_pred_mode; 1520 } 1521 else 1522 { 1523 pi1_left_pred_mode[7] = pi1_left_pred_mode[3]; 1524 pi1_left_pred_mode[6] = pi1_left_pred_mode[3]; 1525 pi1_left_pred_mode[5] = pi1_left_pred_mode[2]; 1526 pi1_left_pred_mode[4] = pi1_left_pred_mode[2]; 1527 pi1_left_pred_mode[3] = pi1_left_pred_mode[1]; 1528 pi1_left_pred_mode[2] = pi1_left_pred_mode[1]; 1529 pi1_left_pred_mode[1] = pi1_left_pred_mode[0]; 1530 } 1531 } 1532 pi1_left_pred_mode += (u1_topmb) ? 0 : 4; 1533 } 1534 else 1535 { 1536 pi1_left_pred_mode += (u1_topmb) ? 0 : 4; 1537 1538 if(u1_left_available) 1539 { 1540 if(ps_left_mb->u1_mb_type != I_4x4_MB) 1541 { 1542 *(WORD32*)pi1_left_pred_mode = 1543 (u2_use_left_mb_pack) ? 1544 DC_DC_DC_DC : 1545 NOT_VALID; 1546 } 1547 } 1548 else 1549 { 1550 *(WORD32*)pi1_left_pred_mode = NOT_VALID; 1551 } 1552 } 1553 } 1554 1555 /* One time pointer initialisations*/ 1556 pi2_y_coeff1 = pi2_y_coeff; 1557 1558 if(u1_use_top_left_mb) 1559 { 1560 pu1_top_left = pu1_ytop_left; 1561 } 1562 else 1563 { 1564 pu1_top_left = NULL; 1565 } 1566 1567 /* Scan the sub-blocks in Raster Scan Order */ 1568 for(u1_sub_mb_num = 0; u1_sub_mb_num < 4; u1_sub_mb_num++) 1569 { 1570 u1_sub_blk_x = (u1_sub_mb_num & 0x1); 1571 u1_sub_blk_y = (u1_sub_mb_num >> 1); 1572 i1_top_pred_mode = pi1_cur_pred_mode[u1_sub_blk_x << 1]; 1573 i1_left_pred_mode = pi1_left_pred_mode[u1_sub_blk_y << 1]; 1574 1575 if(2 == u1_sub_mb_num) 1576 { 1577 i1_left_pred_mode = pi1_left_pred_mode[(u1_sub_blk_y << 1) 1578 + u4_4x4_left_offset]; 1579 } 1580 1581 u1_use_top_right_mb = (!!CHECKBIT(ui2_top_rt_mask, u1_sub_mb_num)); 1582 1583 /*********** left subblock availability**********/ 1584 if(u1_sub_blk_x) 1585 { 1586 u1_is_left_sub_block = 1; 1587 } 1588 else 1589 { 1590 u1_is_left_sub_block = 1591 (u1_sub_blk_y < 1) ? 1592 (CHECKBIT(u2_use_left_mb_pack, 1593 0)) : 1594 (u2_use_left_mb_pack >> 8); 1595 } 1596 1597 /***************** Top *********************/ 1598 if(u1_sub_blk_y) 1599 { 1600 u1_is_top_sub_block = 1; 1601 // sushant 1602 pu1_top = /*pu1_luma_pred_buffer*/pu1_luma_rec_buffer - ui_rec_width; 1603 } 1604 else 1605 { 1606 pu1_top += 8; 1607 } 1608 1609 /***************** Left *********************/ 1610 if((u1_sub_blk_x) | (u4_num_pmbair != 0)) 1611 { 1612 // sushant 1613 pu1_left = /*pu1_luma_pred_buffer*/pu1_luma_rec_buffer - 1; 1614 ui2_left_pred_buf_width = ui_rec_width; 1615 } 1616 else 1617 { 1618 pu1_left = pu1_yleft; 1619 pu1_yleft += (ui_rec_width << 3); 1620 ui2_left_pred_buf_width = ui_rec_width; 1621 } 1622 1623 /***************** Top Left *********************/ 1624 if(u1_sub_mb_num) 1625 { 1626 pu1_top_left = (u1_sub_blk_x) ? 1627 pu1_top - 1 : pu1_left - ui_rec_width; 1628 1629 if((u1_sub_blk_x && (!u1_is_top_sub_block)) 1630 || ((!u1_sub_blk_x) && (!u1_is_left_sub_block))) 1631 { 1632 pu1_top_left = NULL; 1633 } 1634 } 1635 1636 /*---------------------------------------------------------------*/ 1637 /* Calculation of Intra prediction mode */ 1638 /*---------------------------------------------------------------*/ 1639 i1_intra_pred = ((i1_left_pred_mode < 0) | (i1_top_pred_mode < 0)) ? 1640 DC : MIN(i1_left_pred_mode, i1_top_pred_mode); 1641 { 1642 UWORD8 u1_packed_modes = (u1_is_top_sub_block << 1) 1643 + u1_is_left_sub_block; 1644 UWORD8 *pu1_intra_err_codes = 1645 (UWORD8 *)gau1_ih264d_intra_pred_err_code; 1646 1647 /********************************************************************/ 1648 /* Same intra4x4_pred_mode array is filled with intra4x4_pred_mode */ 1649 /* for a MB with 8x8 intrapredicition */ 1650 /********************************************************************/ 1651 PROFILE_DISABLE_INTRA_PRED() 1652 if(!pu1_prev_intra4x4_pred_mode_flag[u1_sub_mb_num]) 1653 { 1654 i1_intra_pred = pu1_rem_intra4x4_pred_mode[u1_sub_mb_num] 1655 + (pu1_rem_intra4x4_pred_mode[u1_sub_mb_num] 1656 >= i1_intra_pred); 1657 } 1658 i1_intra_pred = CLIP3(0, 8, i1_intra_pred); 1659 { 1660 UWORD8 u1_err_code = pu1_intra_err_codes[i1_intra_pred]; 1661 1662 if((u1_err_code & u1_packed_modes) ^ u1_err_code) 1663 { 1664 i1_intra_pred = 0; 1665 ps_dec->i4_error_code = ERROR_INTRAPRED; 1666 } 1667 } 1668 } 1669 1670 { 1671 /* Align the size to multiple of 8, so that SIMD functions 1672 can read 64 bits at a time. Only 25 bytes are actaully used */ 1673 UWORD8 au1_ngbr_pels[32]; 1674 WORD32 ngbr_avail; 1675 ngbr_avail = u1_is_left_sub_block << 0; 1676 ngbr_avail |= u1_is_top_sub_block << 2; 1677 1678 if(pu1_top_left) 1679 ngbr_avail |= 1 << 1; 1680 1681 ngbr_avail |= u1_use_top_right_mb << 3; 1682 PROFILE_DISABLE_INTRA_PRED() 1683 { 1684 ps_dec->pf_intra_pred_ref_filtering(pu1_left, pu1_top_left, 1685 pu1_top, au1_ngbr_pels, 1686 ui2_left_pred_buf_width, 1687 ngbr_avail); 1688 1689 ps_dec->apf_intra_pred_luma_8x8[i1_intra_pred]( 1690 au1_ngbr_pels, pu1_luma_rec_buffer, 1, 1691 ui_rec_width, 1692 ((u1_is_top_sub_block << 2) | u1_is_left_sub_block)); 1693 } 1694 } 1695 1696 /* Inverse Transform and Reconstruction */ 1697 if(CHECKBIT(ps_cur_mb_info->u1_cbp, u1_sub_mb_num)) 1698 { 1699 WORD16 *pi2_scale_matrix_ptr; 1700 WORD16 ai2_tmp[64]; 1701 1702 pi2_scale_matrix_ptr = 1703 ps_dec->s_high_profile.i2_scalinglist8x8[0]; 1704 PROFILE_DISABLE_IQ_IT_RECON() 1705 { 1706 if(CHECKBIT(u4_luma_dc_only_cbp, u1_sub_mb_num)) 1707 { 1708 ps_dec->pf_iquant_itrans_recon_luma_8x8_dc( 1709 pi2_y_coeff1, 1710 pu1_luma_rec_buffer, 1711 pu1_luma_rec_buffer, 1712 ui_rec_width, 1713 ui_rec_width, 1714 gau1_ih264d_dequant8x8_cavlc[ps_cur_mb_info->u1_qp_rem6], 1715 (UWORD16 *)pi2_scale_matrix_ptr, 1716 ps_cur_mb_info->u1_qp_div6, ai2_tmp, 0, 1717 NULL); 1718 } 1719 else 1720 { 1721 ps_dec->pf_iquant_itrans_recon_luma_8x8( 1722 pi2_y_coeff1, 1723 pu1_luma_rec_buffer, 1724 pu1_luma_rec_buffer, 1725 ui_rec_width, 1726 ui_rec_width, 1727 gau1_ih264d_dequant8x8_cavlc[ps_cur_mb_info->u1_qp_rem6], 1728 (UWORD16 *)pi2_scale_matrix_ptr, 1729 ps_cur_mb_info->u1_qp_div6, ai2_tmp, 0, 1730 NULL); 1731 } 1732 } 1733 1734 } 1735 1736 /*---------------------------------------------------------------*/ 1737 /* Update sub block number */ 1738 /*---------------------------------------------------------------*/ 1739 pi2_y_coeff1 += 64; 1740 1741 pu1_luma_rec_buffer += 1742 (u1_sub_blk_x == 1) ? 1743 (ui_rec_width << 3) - (8 * 1) : 8; 1744 1745 /*---------------------------------------------------------------*/ 1746 /* Pred mode filled in terms of 4x4 block so replicated in 2 */ 1747 /* locations. */ 1748 /*---------------------------------------------------------------*/ 1749 pi1_cur_pred_mode[u1_sub_blk_x << 1] = i1_intra_pred; 1750 pi1_cur_pred_mode[(u1_sub_blk_x << 1) + 1] = i1_intra_pred; 1751 pi1_left_pred_mode[u1_sub_blk_y << 1] = i1_intra_pred; 1752 pi1_left_pred_mode[(u1_sub_blk_y << 1) + 1] = i1_intra_pred; 1753 } 1754 } 1755 /* Decode Chroma Block */ 1756 ih264d_unpack_chroma_coeff4x4_mb(ps_dec, 1757 ps_cur_mb_info); 1758 /*--------------------------------------------------------------------*/ 1759 /* Chroma Blocks decoding */ 1760 /*--------------------------------------------------------------------*/ 1761 { 1762 UWORD8 u1_intra_chrom_pred_mode; 1763 UWORD8 u1_chroma_cbp = (UWORD8)(ps_cur_mb_info->u1_cbp >> 4); 1764 1765 /*--------------------------------------------------------------------*/ 1766 /* Perform Chroma intra prediction */ 1767 /*--------------------------------------------------------------------*/ 1768 1769 u1_intra_chrom_pred_mode = CHROMA_TO_LUMA_INTRA_MODE( 1770 ps_cur_mb_info->u1_chroma_pred_mode); 1771 1772 { 1773 UWORD8 u1_packed_modes = (u1_top_available << 1) 1774 + u1_left_available; 1775 UWORD8 u1_err_code = 1776 (u1_intra_chrom_pred_mode & 1) ? 1777 u1_intra_chrom_pred_mode : 1778 (u1_intra_chrom_pred_mode ^ 2); 1779 if((u1_err_code & u1_packed_modes) ^ u1_err_code) 1780 { 1781 u1_intra_chrom_pred_mode = 0; 1782 ps_dec->i4_error_code = ERROR_INTRAPRED; 1783 } 1784 } 1785 1786 /* CHANGED CODE */ 1787 if(u1_chroma_cbp != CBPC_ALLZERO) 1788 { 1789 UWORD16 u2_chroma_csbp = 1790 (u1_chroma_cbp == CBPC_ACZERO) ? 1791 0 : ps_cur_mb_info->u2_chroma_csbp; 1792 UWORD32 u4_scale_u; 1793 UWORD32 u4_scale_v; 1794 1795 { 1796 UWORD16 au2_ngbr_pels[33]; 1797 UWORD8 *pu1_ngbr_pels = (UWORD8 *)au2_ngbr_pels; 1798 UWORD16 *pu2_left_uv; 1799 UWORD16 *pu2_topleft_uv; 1800 WORD32 use_left1 = (u2_use_left_mb_pack & 0x0ff); 1801 WORD32 use_left2 = (u2_use_left_mb_pack & 0xff00) >> 8; 1802 1803 pu2_left_uv = (UWORD16 *)pu1_uleft; 1804 pu2_topleft_uv = (UWORD16 *)pu1_u_top_left; 1805 /* Get neighbour pixels */ 1806 /* left pels */ 1807 if(u2_use_left_mb_pack) 1808 { 1809 WORD32 i; 1810 if(use_left1) 1811 { 1812 for(i = 0; i < 4; i++) 1813 au2_ngbr_pels[8 - 1 - i] = pu2_left_uv[i 1814 * u4_recwidth_cr / YUV420SP_FACTOR]; 1815 } 1816 else 1817 { 1818 memset(au2_ngbr_pels + 4, 0, 4 * sizeof(UWORD16)); 1819 } 1820 1821 if(use_left2) 1822 { 1823 for(i = 4; i < 8; i++) 1824 au2_ngbr_pels[8 - 1 - i] = pu2_left_uv[i 1825 * u4_recwidth_cr / YUV420SP_FACTOR]; 1826 } 1827 else 1828 { 1829 memset(au2_ngbr_pels, 0, 4 * sizeof(UWORD16)); 1830 } 1831 } 1832 else 1833 { 1834 memset(au2_ngbr_pels, 0, 8 * sizeof(UWORD16)); 1835 } 1836 1837 /* top left pels */ 1838 au2_ngbr_pels[8] = *pu2_topleft_uv; 1839 1840 /* top pels */ 1841 if(uc_useTopMB) 1842 { 1843 memcpy(au2_ngbr_pels + 8 + 1, pu1_top_u, 1844 8 * sizeof(UWORD16)); 1845 } 1846 else 1847 { 1848 memset(au2_ngbr_pels + 8 + 1, 0, 8 * sizeof(UWORD16)); 1849 } 1850 1851 PROFILE_DISABLE_INTRA_PRED() 1852 ps_dec->apf_intra_pred_chroma[u1_intra_chrom_pred_mode]( 1853 pu1_ngbr_pels, 1854 pu1_mb_cb_rei1_buffer, 1855 1, 1856 u4_recwidth_cr, 1857 ((uc_useTopMB << 2) | (use_left2 << 4) 1858 | use_left1)); 1859 } 1860 u4_scale_u = ps_cur_mb_info->u1_qpc_div6; 1861 u4_scale_v = ps_cur_mb_info->u1_qpcr_div6; 1862 pi2_y_coeff = ps_dec->pi2_coeff_data; 1863 1864 { 1865 UWORD32 i; 1866 WORD16 ai2_tmp[16]; 1867 for(i = 0; i < 4; i++) 1868 { 1869 WORD16 *pi2_level = pi2_y_coeff + (i << 4); 1870 UWORD8 *pu1_pred_sblk = pu1_mb_cb_rei1_buffer 1871 + ((i & 0x1) * BLK_SIZE * YUV420SP_FACTOR) 1872 + (i >> 1) * (u4_recwidth_cr << 2); 1873 PROFILE_DISABLE_IQ_IT_RECON() 1874 { 1875 if(CHECKBIT(u2_chroma_csbp, i)) 1876 { 1877 ps_dec->pf_iquant_itrans_recon_chroma_4x4( 1878 pi2_level, 1879 pu1_pred_sblk, 1880 pu1_pred_sblk, 1881 u4_recwidth_cr, 1882 u4_recwidth_cr, 1883 gau2_ih264_iquant_scale_4x4[ps_cur_mb_info->u1_qpc_rem6], 1884 (UWORD16 *)ps_dec->s_high_profile.i2_scalinglist4x4[1], 1885 u4_scale_u, ai2_tmp, pi2_level); 1886 } 1887 else if(pi2_level[0] != 0) 1888 { 1889 ps_dec->pf_iquant_itrans_recon_chroma_4x4_dc( 1890 pi2_level, 1891 pu1_pred_sblk, 1892 pu1_pred_sblk, 1893 u4_recwidth_cr, 1894 u4_recwidth_cr, 1895 gau2_ih264_iquant_scale_4x4[ps_cur_mb_info->u1_qpc_rem6], 1896 (UWORD16 *)ps_dec->s_high_profile.i2_scalinglist4x4[1], 1897 u4_scale_u, ai2_tmp, pi2_level); 1898 } 1899 } 1900 1901 } 1902 } 1903 1904 pi2_y_coeff += MB_CHROM_SIZE; 1905 u2_chroma_csbp = u2_chroma_csbp >> 4; 1906 { 1907 UWORD32 i; 1908 WORD16 ai2_tmp[16]; 1909 for(i = 0; i < 4; i++) 1910 { 1911 WORD16 *pi2_level = pi2_y_coeff + (i << 4); 1912 UWORD8 *pu1_pred_sblk = pu1_mb_cb_rei1_buffer + 1 1913 + ((i & 0x1) * BLK_SIZE * YUV420SP_FACTOR) 1914 + (i >> 1) * (u4_recwidth_cr << 2); 1915 PROFILE_DISABLE_IQ_IT_RECON() 1916 { 1917 if(CHECKBIT(u2_chroma_csbp, i)) 1918 { 1919 ps_dec->pf_iquant_itrans_recon_chroma_4x4( 1920 pi2_level, 1921 pu1_pred_sblk, 1922 pu1_pred_sblk, 1923 u4_recwidth_cr, 1924 u4_recwidth_cr, 1925 gau2_ih264_iquant_scale_4x4[ps_cur_mb_info->u1_qpcr_rem6], 1926 (UWORD16 *)ps_dec->s_high_profile.i2_scalinglist4x4[2], 1927 u4_scale_v, ai2_tmp, pi2_level); 1928 } 1929 else if(pi2_level[0] != 0) 1930 { 1931 ps_dec->pf_iquant_itrans_recon_chroma_4x4_dc( 1932 pi2_level, 1933 pu1_pred_sblk, 1934 pu1_pred_sblk, 1935 u4_recwidth_cr, 1936 u4_recwidth_cr, 1937 gau2_ih264_iquant_scale_4x4[ps_cur_mb_info->u1_qpcr_rem6], 1938 (UWORD16 *)ps_dec->s_high_profile.i2_scalinglist4x4[2], 1939 u4_scale_v, ai2_tmp, pi2_level); 1940 } 1941 } 1942 } 1943 } 1944 1945 } 1946 else 1947 { 1948 /* If no inverse transform is needed, pass recon buffer pointer */ 1949 /* to Intraprediction module instead of pred buffer pointer */ 1950 { 1951 UWORD16 au2_ngbr_pels[33]; 1952 UWORD8 *pu1_ngbr_pels = (UWORD8 *)au2_ngbr_pels; 1953 UWORD16 *pu2_left_uv; 1954 UWORD16 *pu2_topleft_uv; 1955 WORD32 use_left1 = (u2_use_left_mb_pack & 0x0ff); 1956 WORD32 use_left2 = (u2_use_left_mb_pack & 0xff00) >> 8; 1957 1958 pu2_topleft_uv = (UWORD16 *)pu1_u_top_left; 1959 pu2_left_uv = (UWORD16 *)pu1_uleft; 1960 1961 /* Get neighbour pixels */ 1962 /* left pels */ 1963 if(u2_use_left_mb_pack) 1964 { 1965 WORD32 i; 1966 if(use_left1) 1967 { 1968 for(i = 0; i < 4; i++) 1969 au2_ngbr_pels[8 - 1 - i] = pu2_left_uv[i 1970 * u4_recwidth_cr / YUV420SP_FACTOR]; 1971 } 1972 else 1973 { 1974 memset(au2_ngbr_pels + 4, 0, 4 * sizeof(UWORD16)); 1975 } 1976 1977 if(use_left2) 1978 { 1979 for(i = 4; i < 8; i++) 1980 au2_ngbr_pels[8 - 1 - i] = pu2_left_uv[i 1981 * u4_recwidth_cr / YUV420SP_FACTOR]; 1982 } 1983 else 1984 { 1985 memset(au2_ngbr_pels, 0, 4 * sizeof(UWORD16)); 1986 } 1987 1988 } 1989 else 1990 { 1991 memset(au2_ngbr_pels, 0, 8 * sizeof(UWORD16)); 1992 } 1993 1994 /* top left pels */ 1995 au2_ngbr_pels[8] = *pu2_topleft_uv; 1996 1997 /* top pels */ 1998 if(uc_useTopMB) 1999 { 2000 memcpy(au2_ngbr_pels + 8 + 1, pu1_top_u, 2001 8 * sizeof(UWORD16)); 2002 } 2003 else 2004 { 2005 memset(au2_ngbr_pels + 8 + 1, 0, 8 * sizeof(UWORD16)); 2006 } 2007 2008 PROFILE_DISABLE_INTRA_PRED() 2009 ps_dec->apf_intra_pred_chroma[u1_intra_chrom_pred_mode]( 2010 pu1_ngbr_pels, 2011 pu1_mb_cb_rei1_buffer, 2012 1, 2013 u4_recwidth_cr, 2014 ((uc_useTopMB << 2) | (use_left2 << 4) 2015 | use_left1)); 2016 } 2017 2018 } 2019 2020 } 2021 return OK; 2022 } 2023
