1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _AMDGPU_TEST_H_ 25 #define _AMDGPU_TEST_H_ 26 27 #include "amdgpu.h" 28 #include "amdgpu_drm.h" 29 30 /** 31 * Define max. number of card in system which we are able to handle 32 */ 33 #define MAX_CARDS_SUPPORTED 4 34 35 /* Forward reference for array to keep "drm" handles */ 36 extern int drm_amdgpu[MAX_CARDS_SUPPORTED]; 37 38 /* Global variables */ 39 extern int open_render_node; 40 41 /************************* Basic test suite ********************************/ 42 43 /* 44 * Define basic test suite to serve as the starting point for future testing 45 */ 46 47 /** 48 * Initialize basic test suite 49 */ 50 int suite_basic_tests_init(); 51 52 /** 53 * Deinitialize basic test suite 54 */ 55 int suite_basic_tests_clean(); 56 57 /** 58 * Tests in basic test suite 59 */ 60 extern CU_TestInfo basic_tests[]; 61 62 /** 63 * Initialize bo test suite 64 */ 65 int suite_bo_tests_init(); 66 67 /** 68 * Deinitialize bo test suite 69 */ 70 int suite_bo_tests_clean(); 71 72 /** 73 * Tests in bo test suite 74 */ 75 extern CU_TestInfo bo_tests[]; 76 77 /** 78 * Initialize cs test suite 79 */ 80 int suite_cs_tests_init(); 81 82 /** 83 * Deinitialize cs test suite 84 */ 85 int suite_cs_tests_clean(); 86 87 /** 88 * Tests in cs test suite 89 */ 90 extern CU_TestInfo cs_tests[]; 91 92 /** 93 * Initialize vce test suite 94 */ 95 int suite_vce_tests_init(); 96 97 /** 98 * Deinitialize vce test suite 99 */ 100 int suite_vce_tests_clean(); 101 102 /** 103 * Tests in vce test suite 104 */ 105 extern CU_TestInfo vce_tests[]; 106 107 /** 108 * Helper functions 109 */ 110 static inline amdgpu_bo_handle gpu_mem_alloc( 111 amdgpu_device_handle device_handle, 112 uint64_t size, 113 uint64_t alignment, 114 uint32_t type, 115 uint64_t flags, 116 uint64_t *vmc_addr, 117 amdgpu_va_handle *va_handle) 118 { 119 struct amdgpu_bo_alloc_request req = {0}; 120 amdgpu_bo_handle buf_handle; 121 int r; 122 123 CU_ASSERT_NOT_EQUAL(vmc_addr, NULL); 124 125 req.alloc_size = size; 126 req.phys_alignment = alignment; 127 req.preferred_heap = type; 128 req.flags = flags; 129 130 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle); 131 CU_ASSERT_EQUAL(r, 0); 132 133 r = amdgpu_va_range_alloc(device_handle, 134 amdgpu_gpu_va_range_general, 135 size, alignment, 0, vmc_addr, 136 va_handle, 0); 137 CU_ASSERT_EQUAL(r, 0); 138 139 r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0, AMDGPU_VA_OP_MAP); 140 CU_ASSERT_EQUAL(r, 0); 141 142 return buf_handle; 143 } 144 145 static inline int gpu_mem_free(amdgpu_bo_handle bo, 146 amdgpu_va_handle va_handle, 147 uint64_t vmc_addr, 148 uint64_t size) 149 { 150 int r; 151 152 r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP); 153 CU_ASSERT_EQUAL(r, 0); 154 155 r = amdgpu_va_range_free(va_handle); 156 CU_ASSERT_EQUAL(r, 0); 157 158 r = amdgpu_bo_free(bo); 159 CU_ASSERT_EQUAL(r, 0); 160 161 return 0; 162 } 163 164 static inline int 165 amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, 166 unsigned alignment, unsigned heap, uint64_t flags, 167 amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, 168 amdgpu_va_handle *va_handle) 169 { 170 struct amdgpu_bo_alloc_request request = {}; 171 amdgpu_bo_handle buf_handle; 172 amdgpu_va_handle handle; 173 uint64_t vmc_addr; 174 int r; 175 176 request.alloc_size = size; 177 request.phys_alignment = alignment; 178 request.preferred_heap = heap; 179 request.flags = flags; 180 181 r = amdgpu_bo_alloc(dev, &request, &buf_handle); 182 if (r) 183 return r; 184 185 r = amdgpu_va_range_alloc(dev, 186 amdgpu_gpu_va_range_general, 187 size, alignment, 0, &vmc_addr, 188 &handle, 0); 189 if (r) 190 goto error_va_alloc; 191 192 r = amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_MAP); 193 if (r) 194 goto error_va_map; 195 196 r = amdgpu_bo_cpu_map(buf_handle, cpu); 197 if (r) 198 goto error_cpu_map; 199 200 *bo = buf_handle; 201 *mc_address = vmc_addr; 202 *va_handle = handle; 203 204 return 0; 205 206 error_cpu_map: 207 amdgpu_bo_cpu_unmap(buf_handle); 208 209 error_va_map: 210 amdgpu_bo_va_op(buf_handle, 0, size, vmc_addr, 0, AMDGPU_VA_OP_UNMAP); 211 212 error_va_alloc: 213 amdgpu_bo_free(buf_handle); 214 return r; 215 } 216 217 static inline int 218 amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle, 219 uint64_t mc_addr, uint64_t size) 220 { 221 amdgpu_bo_cpu_unmap(bo); 222 amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP); 223 amdgpu_va_range_free(va_handle); 224 amdgpu_bo_free(bo); 225 226 return 0; 227 228 } 229 230 static inline int 231 amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1, 232 amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list) 233 { 234 amdgpu_bo_handle resources[] = {bo1, bo2}; 235 236 return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list); 237 } 238 239 #endif /* #ifdef _AMDGPU_TEST_H_ */ 240
