1 //===-- Sparc.td - Describe the Sparc Target Machine -------*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // 11 //===----------------------------------------------------------------------===// 12 13 //===----------------------------------------------------------------------===// 14 // Target-independent interfaces which we are implementing 15 //===----------------------------------------------------------------------===// 16 17 include "llvm/Target/Target.td" 18 19 //===----------------------------------------------------------------------===// 20 // SPARC Subtarget features. 21 // 22 23 def FeatureV9 24 : SubtargetFeature<"v9", "IsV9", "true", "Enable SPARC-V9 instructions">; 25 def FeatureV8Deprecated 26 : SubtargetFeature<"deprecated-v8", "V8DeprecatedInsts", "true", 27 "Enable deprecated V8 instructions in V9 mode">; 28 def FeatureVIS 29 : SubtargetFeature<"vis", "IsVIS", "true", 30 "Enable UltraSPARC Visual Instruction Set extensions">; 31 def FeatureVIS2 32 : SubtargetFeature<"vis2", "IsVIS2", "true", 33 "Enable Visual Instruction Set extensions II">; 34 def FeatureVIS3 35 : SubtargetFeature<"vis3", "IsVIS3", "true", 36 "Enable Visual Instruction Set extensions III">; 37 def FeatureLeon 38 : SubtargetFeature<"leon", "IsLeon", "true", "Enable LEON extensions">; 39 40 def FeatureHardQuad 41 : SubtargetFeature<"hard-quad-float", "HasHardQuad", "true", 42 "Enable quad-word floating point instructions">; 43 44 def UsePopc : SubtargetFeature<"popc", "UsePopc", "true", 45 "Use the popc (population count) instruction">; 46 47 def FeatureSoftFloat 48 : SubtargetFeature<"soft-float", "UseSoftFloat", "true", 49 "Use software emulation for floating point">; 50 51 //==== Features added predmoninantly for LEON subtarget support 52 include "LeonFeatures.td" 53 54 //===----------------------------------------------------------------------===// 55 // Register File, Calling Conv, Instruction Descriptions 56 //===----------------------------------------------------------------------===// 57 58 include "SparcRegisterInfo.td" 59 include "SparcCallingConv.td" 60 include "SparcSchedule.td" 61 include "SparcInstrInfo.td" 62 63 def SparcInstrInfo : InstrInfo; 64 65 def SparcAsmParser : AsmParser { bit ShouldEmitMatchRegisterName = 0; } 66 67 //===----------------------------------------------------------------------===// 68 // SPARC processors supported. 69 //===----------------------------------------------------------------------===// 70 71 class Proc<string Name, list<SubtargetFeature> Features> 72 : Processor<Name, NoItineraries, Features>; 73 74 def : Proc<"generic", []>; 75 def : Proc<"v7", []>; 76 def : Proc<"v8", []>; 77 def : Proc<"supersparc", []>; 78 def : Proc<"sparclite", []>; 79 def : Proc<"f934", []>; 80 def : Proc<"hypersparc", []>; 81 def : Proc<"sparclite86x", []>; 82 def : Proc<"sparclet", []>; 83 def : Proc<"tsc701", []>; 84 def : Proc<"myriad2", []>; 85 def : Proc<"myriad2.1", []>; 86 def : Proc<"myriad2.2", []>; 87 def : Proc<"v9", [ FeatureV9 ]>; 88 def : Proc<"ultrasparc", [ FeatureV9, FeatureV8Deprecated, FeatureVIS ]>; 89 def : Proc<"ultrasparc3", 90 [ FeatureV9, FeatureV8Deprecated, FeatureVIS, FeatureVIS2 ]>; 91 def : Proc<"niagara", 92 [ FeatureV9, FeatureV8Deprecated, FeatureVIS, FeatureVIS2 ]>; 93 def : Proc<"niagara2", [ 94 FeatureV9, FeatureV8Deprecated, UsePopc, FeatureVIS, FeatureVIS2 95 ]>; 96 def : Proc<"niagara3", [ 97 FeatureV9, FeatureV8Deprecated, UsePopc, FeatureVIS, FeatureVIS2 98 ]>; 99 def : Proc<"niagara4", [ 100 FeatureV9, FeatureV8Deprecated, UsePopc, FeatureVIS, FeatureVIS2, FeatureVIS3 101 ]>; 102 103 // LEON 2 FT generic 104 def : Processor<"leon2", LEON2Itineraries, [ FeatureLeon ]>; 105 106 // LEON 2 FT (AT697E) 107 // AT697E: Provides full coverage of AT697E - covers all the erratum fixes for 108 // LEON2 AT697E 109 def : Processor<"at697e", LEON2Itineraries, [ 110 FeatureLeon, ReplaceSDIV, FixCALL, IgnoreZeroFlag, InsertNOPDoublePrecision 111 ]>; 112 113 // LEON 2 FT (AT697F) 114 // AT697F: Provides full coverage of AT697F - covers all the erratum fixes for 115 // LEON2 AT697F 116 def : Processor<"at697f", LEON2Itineraries, 117 [ FeatureLeon, InsertNOPDoublePrecision ]>; 118 119 // LEON 3 FT generic 120 def : Processor<"leon3", LEON3Itineraries, [ FeatureLeon, UMACSMACSupport ]>; 121 122 // LEON 3 FT (UT699). Provides features for the UT699 processor 123 // - covers all the erratum fixes for LEON3, but does not support the CASA 124 // instruction. 125 def : Processor<"ut699", LEON3Itineraries, [ 126 FeatureLeon, FixFSMULD, ReplaceFMULS, PreventRoundChange, 127 FixAllFDIVSQRT, InsertNOPLoad, FlushCacheLineSWAP, InsertNOPsLoadStore 128 ]>; 129 130 // LEON3 FT (GR712RC). Provides features for the GR712RC processor. 131 // - covers all the erratum fixed for LEON3 and support for the CASA 132 // instruction. 133 def : Processor<"gr712rc", LEON3Itineraries, 134 [ FeatureLeon, LeonCASA ]>; 135 136 // LEON 4 FT generic 137 def : Processor<"leon4", LEON4Itineraries, 138 [ FeatureLeon, LeonCASA ]>; 139 140 // GR740: Provides full coverage of GR740 - covers all the erratum fixes for 141 // LEON3 + support to CASA + LEON 4 instruction timings 142 def : Processor<"gr740", LEON4Itineraries, 143 [ FeatureLeon, LeonCASA ]> {} 144 145 //===----------------------------------------------------------------------===// 146 // Declare the target which we are implementing 147 //===----------------------------------------------------------------------===// 148 149 def SparcAsmWriter : AsmWriter { 150 string AsmWriterClassName = "InstPrinter"; 151 int PassSubtarget = 1; 152 int Variant = 0; 153 } 154 155 def Sparc : Target { 156 // Pull in Instruction Info: 157 let InstructionSet = SparcInstrInfo; 158 let AssemblyParsers = [ SparcAsmParser ]; 159 let AssemblyWriters = [ SparcAsmWriter ]; 160 } 161
