1 ;RUN: opt -mtriple=amdgcn-mesa-mesa3d -analyze -divergence %s | FileCheck %s 2 3 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.swap.i32( 4 define float @image_atomic_swap(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 5 main_body: 6 %orig = call i32 @llvm.amdgcn.image.atomic.swap.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 7 %r = bitcast i32 %orig to float 8 ret float %r 9 } 10 11 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.add.i32( 12 define float @image_atomic_add(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 13 main_body: 14 %orig = call i32 @llvm.amdgcn.image.atomic.add.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 15 %r = bitcast i32 %orig to float 16 ret float %r 17 } 18 19 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.sub.i32( 20 define float @image_atomic_sub(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 21 main_body: 22 %orig = call i32 @llvm.amdgcn.image.atomic.sub.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 23 %r = bitcast i32 %orig to float 24 ret float %r 25 } 26 27 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.smin.i32( 28 define float @image_atomic_smin(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 29 main_body: 30 %orig = call i32 @llvm.amdgcn.image.atomic.smin.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 31 %r = bitcast i32 %orig to float 32 ret float %r 33 } 34 35 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.umin.i32( 36 define float @image_atomic_umin(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 37 main_body: 38 %orig = call i32 @llvm.amdgcn.image.atomic.umin.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 39 %r = bitcast i32 %orig to float 40 ret float %r 41 } 42 43 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.smax.i32( 44 define float @image_atomic_smax(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 45 main_body: 46 %orig = call i32 @llvm.amdgcn.image.atomic.smax.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 47 %r = bitcast i32 %orig to float 48 ret float %r 49 } 50 51 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.umax.i32( 52 define float @image_atomic_umax(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 53 main_body: 54 %orig = call i32 @llvm.amdgcn.image.atomic.umax.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 55 %r = bitcast i32 %orig to float 56 ret float %r 57 } 58 59 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.and.i32( 60 define float @image_atomic_and(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 61 main_body: 62 %orig = call i32 @llvm.amdgcn.image.atomic.and.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 63 %r = bitcast i32 %orig to float 64 ret float %r 65 } 66 67 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.or.i32( 68 define float @image_atomic_or(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 69 main_body: 70 %orig = call i32 @llvm.amdgcn.image.atomic.or.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 71 %r = bitcast i32 %orig to float 72 ret float %r 73 } 74 75 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.xor.i32( 76 define float @image_atomic_xor(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 77 main_body: 78 %orig = call i32 @llvm.amdgcn.image.atomic.xor.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 79 %r = bitcast i32 %orig to float 80 ret float %r 81 } 82 83 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.inc.i32( 84 define float @image_atomic_inc(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 85 main_body: 86 %orig = call i32 @llvm.amdgcn.image.atomic.inc.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 87 %r = bitcast i32 %orig to float 88 ret float %r 89 } 90 91 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.dec.i32( 92 define float @image_atomic_dec(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data) #0 { 93 main_body: 94 %orig = call i32 @llvm.amdgcn.image.atomic.dec.i32(i32 %data, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 95 %r = bitcast i32 %orig to float 96 ret float %r 97 } 98 99 ;CHECK: DIVERGENT: %orig = call i32 @llvm.amdgcn.image.atomic.cmpswap.i32( 100 define float @image_atomic_cmpswap(<8 x i32> inreg %rsrc, i32 inreg %addr, i32 inreg %data, i32 inreg %cmp) #0 { 101 main_body: 102 %orig = call i32 @llvm.amdgcn.image.atomic.cmpswap.i32(i32 %data, i32 %cmp, i32 %addr, <8 x i32> %rsrc, i1 0, i1 0, i1 0) 103 %r = bitcast i32 %orig to float 104 ret float %r 105 } 106 107 declare i32 @llvm.amdgcn.image.atomic.swap.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 108 declare i32 @llvm.amdgcn.image.atomic.add.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 109 declare i32 @llvm.amdgcn.image.atomic.sub.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 110 declare i32 @llvm.amdgcn.image.atomic.smin.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 111 declare i32 @llvm.amdgcn.image.atomic.umin.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 112 declare i32 @llvm.amdgcn.image.atomic.smax.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 113 declare i32 @llvm.amdgcn.image.atomic.umax.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 114 declare i32 @llvm.amdgcn.image.atomic.and.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 115 declare i32 @llvm.amdgcn.image.atomic.or.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 116 declare i32 @llvm.amdgcn.image.atomic.xor.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 117 declare i32 @llvm.amdgcn.image.atomic.inc.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 118 declare i32 @llvm.amdgcn.image.atomic.dec.i32(i32, i32, <8 x i32>, i1, i1, i1) #0 119 declare i32 @llvm.amdgcn.image.atomic.cmpswap.i32(i32, i32, i32, <8 x i32>,i1, i1, i1) #0 120 121 attributes #0 = { nounwind } 122
