1 ; RUN: llc < %s | FileCheck %s 2 3 ; ModuleID = 'aarch64_tree_tests.bc' 4 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" 5 target triple = "arm64--linux-gnu" 6 7 ; CHECK-LABLE: @aarch64_tree_tests_and 8 ; CHECK: .hword 32768 9 ; CHECK: .hword 32767 10 ; CHECK: .hword 4664 11 ; CHECK: .hword 32767 12 ; CHECK: .hword 32768 13 ; CHECK: .hword 32768 14 ; CHECK: .hword 0 15 ; CHECK: .hword 0 16 17 ; Function Attrs: nounwind readnone 18 define <8 x i16> @aarch64_tree_tests_and(<8 x i16> %a) { 19 entry: 20 %and = and <8 x i16> <i16 0, i16 undef, i16 undef, i16 0, i16 0, i16 undef, i16 undef, i16 0>, %a 21 %ret = add <8 x i16> %and, <i16 -32768, i16 32767, i16 4664, i16 32767, i16 -32768, i16 -32768, i16 0, i16 0> 22 ret <8 x i16> %ret 23 } 24 25 ; CHECK-LABLE: @aarch64_tree_tests_or 26 ; CHECK: .hword 32768 27 ; CHECK: .hword 32766 28 ; CHECK: .hword 4664 29 ; CHECK: .hword 32766 30 ; CHECK: .hword 32768 31 ; CHECK: .hword 32768 32 ; CHECK: .hword 65535 33 ; CHECK: .hword 65535 34 35 ; Function Attrs: nounwind readnone 36 define <8 x i16> @aarch64_tree_tests_or(<8 x i16> %a) { 37 entry: 38 %or = or <8 x i16> <i16 -1, i16 undef, i16 undef, i16 -1, i16 -1, i16 undef, i16 undef, i16 -1>, %a 39 %ret = add <8 x i16> %or, <i16 -32767, i16 32767, i16 4665, i16 32767, i16 -32767, i16 -32767, i16 0, i16 0> 40 ret <8 x i16> %ret 41 } 42 43
