1 ; RUN: llc -march arm64 < %s -aarch64-collect-loh=false | FileCheck %s 2 ; rdar://13452552 3 ; Disable the collecting of LOH so that the labels do not get in the 4 ; way of the NEXT patterns. 5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64-S128" 6 target triple = "arm64-apple-ios3.0.0" 7 8 @block = common global i8* null, align 8 9 10 define zeroext i8 @fullGtU(i32 %i1, i32 %i2) { 11 ; CHECK: fullGtU 12 ; CHECK: adrp [[PAGE:x[0-9]+]], _block@GOTPAGE 13 ; CHECK: ldr [[ADDR:x[0-9]+]], {{\[}}[[PAGE]], _block@GOTPAGEOFF] 14 ; CHECK-NEXT: ldr [[BLOCKBASE:x[0-9]+]], {{\[}}[[ADDR]]] 15 ; CHECK-NEXT: ldrb [[BLOCKVAL1:w[0-9]+]], {{\[}}[[BLOCKBASE]], w0, sxtw] 16 ; CHECK-NEXT: ldrb [[BLOCKVAL2:w[0-9]+]], {{\[}}[[BLOCKBASE]], w1, sxtw] 17 ; CHECK-NEXT: cmp [[BLOCKVAL1]], [[BLOCKVAL2]] 18 ; CHECK-NEXT: b.ne 19 ; Next BB 20 ; CHECK: add [[BLOCKBASE2:x[0-9]+]], [[BLOCKBASE]], w1, sxtw 21 ; CHECK-NEXT: add [[BLOCKBASE1:x[0-9]+]], [[BLOCKBASE]], w0, sxtw 22 ; CHECK-NEXT: ldrb [[LOADEDVAL1:w[0-9]+]], {{\[}}[[BLOCKBASE1]], #1] 23 ; CHECK-NEXT: ldrb [[LOADEDVAL2:w[0-9]+]], {{\[}}[[BLOCKBASE2]], #1] 24 ; CHECK-NEXT: cmp [[LOADEDVAL1]], [[LOADEDVAL2]] 25 ; CHECK-NEXT: b.ne 26 ; Next BB 27 ; CHECK: ldrb [[LOADEDVAL3:w[0-9]+]], {{\[}}[[BLOCKBASE1]], #2] 28 ; CHECK-NEXT: ldrb [[LOADEDVAL4:w[0-9]+]], {{\[}}[[BLOCKBASE2]], #2] 29 ; CHECK-NEXT: cmp [[LOADEDVAL3]], [[LOADEDVAL4]] 30 entry: 31 %idxprom = sext i32 %i1 to i64 32 %tmp = load i8*, i8** @block, align 8 33 %arrayidx = getelementptr inbounds i8, i8* %tmp, i64 %idxprom 34 %tmp1 = load i8, i8* %arrayidx, align 1 35 %idxprom1 = sext i32 %i2 to i64 36 %arrayidx2 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom1 37 %tmp2 = load i8, i8* %arrayidx2, align 1 38 %cmp = icmp eq i8 %tmp1, %tmp2 39 br i1 %cmp, label %if.end, label %if.then 40 41 if.then: ; preds = %entry 42 %cmp7 = icmp ugt i8 %tmp1, %tmp2 43 %conv9 = zext i1 %cmp7 to i8 44 br label %return 45 46 if.end: ; preds = %entry 47 %inc = add nsw i32 %i1, 1 48 %inc10 = add nsw i32 %i2, 1 49 %idxprom11 = sext i32 %inc to i64 50 %arrayidx12 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom11 51 %tmp3 = load i8, i8* %arrayidx12, align 1 52 %idxprom13 = sext i32 %inc10 to i64 53 %arrayidx14 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom13 54 %tmp4 = load i8, i8* %arrayidx14, align 1 55 %cmp17 = icmp eq i8 %tmp3, %tmp4 56 br i1 %cmp17, label %if.end25, label %if.then19 57 58 if.then19: ; preds = %if.end 59 %cmp22 = icmp ugt i8 %tmp3, %tmp4 60 %conv24 = zext i1 %cmp22 to i8 61 br label %return 62 63 if.end25: ; preds = %if.end 64 %inc26 = add nsw i32 %i1, 2 65 %inc27 = add nsw i32 %i2, 2 66 %idxprom28 = sext i32 %inc26 to i64 67 %arrayidx29 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom28 68 %tmp5 = load i8, i8* %arrayidx29, align 1 69 %idxprom30 = sext i32 %inc27 to i64 70 %arrayidx31 = getelementptr inbounds i8, i8* %tmp, i64 %idxprom30 71 %tmp6 = load i8, i8* %arrayidx31, align 1 72 %cmp34 = icmp eq i8 %tmp5, %tmp6 73 br i1 %cmp34, label %return, label %if.then36 74 75 if.then36: ; preds = %if.end25 76 %cmp39 = icmp ugt i8 %tmp5, %tmp6 77 %conv41 = zext i1 %cmp39 to i8 78 br label %return 79 80 return: ; preds = %if.then36, %if.end25, %if.then19, %if.then 81 %retval.0 = phi i8 [ %conv9, %if.then ], [ %conv24, %if.then19 ], [ %conv41, %if.then36 ], [ 0, %if.end25 ] 82 ret i8 %retval.0 83 } 84
