1 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s 2 3 ; 4 ; Floating-point scalar convert to signed integer (to nearest with ties to away) 5 ; 6 define i32 @fcvtas_1w1s(float %A) nounwind { 7 ;CHECK-LABEL: fcvtas_1w1s: 8 ;CHECK: fcvtas w0, s0 9 ;CHECK-NEXT: ret 10 %tmp3 = call i32 @llvm.aarch64.neon.fcvtas.i32.f32(float %A) 11 ret i32 %tmp3 12 } 13 14 define i64 @fcvtas_1x1s(float %A) nounwind { 15 ;CHECK-LABEL: fcvtas_1x1s: 16 ;CHECK: fcvtas x0, s0 17 ;CHECK-NEXT: ret 18 %tmp3 = call i64 @llvm.aarch64.neon.fcvtas.i64.f32(float %A) 19 ret i64 %tmp3 20 } 21 22 define i32 @fcvtas_1w1d(double %A) nounwind { 23 ;CHECK-LABEL: fcvtas_1w1d: 24 ;CHECK: fcvtas w0, d0 25 ;CHECK-NEXT: ret 26 %tmp3 = call i32 @llvm.aarch64.neon.fcvtas.i32.f64(double %A) 27 ret i32 %tmp3 28 } 29 30 define i64 @fcvtas_1x1d(double %A) nounwind { 31 ;CHECK-LABEL: fcvtas_1x1d: 32 ;CHECK: fcvtas x0, d0 33 ;CHECK-NEXT: ret 34 %tmp3 = call i64 @llvm.aarch64.neon.fcvtas.i64.f64(double %A) 35 ret i64 %tmp3 36 } 37 38 declare i32 @llvm.aarch64.neon.fcvtas.i32.f32(float) nounwind readnone 39 declare i64 @llvm.aarch64.neon.fcvtas.i64.f32(float) nounwind readnone 40 declare i32 @llvm.aarch64.neon.fcvtas.i32.f64(double) nounwind readnone 41 declare i64 @llvm.aarch64.neon.fcvtas.i64.f64(double) nounwind readnone 42 43 ; 44 ; Floating-point scalar convert to unsigned integer 45 ; 46 define i32 @fcvtau_1w1s(float %A) nounwind { 47 ;CHECK-LABEL: fcvtau_1w1s: 48 ;CHECK: fcvtau w0, s0 49 ;CHECK-NEXT: ret 50 %tmp3 = call i32 @llvm.aarch64.neon.fcvtau.i32.f32(float %A) 51 ret i32 %tmp3 52 } 53 54 define i64 @fcvtau_1x1s(float %A) nounwind { 55 ;CHECK-LABEL: fcvtau_1x1s: 56 ;CHECK: fcvtau x0, s0 57 ;CHECK-NEXT: ret 58 %tmp3 = call i64 @llvm.aarch64.neon.fcvtau.i64.f32(float %A) 59 ret i64 %tmp3 60 } 61 62 define i32 @fcvtau_1w1d(double %A) nounwind { 63 ;CHECK-LABEL: fcvtau_1w1d: 64 ;CHECK: fcvtau w0, d0 65 ;CHECK-NEXT: ret 66 %tmp3 = call i32 @llvm.aarch64.neon.fcvtau.i32.f64(double %A) 67 ret i32 %tmp3 68 } 69 70 define i64 @fcvtau_1x1d(double %A) nounwind { 71 ;CHECK-LABEL: fcvtau_1x1d: 72 ;CHECK: fcvtau x0, d0 73 ;CHECK-NEXT: ret 74 %tmp3 = call i64 @llvm.aarch64.neon.fcvtau.i64.f64(double %A) 75 ret i64 %tmp3 76 } 77 78 declare i32 @llvm.aarch64.neon.fcvtau.i32.f32(float) nounwind readnone 79 declare i64 @llvm.aarch64.neon.fcvtau.i64.f32(float) nounwind readnone 80 declare i32 @llvm.aarch64.neon.fcvtau.i32.f64(double) nounwind readnone 81 declare i64 @llvm.aarch64.neon.fcvtau.i64.f64(double) nounwind readnone 82 83 ; 84 ; Floating-point scalar convert to signed integer (toward -Inf) 85 ; 86 define i32 @fcvtms_1w1s(float %A) nounwind { 87 ;CHECK-LABEL: fcvtms_1w1s: 88 ;CHECK: fcvtms w0, s0 89 ;CHECK-NEXT: ret 90 %tmp3 = call i32 @llvm.aarch64.neon.fcvtms.i32.f32(float %A) 91 ret i32 %tmp3 92 } 93 94 define i64 @fcvtms_1x1s(float %A) nounwind { 95 ;CHECK-LABEL: fcvtms_1x1s: 96 ;CHECK: fcvtms x0, s0 97 ;CHECK-NEXT: ret 98 %tmp3 = call i64 @llvm.aarch64.neon.fcvtms.i64.f32(float %A) 99 ret i64 %tmp3 100 } 101 102 define i32 @fcvtms_1w1d(double %A) nounwind { 103 ;CHECK-LABEL: fcvtms_1w1d: 104 ;CHECK: fcvtms w0, d0 105 ;CHECK-NEXT: ret 106 %tmp3 = call i32 @llvm.aarch64.neon.fcvtms.i32.f64(double %A) 107 ret i32 %tmp3 108 } 109 110 define i64 @fcvtms_1x1d(double %A) nounwind { 111 ;CHECK-LABEL: fcvtms_1x1d: 112 ;CHECK: fcvtms x0, d0 113 ;CHECK-NEXT: ret 114 %tmp3 = call i64 @llvm.aarch64.neon.fcvtms.i64.f64(double %A) 115 ret i64 %tmp3 116 } 117 118 declare i32 @llvm.aarch64.neon.fcvtms.i32.f32(float) nounwind readnone 119 declare i64 @llvm.aarch64.neon.fcvtms.i64.f32(float) nounwind readnone 120 declare i32 @llvm.aarch64.neon.fcvtms.i32.f64(double) nounwind readnone 121 declare i64 @llvm.aarch64.neon.fcvtms.i64.f64(double) nounwind readnone 122 123 ; 124 ; Floating-point scalar convert to unsigned integer (toward -Inf) 125 ; 126 define i32 @fcvtmu_1w1s(float %A) nounwind { 127 ;CHECK-LABEL: fcvtmu_1w1s: 128 ;CHECK: fcvtmu w0, s0 129 ;CHECK-NEXT: ret 130 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float %A) 131 ret i32 %tmp3 132 } 133 134 define i64 @fcvtmu_1x1s(float %A) nounwind { 135 ;CHECK-LABEL: fcvtmu_1x1s: 136 ;CHECK: fcvtmu x0, s0 137 ;CHECK-NEXT: ret 138 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float %A) 139 ret i64 %tmp3 140 } 141 142 define i32 @fcvtmu_1w1d(double %A) nounwind { 143 ;CHECK-LABEL: fcvtmu_1w1d: 144 ;CHECK: fcvtmu w0, d0 145 ;CHECK-NEXT: ret 146 %tmp3 = call i32 @llvm.aarch64.neon.fcvtmu.i32.f64(double %A) 147 ret i32 %tmp3 148 } 149 150 define i64 @fcvtmu_1x1d(double %A) nounwind { 151 ;CHECK-LABEL: fcvtmu_1x1d: 152 ;CHECK: fcvtmu x0, d0 153 ;CHECK-NEXT: ret 154 %tmp3 = call i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double %A) 155 ret i64 %tmp3 156 } 157 158 declare i32 @llvm.aarch64.neon.fcvtmu.i32.f32(float) nounwind readnone 159 declare i64 @llvm.aarch64.neon.fcvtmu.i64.f32(float) nounwind readnone 160 declare i32 @llvm.aarch64.neon.fcvtmu.i32.f64(double) nounwind readnone 161 declare i64 @llvm.aarch64.neon.fcvtmu.i64.f64(double) nounwind readnone 162 163 ; 164 ; Floating-point scalar convert to signed integer (to nearest with ties to even) 165 ; 166 define i32 @fcvtns_1w1s(float %A) nounwind { 167 ;CHECK-LABEL: fcvtns_1w1s: 168 ;CHECK: fcvtns w0, s0 169 ;CHECK-NEXT: ret 170 %tmp3 = call i32 @llvm.aarch64.neon.fcvtns.i32.f32(float %A) 171 ret i32 %tmp3 172 } 173 174 define i64 @fcvtns_1x1s(float %A) nounwind { 175 ;CHECK-LABEL: fcvtns_1x1s: 176 ;CHECK: fcvtns x0, s0 177 ;CHECK-NEXT: ret 178 %tmp3 = call i64 @llvm.aarch64.neon.fcvtns.i64.f32(float %A) 179 ret i64 %tmp3 180 } 181 182 define i32 @fcvtns_1w1d(double %A) nounwind { 183 ;CHECK-LABEL: fcvtns_1w1d: 184 ;CHECK: fcvtns w0, d0 185 ;CHECK-NEXT: ret 186 %tmp3 = call i32 @llvm.aarch64.neon.fcvtns.i32.f64(double %A) 187 ret i32 %tmp3 188 } 189 190 define i64 @fcvtns_1x1d(double %A) nounwind { 191 ;CHECK-LABEL: fcvtns_1x1d: 192 ;CHECK: fcvtns x0, d0 193 ;CHECK-NEXT: ret 194 %tmp3 = call i64 @llvm.aarch64.neon.fcvtns.i64.f64(double %A) 195 ret i64 %tmp3 196 } 197 198 declare i32 @llvm.aarch64.neon.fcvtns.i32.f32(float) nounwind readnone 199 declare i64 @llvm.aarch64.neon.fcvtns.i64.f32(float) nounwind readnone 200 declare i32 @llvm.aarch64.neon.fcvtns.i32.f64(double) nounwind readnone 201 declare i64 @llvm.aarch64.neon.fcvtns.i64.f64(double) nounwind readnone 202 203 ; 204 ; Floating-point scalar convert to unsigned integer (to nearest with ties to even) 205 ; 206 define i32 @fcvtnu_1w1s(float %A) nounwind { 207 ;CHECK-LABEL: fcvtnu_1w1s: 208 ;CHECK: fcvtnu w0, s0 209 ;CHECK-NEXT: ret 210 %tmp3 = call i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float %A) 211 ret i32 %tmp3 212 } 213 214 define i64 @fcvtnu_1x1s(float %A) nounwind { 215 ;CHECK-LABEL: fcvtnu_1x1s: 216 ;CHECK: fcvtnu x0, s0 217 ;CHECK-NEXT: ret 218 %tmp3 = call i64 @llvm.aarch64.neon.fcvtnu.i64.f32(float %A) 219 ret i64 %tmp3 220 } 221 222 define i32 @fcvtnu_1w1d(double %A) nounwind { 223 ;CHECK-LABEL: fcvtnu_1w1d: 224 ;CHECK: fcvtnu w0, d0 225 ;CHECK-NEXT: ret 226 %tmp3 = call i32 @llvm.aarch64.neon.fcvtnu.i32.f64(double %A) 227 ret i32 %tmp3 228 } 229 230 define i64 @fcvtnu_1x1d(double %A) nounwind { 231 ;CHECK-LABEL: fcvtnu_1x1d: 232 ;CHECK: fcvtnu x0, d0 233 ;CHECK-NEXT: ret 234 %tmp3 = call i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double %A) 235 ret i64 %tmp3 236 } 237 238 declare i32 @llvm.aarch64.neon.fcvtnu.i32.f32(float) nounwind readnone 239 declare i64 @llvm.aarch64.neon.fcvtnu.i64.f32(float) nounwind readnone 240 declare i32 @llvm.aarch64.neon.fcvtnu.i32.f64(double) nounwind readnone 241 declare i64 @llvm.aarch64.neon.fcvtnu.i64.f64(double) nounwind readnone 242 243 ; 244 ; Floating-point scalar convert to signed integer (toward +Inf) 245 ; 246 define i32 @fcvtps_1w1s(float %A) nounwind { 247 ;CHECK-LABEL: fcvtps_1w1s: 248 ;CHECK: fcvtps w0, s0 249 ;CHECK-NEXT: ret 250 %tmp3 = call i32 @llvm.aarch64.neon.fcvtps.i32.f32(float %A) 251 ret i32 %tmp3 252 } 253 254 define i64 @fcvtps_1x1s(float %A) nounwind { 255 ;CHECK-LABEL: fcvtps_1x1s: 256 ;CHECK: fcvtps x0, s0 257 ;CHECK-NEXT: ret 258 %tmp3 = call i64 @llvm.aarch64.neon.fcvtps.i64.f32(float %A) 259 ret i64 %tmp3 260 } 261 262 define i32 @fcvtps_1w1d(double %A) nounwind { 263 ;CHECK-LABEL: fcvtps_1w1d: 264 ;CHECK: fcvtps w0, d0 265 ;CHECK-NEXT: ret 266 %tmp3 = call i32 @llvm.aarch64.neon.fcvtps.i32.f64(double %A) 267 ret i32 %tmp3 268 } 269 270 define i64 @fcvtps_1x1d(double %A) nounwind { 271 ;CHECK-LABEL: fcvtps_1x1d: 272 ;CHECK: fcvtps x0, d0 273 ;CHECK-NEXT: ret 274 %tmp3 = call i64 @llvm.aarch64.neon.fcvtps.i64.f64(double %A) 275 ret i64 %tmp3 276 } 277 278 declare i32 @llvm.aarch64.neon.fcvtps.i32.f32(float) nounwind readnone 279 declare i64 @llvm.aarch64.neon.fcvtps.i64.f32(float) nounwind readnone 280 declare i32 @llvm.aarch64.neon.fcvtps.i32.f64(double) nounwind readnone 281 declare i64 @llvm.aarch64.neon.fcvtps.i64.f64(double) nounwind readnone 282 283 ; 284 ; Floating-point scalar convert to unsigned integer (toward +Inf) 285 ; 286 define i32 @fcvtpu_1w1s(float %A) nounwind { 287 ;CHECK-LABEL: fcvtpu_1w1s: 288 ;CHECK: fcvtpu w0, s0 289 ;CHECK-NEXT: ret 290 %tmp3 = call i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float %A) 291 ret i32 %tmp3 292 } 293 294 define i64 @fcvtpu_1x1s(float %A) nounwind { 295 ;CHECK-LABEL: fcvtpu_1x1s: 296 ;CHECK: fcvtpu x0, s0 297 ;CHECK-NEXT: ret 298 %tmp3 = call i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float %A) 299 ret i64 %tmp3 300 } 301 302 define i32 @fcvtpu_1w1d(double %A) nounwind { 303 ;CHECK-LABEL: fcvtpu_1w1d: 304 ;CHECK: fcvtpu w0, d0 305 ;CHECK-NEXT: ret 306 %tmp3 = call i32 @llvm.aarch64.neon.fcvtpu.i32.f64(double %A) 307 ret i32 %tmp3 308 } 309 310 define i64 @fcvtpu_1x1d(double %A) nounwind { 311 ;CHECK-LABEL: fcvtpu_1x1d: 312 ;CHECK: fcvtpu x0, d0 313 ;CHECK-NEXT: ret 314 %tmp3 = call i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double %A) 315 ret i64 %tmp3 316 } 317 318 declare i32 @llvm.aarch64.neon.fcvtpu.i32.f32(float) nounwind readnone 319 declare i64 @llvm.aarch64.neon.fcvtpu.i64.f32(float) nounwind readnone 320 declare i32 @llvm.aarch64.neon.fcvtpu.i32.f64(double) nounwind readnone 321 declare i64 @llvm.aarch64.neon.fcvtpu.i64.f64(double) nounwind readnone 322 323 ; 324 ; Floating-point scalar convert to signed integer (toward zero) 325 ; 326 define i32 @fcvtzs_1w1s(float %A) nounwind { 327 ;CHECK-LABEL: fcvtzs_1w1s: 328 ;CHECK: fcvtzs w0, s0 329 ;CHECK-NEXT: ret 330 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float %A) 331 ret i32 %tmp3 332 } 333 334 define i64 @fcvtzs_1x1s(float %A) nounwind { 335 ;CHECK-LABEL: fcvtzs_1x1s: 336 ;CHECK: fcvtzs x0, s0 337 ;CHECK-NEXT: ret 338 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzs.i64.f32(float %A) 339 ret i64 %tmp3 340 } 341 342 define i32 @fcvtzs_1w1d(double %A) nounwind { 343 ;CHECK-LABEL: fcvtzs_1w1d: 344 ;CHECK: fcvtzs w0, d0 345 ;CHECK-NEXT: ret 346 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzs.i32.f64(double %A) 347 ret i32 %tmp3 348 } 349 350 define i64 @fcvtzs_1x1d(double %A) nounwind { 351 ;CHECK-LABEL: fcvtzs_1x1d: 352 ;CHECK: fcvtzs x0, d0 353 ;CHECK-NEXT: ret 354 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double %A) 355 ret i64 %tmp3 356 } 357 358 declare i32 @llvm.aarch64.neon.fcvtzs.i32.f32(float) nounwind readnone 359 declare i64 @llvm.aarch64.neon.fcvtzs.i64.f32(float) nounwind readnone 360 declare i32 @llvm.aarch64.neon.fcvtzs.i32.f64(double) nounwind readnone 361 declare i64 @llvm.aarch64.neon.fcvtzs.i64.f64(double) nounwind readnone 362 363 ; 364 ; Floating-point scalar convert to unsigned integer (toward zero) 365 ; 366 define i32 @fcvtzu_1w1s(float %A) nounwind { 367 ;CHECK-LABEL: fcvtzu_1w1s: 368 ;CHECK: fcvtzu w0, s0 369 ;CHECK-NEXT: ret 370 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float %A) 371 ret i32 %tmp3 372 } 373 374 define i64 @fcvtzu_1x1s(float %A) nounwind { 375 ;CHECK-LABEL: fcvtzu_1x1s: 376 ;CHECK: fcvtzu x0, s0 377 ;CHECK-NEXT: ret 378 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzu.i64.f32(float %A) 379 ret i64 %tmp3 380 } 381 382 define i32 @fcvtzu_1w1d(double %A) nounwind { 383 ;CHECK-LABEL: fcvtzu_1w1d: 384 ;CHECK: fcvtzu w0, d0 385 ;CHECK-NEXT: ret 386 %tmp3 = call i32 @llvm.aarch64.neon.fcvtzu.i32.f64(double %A) 387 ret i32 %tmp3 388 } 389 390 define i64 @fcvtzu_1x1d(double %A) nounwind { 391 ;CHECK-LABEL: fcvtzu_1x1d: 392 ;CHECK: fcvtzu x0, d0 393 ;CHECK-NEXT: ret 394 %tmp3 = call i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double %A) 395 ret i64 %tmp3 396 } 397 398 declare i32 @llvm.aarch64.neon.fcvtzu.i32.f32(float) nounwind readnone 399 declare i64 @llvm.aarch64.neon.fcvtzu.i64.f32(float) nounwind readnone 400 declare i32 @llvm.aarch64.neon.fcvtzu.i32.f64(double) nounwind readnone 401 declare i64 @llvm.aarch64.neon.fcvtzu.i64.f64(double) nounwind readnone 402
