1 ; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s 2 ; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -fast-isel < %s | FileCheck %s --check-prefix=FAST 3 ; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -filetype=obj -o %t %s 4 ; RUN: llvm-objdump -triple arm64-apple-darwin -d %t | FileCheck %s --check-prefix CHECK-ENCODING 5 6 ; CHECK-ENCODING-NOT: <unknown> 7 ; CHECK-ENCODING: mov x16, #281470681743360 8 ; CHECK-ENCODING: movk x16, #57005, lsl #16 9 ; CHECK-ENCODING: movk x16, #48879 10 11 ; One argument will be passed in register, the other will be pushed on the stack. 12 ; Return value in x0. 13 define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { 14 entry: 15 ; CHECK-LABEL: jscall_patchpoint_codegen: 16 ; CHECK: Ltmp 17 ; CHECK: str x{{.+}}, [sp] 18 ; CHECK-NEXT: mov x0, x{{.+}} 19 ; CHECK: Ltmp 20 ; CHECK-NEXT: mov x16, #281470681743360 21 ; CHECK: movk x16, #57005, lsl #16 22 ; CHECK: movk x16, #48879 23 ; CHECK-NEXT: blr x16 24 ; FAST-LABEL: jscall_patchpoint_codegen: 25 ; FAST: Ltmp 26 ; FAST: str x{{.+}}, [sp] 27 ; FAST: Ltmp 28 ; FAST-NEXT: mov x16, #281470681743360 29 ; FAST-NEXT: movk x16, #57005, lsl #16 30 ; FAST-NEXT: movk x16, #48879 31 ; FAST-NEXT: blr x16 32 %resolveCall2 = inttoptr i64 281474417671919 to i8* 33 %result = tail call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* %resolveCall2, i32 2, i64 %p4, i64 %p2) 34 %resolveCall3 = inttoptr i64 244837814038255 to i8* 35 tail call webkit_jscc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 20, i8* %resolveCall3, i32 2, i64 %p4, i64 %result) 36 ret void 37 } 38 39 ; Test if the arguments are properly aligned and that we don't store undef arguments. 40 define i64 @jscall_patchpoint_codegen2(i64 %callee) { 41 entry: 42 ; CHECK-LABEL: jscall_patchpoint_codegen2: 43 ; CHECK: Ltmp 44 ; CHECK: orr w[[REG:[0-9]+]], wzr, #0x6 45 ; CHECK-NEXT: str x[[REG]], [sp, #24] 46 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4 47 ; CHECK-NEXT: str w[[REG]], [sp, #16] 48 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2 49 ; CHECK-NEXT: str x[[REG]], [sp] 50 ; CHECK: Ltmp 51 ; CHECK-NEXT: mov x16, #281470681743360 52 ; CHECK-NEXT: movk x16, #57005, lsl #16 53 ; CHECK-NEXT: movk x16, #48879 54 ; CHECK-NEXT: blr x16 55 ; FAST-LABEL: jscall_patchpoint_codegen2: 56 ; FAST: Ltmp 57 ; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2 58 ; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4 59 ; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6 60 ; FAST-NEXT: str [[REG1]], [sp] 61 ; FAST-NEXT: str [[REG2]], [sp, #16] 62 ; FAST-NEXT: str [[REG3]], [sp, #24] 63 ; FAST: Ltmp 64 ; FAST-NEXT: mov x16, #281470681743360 65 ; FAST-NEXT: movk x16, #57005, lsl #16 66 ; FAST-NEXT: movk x16, #48879 67 ; FAST-NEXT: blr x16 68 %call = inttoptr i64 281474417671919 to i8* 69 %result = call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 6, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6) 70 ret i64 %result 71 } 72 73 ; Test if the arguments are properly aligned and that we don't store undef arguments. 74 define i64 @jscall_patchpoint_codegen3(i64 %callee) { 75 entry: 76 ; CHECK-LABEL: jscall_patchpoint_codegen3: 77 ; CHECK: Ltmp 78 ; CHECK: mov w[[REG:[0-9]+]], #10 79 ; CHECK-NEXT: str x[[REG]], [sp, #48] 80 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x8 81 ; CHECK-NEXT: str w[[REG]], [sp, #36] 82 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x6 83 ; CHECK-NEXT: str x[[REG]], [sp, #24] 84 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4 85 ; CHECK-NEXT: str w[[REG]], [sp, #16] 86 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2 87 ; CHECK-NEXT: str x[[REG]], [sp] 88 ; CHECK: Ltmp 89 ; CHECK-NEXT: mov x16, #281470681743360 90 ; CHECK-NEXT: movk x16, #57005, lsl #16 91 ; CHECK-NEXT: movk x16, #48879 92 ; CHECK-NEXT: blr x16 93 ; FAST-LABEL: jscall_patchpoint_codegen3: 94 ; FAST: Ltmp 95 ; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2 96 ; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4 97 ; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6 98 ; FAST-NEXT: orr [[REG4:w[0-9]+]], wzr, #0x8 99 ; FAST-NEXT: mov [[REG5:x[0-9]+]], #10 100 ; FAST-NEXT: str [[REG1]], [sp] 101 ; FAST-NEXT: str [[REG2]], [sp, #16] 102 ; FAST-NEXT: str [[REG3]], [sp, #24] 103 ; FAST-NEXT: str [[REG4]], [sp, #36] 104 ; FAST-NEXT: str [[REG5]], [sp, #48] 105 ; FAST: Ltmp 106 ; FAST-NEXT: mov x16, #281470681743360 107 ; FAST-NEXT: movk x16, #57005, lsl #16 108 ; FAST-NEXT: movk x16, #48879 109 ; FAST-NEXT: blr x16 110 %call = inttoptr i64 281474417671919 to i8* 111 %result = call webkit_jscc i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, i8* %call, i32 10, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6, i32 undef, i32 8, i32 undef, i64 10) 112 ret i64 %result 113 } 114 115 ; CHECK-LABEL: test_i16: 116 ; CHECK: ldrh [[BREG:w[0-9]+]], [sp] 117 ; CHECK: add {{w[0-9]+}}, w0, [[BREG]] 118 define webkit_jscc zeroext i16 @test_i16(i16 zeroext %a, i16 zeroext %b) { 119 %sum = add i16 %a, %b 120 ret i16 %sum 121 } 122 123 declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...) 124 declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...) 125
