1 ; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s 2 ; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -fast-isel -fast-isel-abort=1 < %s | FileCheck %s 3 4 ; Trivial patchpoint codegen 5 ; 6 define i64 @trivial_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { 7 entry: 8 ; CHECK-LABEL: trivial_patchpoint_codegen: 9 ; CHECK: mov x16, #244834610708480 10 ; CHECK-NEXT: movk x16, #48879, lsl #16 11 ; CHECK-NEXT: movk x16, #51966 12 ; CHECK-NEXT: blr x16 13 ; CHECK: mov x16, #244834610708480 14 ; CHECK-NEXT: movk x16, #48879, lsl #16 15 ; CHECK-NEXT: movk x16, #51967 16 ; CHECK-NEXT: blr x16 17 ; CHECK: ret 18 %resolveCall2 = inttoptr i64 244837814094590 to i8* 19 %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 2, i32 20, i8* %resolveCall2, i32 4, i64 %p1, i64 %p2, i64 %p3, i64 %p4) 20 %resolveCall3 = inttoptr i64 244837814094591 to i8* 21 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 20, i8* %resolveCall3, i32 2, i64 %p1, i64 %result) 22 ret i64 %result 23 } 24 25 ; Caller frame metadata with stackmaps. This should not be optimized 26 ; as a leaf function. 27 ; 28 ; CHECK-LABEL: caller_meta_leaf 29 ; CHECK: sub sp, sp, #48 30 ; CHECK-NEXT: stp x29, x30, [sp, #32] 31 ; CHECK-NEXT: add x29, sp, #32 32 ; CHECK: Ltmp 33 ; CHECK: add sp, sp, #48 34 ; CHECK: ret 35 36 define void @caller_meta_leaf() { 37 entry: 38 %metadata = alloca i64, i32 3, align 8 39 store i64 11, i64* %metadata 40 store i64 12, i64* %metadata 41 store i64 13, i64* %metadata 42 call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 0, i64* %metadata) 43 ret void 44 } 45 46 ; Test patchpoints reusing the same TargetConstant. 47 ; <rdar:15390785> Assertion failed: (CI.getNumArgOperands() >= NumArgs + 4) 48 ; There is no way to verify this, since it depends on memory allocation. 49 ; But I think it's useful to include as a working example. 50 define i64 @testLowerConstant(i64 %arg, i64 %tmp2, i64 %tmp10, i64* %tmp33, i64 %tmp79) { 51 entry: 52 %tmp80 = add i64 %tmp79, -16 53 %tmp81 = inttoptr i64 %tmp80 to i64* 54 %tmp82 = load i64, i64* %tmp81, align 8 55 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 14, i32 8, i64 %arg, i64 %tmp2, i64 %tmp10, i64 %tmp82) 56 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 15, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp82) 57 %tmp83 = load i64, i64* %tmp33, align 8 58 %tmp84 = add i64 %tmp83, -24 59 %tmp85 = inttoptr i64 %tmp84 to i64* 60 %tmp86 = load i64, i64* %tmp85, align 8 61 tail call void (i64, i32, ...) @llvm.experimental.stackmap(i64 17, i32 8, i64 %arg, i64 %tmp10, i64 %tmp86) 62 tail call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 18, i32 32, i8* null, i32 3, i64 %arg, i64 %tmp10, i64 %tmp86) 63 ret i64 10 64 } 65 66 ; Test small patchpoints that don't emit calls. 67 define void @small_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { 68 entry: 69 ; CHECK-LABEL: small_patchpoint_codegen: 70 ; CHECK: Ltmp 71 ; CHECK: nop 72 ; CHECK-NEXT: nop 73 ; CHECK-NEXT: nop 74 ; CHECK-NEXT: nop 75 ; CHECK-NEXT: nop 76 ; CHECK-NEXT: ldp 77 ; CHECK-NEXT: ret 78 %result = tail call i64 (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, i8* null, i32 2, i64 %p1, i64 %p2) 79 ret void 80 } 81 82 declare void @llvm.experimental.stackmap(i64, i32, ...) 83 declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...) 84 declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...) 85 86
