1 ; RUN: llc -verify-machineinstrs -mtriple=arm64-linux-gnu -pre-RA-sched=linearize -enable-misched=false -disable-post-ra < %s | FileCheck %s 2 3 %va_list = type {i8*, i8*, i8*, i32, i32} 4 5 @var = global %va_list zeroinitializer, align 8 6 7 declare void @llvm.va_start(i8*) 8 9 define void @test_simple(i32 %n, ...) { 10 ; CHECK-LABEL: test_simple: 11 ; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]] 12 ; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #[[STACKSIZE]] 13 14 ; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var 15 ; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var 16 17 ; CHECK: stp x1, x2, [sp, #[[GR_BASE:[0-9]+]]] 18 ; ... omit middle ones ... 19 ; CHECK: str x7, [sp, # 20 21 ; CHECK: stp q0, q1, [sp] 22 ; ... omit middle ones ... 23 ; CHECK: stp q6, q7, [sp, # 24 25 ; CHECK: str [[STACK_TOP]], [x[[VA_LIST]]] 26 27 ; CHECK: add [[GR_TOPTMP:x[0-9]+]], sp, #[[GR_BASE]] 28 ; CHECK: add [[GR_TOP:x[0-9]+]], [[GR_TOPTMP]], #56 29 ; CHECK: str [[GR_TOP]], [x[[VA_LIST]], #8] 30 31 ; CHECK: mov [[VR_TOPTMP:x[0-9]+]], sp 32 ; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #128 33 ; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16] 34 35 ; CHECK: mov [[GR_OFFS:w[0-9]+]], #-56 36 ; CHECK: str [[GR_OFFS]], [x[[VA_LIST]], #24] 37 38 ; CHECK: orr [[VR_OFFS:w[0-9]+]], wzr, #0xffffff80 39 ; CHECK: str [[VR_OFFS]], [x[[VA_LIST]], #28] 40 41 %addr = bitcast %va_list* @var to i8* 42 call void @llvm.va_start(i8* %addr) 43 44 ret void 45 } 46 47 define void @test_fewargs(i32 %n, i32 %n1, i32 %n2, float %m, ...) { 48 ; CHECK-LABEL: test_fewargs: 49 ; CHECK: sub sp, sp, #[[STACKSIZE:[0-9]+]] 50 ; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #[[STACKSIZE]] 51 52 ; CHECK: adrp x[[VA_LIST_HI:[0-9]+]], var 53 ; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, :lo12:var 54 55 ; CHECK: stp x3, x4, [sp, #[[GR_BASE:[0-9]+]]] 56 ; ... omit middle ones ... 57 ; CHECK: str x7, [sp, # 58 59 ; CHECK: stp q1, q2, [sp] 60 ; ... omit middle ones ... 61 ; CHECK: str q7, [sp, # 62 63 ; CHECK: str [[STACK_TOP]], [x[[VA_LIST]]] 64 65 ; CHECK: add [[GR_TOPTMP:x[0-9]+]], sp, #[[GR_BASE]] 66 ; CHECK: add [[GR_TOP:x[0-9]+]], [[GR_TOPTMP]], #40 67 ; CHECK: str [[GR_TOP]], [x[[VA_LIST]], #8] 68 69 ; CHECK: mov [[VR_TOPTMP:x[0-9]+]], sp 70 ; CHECK: add [[VR_TOP:x[0-9]+]], [[VR_TOPTMP]], #112 71 ; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16] 72 73 ; CHECK: mov [[GR_OFFS:w[0-9]+]], #-40 74 ; CHECK: str [[GR_OFFS]], [x[[VA_LIST]], #24] 75 76 ; CHECK: mov [[VR_OFFS:w[0-9]+]], #-11 77 ; CHECK: str [[VR_OFFS]], [x[[VA_LIST]], #28] 78 79 %addr = bitcast %va_list* @var to i8* 80 call void @llvm.va_start(i8* %addr) 81 82 ret void 83 } 84 85 define void @test_nospare([8 x i64], [8 x float], ...) { 86 ; CHECK-LABEL: test_nospare: 87 88 %addr = bitcast %va_list* @var to i8* 89 call void @llvm.va_start(i8* %addr) 90 ; CHECK-NOT: sub sp, sp 91 ; CHECK: mov [[STACK:x[0-9]+]], sp 92 ; CHECK: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var 93 ; CHECK: str [[STACK]], [x[[VAR]]] 94 95 ret void 96 } 97 98 ; If there are non-variadic arguments on the stack (here two i64s) then the 99 ; __stack field should point just past them. 100 define void @test_offsetstack([8 x i64], [2 x i64], [3 x float], ...) { 101 ; CHECK-LABEL: test_offsetstack: 102 ; CHECK: sub sp, sp, #80 103 ; CHECK: add [[STACK_TOP:x[0-9]+]], sp, #96 104 ; CHECK: add x[[VAR:[0-9]+]], {{x[0-9]+}}, :lo12:var 105 ; CHECK: str [[STACK_TOP]], [x[[VAR]]] 106 107 %addr = bitcast %va_list* @var to i8* 108 call void @llvm.va_start(i8* %addr) 109 ret void 110 } 111 112 declare void @llvm.va_end(i8*) 113 114 define void @test_va_end() nounwind { 115 ; CHECK-LABEL: test_va_end: 116 ; CHECK-NEXT: BB#0 117 118 %addr = bitcast %va_list* @var to i8* 119 call void @llvm.va_end(i8* %addr) 120 121 ret void 122 ; CHECK-NEXT: ret 123 } 124 125 declare void @llvm.va_copy(i8* %dest, i8* %src) 126 127 @second_list = global %va_list zeroinitializer 128 129 define void @test_va_copy() { 130 ; CHECK-LABEL: test_va_copy: 131 %srcaddr = bitcast %va_list* @var to i8* 132 %dstaddr = bitcast %va_list* @second_list to i8* 133 call void @llvm.va_copy(i8* %dstaddr, i8* %srcaddr) 134 135 ; CHECK: add x[[SRC:[0-9]+]], {{x[0-9]+}}, :lo12:var 136 137 ; CHECK: ldr [[BLOCK:q[0-9]+]], [x[[SRC]]] 138 ; CHECK: add x[[DST:[0-9]+]], {{x[0-9]+}}, :lo12:second_list 139 ; CHECK: str [[BLOCK]], [x[[DST]]] 140 141 ; CHECK: ldr [[BLOCK:q[0-9]+]], [x[[SRC]], #16] 142 ; CHECK: str [[BLOCK]], [x[[DST]], #16] 143 ret void 144 ; CHECK: ret 145 } 146
