1 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s 2 3 define <8 x i8> @cls_8b(<8 x i8>* %A) nounwind { 4 ;CHECK-LABEL: cls_8b: 5 ;CHECK: cls.8b 6 %tmp1 = load <8 x i8>, <8 x i8>* %A 7 %tmp3 = call <8 x i8> @llvm.aarch64.neon.cls.v8i8(<8 x i8> %tmp1) 8 ret <8 x i8> %tmp3 9 } 10 11 define <16 x i8> @cls_16b(<16 x i8>* %A) nounwind { 12 ;CHECK-LABEL: cls_16b: 13 ;CHECK: cls.16b 14 %tmp1 = load <16 x i8>, <16 x i8>* %A 15 %tmp3 = call <16 x i8> @llvm.aarch64.neon.cls.v16i8(<16 x i8> %tmp1) 16 ret <16 x i8> %tmp3 17 } 18 19 define <4 x i16> @cls_4h(<4 x i16>* %A) nounwind { 20 ;CHECK-LABEL: cls_4h: 21 ;CHECK: cls.4h 22 %tmp1 = load <4 x i16>, <4 x i16>* %A 23 %tmp3 = call <4 x i16> @llvm.aarch64.neon.cls.v4i16(<4 x i16> %tmp1) 24 ret <4 x i16> %tmp3 25 } 26 27 define <8 x i16> @cls_8h(<8 x i16>* %A) nounwind { 28 ;CHECK-LABEL: cls_8h: 29 ;CHECK: cls.8h 30 %tmp1 = load <8 x i16>, <8 x i16>* %A 31 %tmp3 = call <8 x i16> @llvm.aarch64.neon.cls.v8i16(<8 x i16> %tmp1) 32 ret <8 x i16> %tmp3 33 } 34 35 define <2 x i32> @cls_2s(<2 x i32>* %A) nounwind { 36 ;CHECK-LABEL: cls_2s: 37 ;CHECK: cls.2s 38 %tmp1 = load <2 x i32>, <2 x i32>* %A 39 %tmp3 = call <2 x i32> @llvm.aarch64.neon.cls.v2i32(<2 x i32> %tmp1) 40 ret <2 x i32> %tmp3 41 } 42 43 define <4 x i32> @cls_4s(<4 x i32>* %A) nounwind { 44 ;CHECK-LABEL: cls_4s: 45 ;CHECK: cls.4s 46 %tmp1 = load <4 x i32>, <4 x i32>* %A 47 %tmp3 = call <4 x i32> @llvm.aarch64.neon.cls.v4i32(<4 x i32> %tmp1) 48 ret <4 x i32> %tmp3 49 } 50 51 declare <8 x i8> @llvm.aarch64.neon.cls.v8i8(<8 x i8>) nounwind readnone 52 declare <16 x i8> @llvm.aarch64.neon.cls.v16i8(<16 x i8>) nounwind readnone 53 declare <4 x i16> @llvm.aarch64.neon.cls.v4i16(<4 x i16>) nounwind readnone 54 declare <8 x i16> @llvm.aarch64.neon.cls.v8i16(<8 x i16>) nounwind readnone 55 declare <2 x i32> @llvm.aarch64.neon.cls.v2i32(<2 x i32>) nounwind readnone 56 declare <4 x i32> @llvm.aarch64.neon.cls.v4i32(<4 x i32>) nounwind readnone 57
