1 ; RUN: llc < %s -march=arm64 -aarch64-neon-syntax=apple | FileCheck %s 2 3 define <2 x float> @f1(<2 x float> %a, <2 x float> %b) nounwind readnone ssp { 4 ; CHECK: fmaxnm.2s v0, v0, v1 5 ; CHECK: ret 6 %vmaxnm2.i = tail call <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float> %a, <2 x float> %b) nounwind 7 ret <2 x float> %vmaxnm2.i 8 } 9 10 define <4 x float> @f2(<4 x float> %a, <4 x float> %b) nounwind readnone ssp { 11 ; CHECK: fmaxnm.4s v0, v0, v1 12 ; CHECK: ret 13 %vmaxnm2.i = tail call <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float> %a, <4 x float> %b) nounwind 14 ret <4 x float> %vmaxnm2.i 15 } 16 17 define <2 x double> @f3(<2 x double> %a, <2 x double> %b) nounwind readnone ssp { 18 ; CHECK: fmaxnm.2d v0, v0, v1 19 ; CHECK: ret 20 %vmaxnm2.i = tail call <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double> %a, <2 x double> %b) nounwind 21 ret <2 x double> %vmaxnm2.i 22 } 23 24 define <2 x float> @f4(<2 x float> %a, <2 x float> %b) nounwind readnone ssp { 25 ; CHECK: fminnm.2s v0, v0, v1 26 ; CHECK: ret 27 %vminnm2.i = tail call <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float> %a, <2 x float> %b) nounwind 28 ret <2 x float> %vminnm2.i 29 } 30 31 define <4 x float> @f5(<4 x float> %a, <4 x float> %b) nounwind readnone ssp { 32 ; CHECK: fminnm.4s v0, v0, v1 33 ; CHECK: ret 34 %vminnm2.i = tail call <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float> %a, <4 x float> %b) nounwind 35 ret <4 x float> %vminnm2.i 36 } 37 38 define <2 x double> @f6(<2 x double> %a, <2 x double> %b) nounwind readnone ssp { 39 ; CHECK: fminnm.2d v0, v0, v1 40 ; CHECK: ret 41 %vminnm2.i = tail call <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double> %a, <2 x double> %b) nounwind 42 ret <2 x double> %vminnm2.i 43 } 44 45 define float @f7(float %a, float %b) nounwind readnone ssp { 46 ; CHECK: fmaxnm s0, s0, s1 47 ; CHECK: ret 48 %vmaxnm2.i = tail call float @llvm.aarch64.neon.fmaxnm.f32(float %a, float %b) nounwind 49 ret float %vmaxnm2.i 50 } 51 52 define double @f8(double %a, double %b) nounwind readnone ssp { 53 ; CHECK: fminnm d0, d0, d1 54 ; CHECK: ret 55 %vmaxnm2.i = tail call double @llvm.aarch64.neon.fminnm.f64(double %a, double %b) nounwind 56 ret double %vmaxnm2.i 57 } 58 59 declare <2 x double> @llvm.aarch64.neon.fminnm.v2f64(<2 x double>, <2 x double>) nounwind readnone 60 declare <4 x float> @llvm.aarch64.neon.fminnm.v4f32(<4 x float>, <4 x float>) nounwind readnone 61 declare <2 x float> @llvm.aarch64.neon.fminnm.v2f32(<2 x float>, <2 x float>) nounwind readnone 62 declare <2 x double> @llvm.aarch64.neon.fmaxnm.v2f64(<2 x double>, <2 x double>) nounwind readnone 63 declare <4 x float> @llvm.aarch64.neon.fmaxnm.v4f32(<4 x float>, <4 x float>) nounwind readnone 64 declare <2 x float> @llvm.aarch64.neon.fmaxnm.v2f32(<2 x float>, <2 x float>) nounwind readnone 65 declare float @llvm.aarch64.neon.fmaxnm.f32(float, float) nounwind readnone 66 declare double @llvm.aarch64.neon.fminnm.f64(double, double) nounwind readnone 67 68 define double @test_fmaxnmv(<2 x double> %in) { 69 ; CHECK-LABEL: test_fmaxnmv: 70 ; CHECK: fmaxnmp.2d d0, v0 71 %max = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in) 72 ret double %max 73 } 74 75 define double @test_fminnmv(<2 x double> %in) { 76 ; CHECK-LABEL: test_fminnmv: 77 ; CHECK: fminnmp.2d d0, v0 78 %min = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> %in) 79 ret double %min 80 } 81 82 declare double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double>) 83 declare double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double>) 84
