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      1 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mcpu=cyclone | FileCheck %s
      2 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
      3 
      4 @var32 = global i32 0
      5 @var64 = global i64 0
      6 
      7 define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
      8 ; CHECK-LABEL: test_csel:
      9 
     10   %tst1 = icmp ugt i32 %lhs32, %rhs32
     11   %val1 = select i1 %tst1, i32 42, i32 52
     12   store i32 %val1, i32* @var32
     13 ; CHECK-DAG: mov [[W52:w[0-9]+]], #{{52|0x34}}
     14 ; CHECK-DAG: mov [[W42:w[0-9]+]], #{{42|0x2a}}
     15 ; CHECK: csel {{w[0-9]+}}, [[W42]], [[W52]], hi
     16 
     17   %rhs64 = sext i32 %rhs32 to i64
     18   %tst2 = icmp sle i64 %lhs64, %rhs64
     19   %val2 = select i1 %tst2, i64 %lhs64, i64 %rhs64
     20   store i64 %val2, i64* @var64
     21 ; CHECK: sxtw [[EXT_RHS:x[0-9]+]], {{[wx]}}[[RHS:[0-9]+]]
     22 ; CHECK: cmp [[LHS:x[0-9]+]], w[[RHS]], sxtw
     23 ; CHECK: csel {{x[0-9]+}}, [[LHS]], [[EXT_RHS]], le
     24 
     25   ret void
     26 ; CHECK: ret
     27 }
     28 
     29 define void @test_floatcsel(float %lhs32, float %rhs32, double %lhs64, double %rhs64) {
     30 ; CHECK-LABEL: test_floatcsel:
     31 
     32   %tst1 = fcmp one float %lhs32, %rhs32
     33 ; CHECK: fcmp {{s[0-9]+}}, {{s[0-9]+}}
     34 ; CHECK-NOFP-NOT: fcmp
     35   %val1 = select i1 %tst1, i32 42, i32 52
     36   store i32 %val1, i32* @var32
     37 ; CHECK: mov [[W52:w[0-9]+]], #{{52|0x34}}
     38 ; CHECK: mov [[W42:w[0-9]+]], #{{42|0x2a}}
     39 ; CHECK: csel [[MAYBETRUE:w[0-9]+]], [[W42]], [[W52]], mi
     40 ; CHECK: csel {{w[0-9]+}}, [[W42]], [[MAYBETRUE]], gt
     41 
     42 
     43   %tst2 = fcmp ueq double %lhs64, %rhs64
     44 ; CHECK: fcmp {{d[0-9]+}}, {{d[0-9]+}}
     45 ; CHECK-NOFP-NOT: fcmp
     46   %val2 = select i1 %tst2, i64 9, i64 15
     47   store i64 %val2, i64* @var64
     48 ; CHECK: orr w[[CONST15:[0-9]+]], wzr, #0xf
     49 ; CHECK: mov {{[wx]}}[[CONST9:[0-9]+]], #{{9|0x9}}
     50 ; CHECK: csel [[MAYBETRUE:x[0-9]+]], x[[CONST9]], x[[CONST15]], eq
     51 ; CHECK: csel {{x[0-9]+}}, x[[CONST9]], [[MAYBETRUE]], vs
     52 
     53   ret void
     54 ; CHECK: ret
     55 }
     56 
     57 
     58 define void @test_csinc(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
     59 ; CHECK-LABEL: test_csinc:
     60 
     61 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
     62   %tst1 = icmp ugt i32 %lhs32, %rhs32
     63   %inc1 = add i32 %rhs32, 1
     64   %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
     65   store volatile i32 %val1, i32* @var32
     66 ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
     67 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], [[RHS]], ls
     68 
     69   %rhs2 = add i32 %rhs32, 42
     70   %tst2 = icmp sle i32 %lhs32, %rhs2
     71   %inc2 = add i32 %rhs32, 1
     72   %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
     73   store volatile i32 %val2, i32* @var32
     74 ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
     75 ; CHECK: csinc {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
     76 
     77 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
     78   %rhs3 = sext i32 %rhs32 to i64
     79   %tst3 = icmp ugt i64 %lhs64, %rhs3
     80   %inc3 = add i64 %rhs3, 1
     81   %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
     82   store volatile i64 %val3, i64* @var64
     83 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
     84 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
     85 
     86   %rhs4 = zext i32 %rhs32 to i64
     87   %tst4 = icmp sle i64 %lhs64, %rhs4
     88   %inc4 = add i64 %rhs4, 1
     89   %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
     90   store volatile i64 %val4, i64* @var64
     91 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
     92 ; CHECK: csinc {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
     93 
     94   ret void
     95 ; CHECK: ret
     96 }
     97 
     98 define void @test_csinv(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
     99 ; CHECK-LABEL: test_csinv:
    100 
    101 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
    102   %tst1 = icmp ugt i32 %lhs32, %rhs32
    103   %inc1 = xor i32 -1, %rhs32
    104   %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
    105   store volatile i32 %val1, i32* @var32
    106 ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
    107 ; CHECK: csinv {{w[0-9]+}}, [[LHS]], [[RHS]], ls
    108 
    109   %rhs2 = add i32 %rhs32, 42
    110   %tst2 = icmp sle i32 %lhs32, %rhs2
    111   %inc2 = xor i32 -1, %rhs32
    112   %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
    113   store volatile i32 %val2, i32* @var32
    114 ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
    115 ; CHECK: csinv {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
    116 
    117 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
    118   %rhs3 = sext i32 %rhs32 to i64
    119   %tst3 = icmp ugt i64 %lhs64, %rhs3
    120   %inc3 = xor i64 -1, %rhs3
    121   %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
    122   store volatile i64 %val3, i64* @var64
    123 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
    124 ; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
    125 
    126   %rhs4 = zext i32 %rhs32 to i64
    127   %tst4 = icmp sle i64 %lhs64, %rhs4
    128   %inc4 = xor i64 -1, %rhs4
    129   %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
    130   store volatile i64 %val4, i64* @var64
    131 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
    132 ; CHECK: csinv {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
    133 
    134   ret void
    135 ; CHECK: ret
    136 }
    137 
    138 define void @test_csinv0(i32 %lhs32, i32 %rhs32, i64 %lhs64, i64 %rhs64) minsize {
    139 ; CHECK-LABEL: test_csinv0:
    140 
    141   %tst1 = icmp ugt i32 %lhs32, %rhs32
    142   %val1 = select i1 %tst1, i32 0, i32 -1
    143   store volatile i32 %val1, i32* @var32
    144 ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
    145 ; CHECK: csetm {{w[0-9]+}}, ls
    146 
    147   %rhs2 = add i32 %rhs32, 42
    148   %tst2 = icmp sle i32 %lhs32, %rhs2
    149   %val2 = select i1 %tst2, i32 -1, i32 %rhs2
    150   store volatile i32 %val2, i32* @var32
    151 ; CHECK: cmp [[LHS2:w[0-9]+]], [[RHS2:w[0-9]+]]
    152 ; CHECK: csinv {{w[0-9]+}}, [[RHS2]], wzr, gt
    153 
    154 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
    155   %rhs3 = mul i64 %rhs64, 19
    156   %tst3 = icmp ugt i64 %lhs64, %rhs3
    157   %val3 = select i1 %tst3, i64 %rhs3, i64 -1
    158   store volatile i64 %val3, i64* @var64
    159 ; CHECK: cmp [[LHS3:x[0-9]+]], [[RHS3:x[0-9]+]]
    160 ; CHECK: csinv {{x[0-9]+}}, [[RHS3]], xzr, hi
    161 
    162   ret void
    163 ; CHECK: ret
    164 }
    165 
    166 define void @test_csneg(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
    167 ; CHECK-LABEL: test_csneg:
    168 
    169 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
    170   %tst1 = icmp ugt i32 %lhs32, %rhs32
    171   %inc1 = sub i32 0, %rhs32
    172   %val1 = select i1 %tst1, i32 %inc1, i32 %lhs32
    173   store volatile i32 %val1, i32* @var32
    174 ; CHECK: cmp [[LHS:w[0-9]+]], [[RHS:w[0-9]+]]
    175 ; CHECK: csneg {{w[0-9]+}}, [[LHS]], [[RHS]], ls
    176 
    177   %rhs2 = add i32 %rhs32, 42
    178   %tst2 = icmp sle i32 %lhs32, %rhs2
    179   %inc2 = sub i32 0, %rhs32
    180   %val2 = select i1 %tst2, i32 %lhs32, i32 %inc2
    181   store volatile i32 %val2, i32* @var32
    182 ; CHECK: cmp [[LHS:w[0-9]+]], {{w[0-9]+}}
    183 ; CHECK: csneg {{w[0-9]+}}, [[LHS]], {{w[0-9]+}}, le
    184 
    185 ; Note that commuting rhs and lhs in the select changes ugt to ule (i.e. hi to ls).
    186   %rhs3 = sext i32 %rhs32 to i64
    187   %tst3 = icmp ugt i64 %lhs64, %rhs3
    188   %inc3 = sub i64 0, %rhs3
    189   %val3 = select i1 %tst3, i64 %inc3, i64 %lhs64
    190   store volatile i64 %val3, i64* @var64
    191 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
    192 ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, ls
    193 
    194   %rhs4 = zext i32 %rhs32 to i64
    195   %tst4 = icmp sle i64 %lhs64, %rhs4
    196   %inc4 = sub i64 0, %rhs4
    197   %val4 = select i1 %tst4, i64 %lhs64, i64 %inc4
    198   store volatile i64 %val4, i64* @var64
    199 ; CHECK: cmp [[LHS:x[0-9]+]], {{w[0-9]+}}
    200 ; CHECK: csneg {{x[0-9]+}}, [[LHS]], {{x[0-9]+}}, le
    201 
    202   ret void
    203 ; CHECK: ret
    204 }
    205 
    206 define void @test_cset(i32 %lhs, i32 %rhs, i64 %lhs64) {
    207 ; CHECK-LABEL: test_cset:
    208 
    209 ; N.b. code is not optimal here (32-bit csinc would be better) but
    210 ; incoming DAG is too complex
    211   %tst1 = icmp eq i32 %lhs, %rhs
    212   %val1 = zext i1 %tst1 to i32
    213   store i32 %val1, i32* @var32
    214 ; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}
    215 ; CHECK: cset {{w[0-9]+}}, eq
    216 
    217   %rhs64 = sext i32 %rhs to i64
    218   %tst2 = icmp ule i64 %lhs64, %rhs64
    219   %val2 = zext i1 %tst2 to i64
    220   store i64 %val2, i64* @var64
    221 ; CHECK: cset {{w[0-9]+}}, ls
    222 
    223   ret void
    224 ; CHECK: ret
    225 }
    226 
    227 define void @test_csetm(i32 %lhs, i32 %rhs, i64 %lhs64) {
    228 ; CHECK-LABEL: test_csetm:
    229 
    230   %tst1 = icmp eq i32 %lhs, %rhs
    231   %val1 = sext i1 %tst1 to i32
    232   store i32 %val1, i32* @var32
    233 ; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}
    234 ; CHECK: csetm {{w[0-9]+}}, eq
    235 
    236   %rhs64 = sext i32 %rhs to i64
    237   %tst2 = icmp ule i64 %lhs64, %rhs64
    238   %val2 = sext i1 %tst2 to i64
    239   store i64 %val2, i64* @var64
    240 ; CHECK: csetm {{x[0-9]+}}, ls
    241 
    242   ret void
    243 ; CHECK: ret
    244 }
    245 
    246 define <1 x i1> @test_wide_comparison(i32 %in) {
    247 ; CHECK-LABEL: test_wide_comparison:
    248 ; CHECK: cmp w0, #1234
    249 ; CHECK: cset
    250 
    251   %tmp = icmp sgt i32 %in, 1234
    252   %res = select i1 %tmp, <1 x i1> <i1 1>, <1 x i1> zeroinitializer
    253   ret <1 x i1> %res
    254 }
    255 
    256 define i32 @test_select_undef() {
    257 ; CHECK-LABEL: test_select_undef:
    258 ; CHECK: ret
    259   %res = select i1 undef, i32 0, i32 42
    260   ret i32 %res
    261 }
    262