1 ; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 -aarch64-atomic-cfg-tidy=0 | FileCheck %s 2 ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 -aarch64-atomic-cfg-tidy=0 | FileCheck --check-prefix=CHECK-NOFP %s 3 4 define i32 @test_select_i32(i1 %bit, i32 %a, i32 %b) { 5 ; CHECK-LABEL: test_select_i32: 6 %val = select i1 %bit, i32 %a, i32 %b 7 ; CHECK: tst w0, #0x1 8 ; CHECK-NEXT: csel w0, w1, w2, ne 9 10 ret i32 %val 11 } 12 13 define i64 @test_select_i64(i1 %bit, i64 %a, i64 %b) { 14 ; CHECK-LABEL: test_select_i64: 15 %val = select i1 %bit, i64 %a, i64 %b 16 ; CHECK: tst w0, #0x1 17 ; CHECK-NEXT: csel x0, x1, x2, ne 18 19 ret i64 %val 20 } 21 22 define float @test_select_float(i1 %bit, float %a, float %b) { 23 ; CHECK-LABEL: test_select_float: 24 %val = select i1 %bit, float %a, float %b 25 ; CHECK: tst w0, #0x1 26 ; CHECK-NEXT: fcsel s0, s0, s1, ne 27 ; CHECK-NOFP-NOT: fcsel 28 ret float %val 29 } 30 31 define double @test_select_double(i1 %bit, double %a, double %b) { 32 ; CHECK-LABEL: test_select_double: 33 %val = select i1 %bit, double %a, double %b 34 ; CHECK: tst w0, #0x1 35 ; CHECK-NEXT: fcsel d0, d0, d1, ne 36 ; CHECK-NOFP-NOT: fcsel 37 38 ret double %val 39 } 40 41 define i32 @test_brcond(i1 %bit) { 42 ; CHECK-LABEL: test_brcond: 43 br i1 %bit, label %true, label %false 44 ; CHECK: tbz {{w[0-9]+}}, #0, {{.?LBB}} 45 46 true: 47 ret i32 0 48 false: 49 ret i32 42 50 } 51 52 define i1 @test_setcc_float(float %lhs, float %rhs) { 53 ; CHECK: test_setcc_float 54 %val = fcmp oeq float %lhs, %rhs 55 ; CHECK: fcmp s0, s1 56 ; CHECK: cset w0, eq 57 ; CHECK-NOFP-NOT: fcmp 58 ret i1 %val 59 } 60 61 define i1 @test_setcc_double(double %lhs, double %rhs) { 62 ; CHECK: test_setcc_double 63 %val = fcmp oeq double %lhs, %rhs 64 ; CHECK: fcmp d0, d1 65 ; CHECK: cset w0, eq 66 ; CHECK-NOFP-NOT: fcmp 67 ret i1 %val 68 } 69 70 define i1 @test_setcc_i32(i32 %lhs, i32 %rhs) { 71 ; CHECK: test_setcc_i32 72 %val = icmp ugt i32 %lhs, %rhs 73 ; CHECK: cmp w0, w1 74 ; CHECK: cset w0, hi 75 ret i1 %val 76 } 77 78 define i1 @test_setcc_i64(i64 %lhs, i64 %rhs) { 79 ; CHECK: test_setcc_i64 80 %val = icmp ne i64 %lhs, %rhs 81 ; CHECK: cmp x0, x1 82 ; CHECK: cset w0, ne 83 ret i1 %val 84 } 85
