1 ; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s 2 3 define i32 @test_floattoi32(float %in) { 4 ; CHECK-LABEL: test_floattoi32: 5 6 %signed = fptosi float %in to i32 7 %unsigned = fptoui float %in to i32 8 ; CHECK-DAG: fcvtzu [[UNSIG:w[0-9]+]], {{s[0-9]+}} 9 ; CHECK-DAG: fcvtzs [[SIG:w[0-9]+]], {{s[0-9]+}} 10 11 %res = sub i32 %signed, %unsigned 12 ; CHECK: sub {{w[0-9]+}}, [[SIG]], [[UNSIG]] 13 14 ret i32 %res 15 ; CHECK: ret 16 } 17 18 define i32 @test_doubletoi32(double %in) { 19 ; CHECK-LABEL: test_doubletoi32: 20 21 %signed = fptosi double %in to i32 22 %unsigned = fptoui double %in to i32 23 ; CHECK-DAG: fcvtzu [[UNSIG:w[0-9]+]], {{d[0-9]+}} 24 ; CHECK-DAG: fcvtzs [[SIG:w[0-9]+]], {{d[0-9]+}} 25 26 %res = sub i32 %signed, %unsigned 27 ; CHECK: sub {{w[0-9]+}}, [[SIG]], [[UNSIG]] 28 29 ret i32 %res 30 ; CHECK: ret 31 } 32 33 define i64 @test_floattoi64(float %in) { 34 ; CHECK-LABEL: test_floattoi64: 35 36 %signed = fptosi float %in to i64 37 %unsigned = fptoui float %in to i64 38 ; CHECK-DAG: fcvtzu [[UNSIG:x[0-9]+]], {{s[0-9]+}} 39 ; CHECK-DAG: fcvtzs [[SIG:x[0-9]+]], {{s[0-9]+}} 40 41 %res = sub i64 %signed, %unsigned 42 ; CHECK: sub {{x[0-9]+}}, [[SIG]], [[UNSIG]] 43 44 ret i64 %res 45 ; CHECK: ret 46 } 47 48 define i64 @test_doubletoi64(double %in) { 49 ; CHECK-LABEL: test_doubletoi64: 50 51 %signed = fptosi double %in to i64 52 %unsigned = fptoui double %in to i64 53 ; CHECK-DAG: fcvtzu [[UNSIG:x[0-9]+]], {{d[0-9]+}} 54 ; CHECK-DAG: fcvtzs [[SIG:x[0-9]+]], {{d[0-9]+}} 55 56 %res = sub i64 %signed, %unsigned 57 ; CHECK: sub {{x[0-9]+}}, [[SIG]], [[UNSIG]] 58 59 ret i64 %res 60 ; CHECK: ret 61 } 62 63 define float @test_i32tofloat(i32 %in) { 64 ; CHECK-LABEL: test_i32tofloat: 65 66 %signed = sitofp i32 %in to float 67 %unsigned = uitofp i32 %in to float 68 ; CHECK-DAG: ucvtf [[UNSIG:s[0-9]+]], {{w[0-9]+}} 69 ; CHECK-DAG: scvtf [[SIG:s[0-9]+]], {{w[0-9]+}} 70 71 %res = fsub float %signed, %unsigned 72 ; CHECK: fsub {{s[0-9]+}}, [[SIG]], [[UNSIG]] 73 ret float %res 74 ; CHECK: ret 75 } 76 77 define double @test_i32todouble(i32 %in) { 78 ; CHECK-LABEL: test_i32todouble: 79 80 %signed = sitofp i32 %in to double 81 %unsigned = uitofp i32 %in to double 82 ; CHECK-DAG: ucvtf [[UNSIG:d[0-9]+]], {{w[0-9]+}} 83 ; CHECK-DAG: scvtf [[SIG:d[0-9]+]], {{w[0-9]+}} 84 85 %res = fsub double %signed, %unsigned 86 ; CHECK: fsub {{d[0-9]+}}, [[SIG]], [[UNSIG]] 87 ret double %res 88 ; CHECK: ret 89 } 90 91 define float @test_i64tofloat(i64 %in) { 92 ; CHECK-LABEL: test_i64tofloat: 93 94 %signed = sitofp i64 %in to float 95 %unsigned = uitofp i64 %in to float 96 ; CHECK-DAG: ucvtf [[UNSIG:s[0-9]+]], {{x[0-9]+}} 97 ; CHECK-DAG: scvtf [[SIG:s[0-9]+]], {{x[0-9]+}} 98 99 %res = fsub float %signed, %unsigned 100 ; CHECK: fsub {{s[0-9]+}}, [[SIG]], [[UNSIG]] 101 ret float %res 102 ; CHECK: ret 103 } 104 105 define double @test_i64todouble(i64 %in) { 106 ; CHECK-LABEL: test_i64todouble: 107 108 %signed = sitofp i64 %in to double 109 %unsigned = uitofp i64 %in to double 110 ; CHECK-DAG: ucvtf [[UNSIG:d[0-9]+]], {{x[0-9]+}} 111 ; CHECK-DAG: scvtf [[SIG:d[0-9]+]], {{x[0-9]+}} 112 113 %res = fsub double %signed, %unsigned 114 ; CHECK: sub {{d[0-9]+}}, [[SIG]], [[UNSIG]] 115 ret double %res 116 ; CHECK: ret 117 } 118 119 define i32 @test_bitcastfloattoi32(float %in) { 120 ; CHECK-LABEL: test_bitcastfloattoi32: 121 122 %res = bitcast float %in to i32 123 ; CHECK: fmov {{w[0-9]+}}, {{s[0-9]+}} 124 ret i32 %res 125 } 126 127 define i64 @test_bitcastdoubletoi64(double %in) { 128 ; CHECK-LABEL: test_bitcastdoubletoi64: 129 130 %res = bitcast double %in to i64 131 ; CHECK: fmov {{x[0-9]+}}, {{d[0-9]+}} 132 ret i64 %res 133 } 134 135 define float @test_bitcasti32tofloat(i32 %in) { 136 ; CHECK-LABEL: test_bitcasti32tofloat: 137 138 %res = bitcast i32 %in to float 139 ; CHECK: fmov {{s[0-9]+}}, {{w[0-9]+}} 140 ret float %res 141 142 } 143 144 define double @test_bitcasti64todouble(i64 %in) { 145 ; CHECK-LABEL: test_bitcasti64todouble: 146 147 %res = bitcast i64 %in to double 148 ; CHECK: fmov {{d[0-9]+}}, {{x[0-9]+}} 149 ret double %res 150 151 } 152 153 define double @bitcast_fabs(double %x) { 154 ; CHECK-LABEL: bitcast_fabs: 155 ; CHECK: ; BB#0: 156 ; CHECK-NEXT: fabs d0, d0 157 ; CHECK-NEXT: ret 158 ; 159 %bc1 = bitcast double %x to i64 160 %and = and i64 %bc1, 9223372036854775807 161 %bc2 = bitcast i64 %and to double 162 ret double %bc2 163 } 164 165 define float @bitcast_fneg(float %x) { 166 ; CHECK-LABEL: bitcast_fneg: 167 ; CHECK: ; BB#0: 168 ; CHECK-NEXT: fneg s0, s0 169 ; CHECK-NEXT: ret 170 ; 171 %bc1 = bitcast float %x to i32 172 %xor = xor i32 %bc1, 2147483648 173 %bc2 = bitcast i32 %xor to float 174 ret float %bc2 175 } 176 177
