1 ; RUN: llc -mtriple=aarch64-linux-gnu -aarch64-neon-syntax=apple -verify-machineinstrs -o - %s | FileCheck %s 2 3 ; Test signed conversion. 4 ; CHECK-LABEL: @test1 5 ; CHECK: scvtf.2s v0, v0, #4 6 ; CHECK: ret 7 define <2 x float> @test1(<2 x i32> %in) { 8 entry: 9 %vcvt.i = sitofp <2 x i32> %in to <2 x float> 10 %div.i = fdiv <2 x float> %vcvt.i, <float 16.0, float 16.0> 11 ret <2 x float> %div.i 12 } 13 14 ; Test unsigned conversion. 15 ; CHECK-LABEL: @test2 16 ; CHECK: ucvtf.2s v0, v0, #3 17 ; CHECK: ret 18 define <2 x float> @test2(<2 x i32> %in) { 19 entry: 20 %vcvt.i = uitofp <2 x i32> %in to <2 x float> 21 %div.i = fdiv <2 x float> %vcvt.i, <float 8.0, float 8.0> 22 ret <2 x float> %div.i 23 } 24 25 ; Test which should not fold due to non-power of 2. 26 ; CHECK-LABEL: @test3 27 ; CHECK: scvtf.2s v0, v0 28 ; CHECK: fmov.2s v1, #9.00000000 29 ; CHECK: fdiv.2s v0, v0, v1 30 ; CHECK: ret 31 define <2 x float> @test3(<2 x i32> %in) { 32 entry: 33 %vcvt.i = sitofp <2 x i32> %in to <2 x float> 34 %div.i = fdiv <2 x float> %vcvt.i, <float 9.0, float 9.0> 35 ret <2 x float> %div.i 36 } 37 38 ; Test which should not fold due to power of 2 out of range. 39 ; CHECK-LABEL: @test4 40 ; CHECK: scvtf.2s v0, v0 41 ; CHECK: movi.2s v1, #80, lsl #24 42 ; CHECK: fdiv.2s v0, v0, v1 43 ; CHECK: ret 44 define <2 x float> @test4(<2 x i32> %in) { 45 entry: 46 %vcvt.i = sitofp <2 x i32> %in to <2 x float> 47 %div.i = fdiv <2 x float> %vcvt.i, <float 0x4200000000000000, float 0x4200000000000000> 48 ret <2 x float> %div.i 49 } 50 51 ; Test case where const is max power of 2 (i.e., 2^32). 52 ; CHECK-LABEL: @test5 53 ; CHECK: scvtf.2s v0, v0, #32 54 ; CHECK: ret 55 define <2 x float> @test5(<2 x i32> %in) { 56 entry: 57 %vcvt.i = sitofp <2 x i32> %in to <2 x float> 58 %div.i = fdiv <2 x float> %vcvt.i, <float 0x41F0000000000000, float 0x41F0000000000000> 59 ret <2 x float> %div.i 60 } 61 62 ; Test quadword. 63 ; CHECK-LABEL: @test6 64 ; CHECK: scvtf.4s v0, v0, #2 65 ; CHECK: ret 66 define <4 x float> @test6(<4 x i32> %in) { 67 entry: 68 %vcvt.i = sitofp <4 x i32> %in to <4 x float> 69 %div.i = fdiv <4 x float> %vcvt.i, <float 4.0, float 4.0, float 4.0, float 4.0> 70 ret <4 x float> %div.i 71 } 72 73 ; Test unsigned i16 to float 74 ; CHECK-LABEL: @test7 75 ; CHECK: ushll.4s v0, v0, #0 76 ; CHECK: ucvtf.4s v0, v0, #1 77 ; CHECK: ret 78 define <4 x float> @test7(<4 x i16> %in) { 79 %conv = uitofp <4 x i16> %in to <4 x float> 80 %shift = fdiv <4 x float> %conv, <float 2.0, float 2.0, float 2.0, float 2.0> 81 ret <4 x float> %shift 82 } 83 84 ; Test signed i16 to float 85 ; CHECK-LABEL: @test8 86 ; CHECK: sshll.4s v0, v0, #0 87 ; CHECK: scvtf.4s v0, v0, #2 88 ; CHECK: ret 89 define <4 x float> @test8(<4 x i16> %in) { 90 %conv = sitofp <4 x i16> %in to <4 x float> 91 %shift = fdiv <4 x float> %conv, <float 4.0, float 4.0, float 4.0, float 4.0> 92 ret <4 x float> %shift 93 } 94 95 ; Can't convert i64 to float. 96 ; CHECK-LABEL: @test9 97 ; CHECK: ucvtf.2d v0, v0 98 ; CHECK: fcvtn v0.2s, v0.2d 99 ; CHECK: movi.2s v1, #64, lsl #24 100 ; CHECK: fdiv.2s v0, v0, v1 101 ; CHECK: ret 102 define <2 x float> @test9(<2 x i64> %in) { 103 %conv = uitofp <2 x i64> %in to <2 x float> 104 %shift = fdiv <2 x float> %conv, <float 2.0, float 2.0> 105 ret <2 x float> %shift 106 } 107 108 ; CHECK-LABEL: @test10 109 ; CHECK: ucvtf.2d v0, v0, #1 110 ; CHECK: ret 111 define <2 x double> @test10(<2 x i64> %in) { 112 %conv = uitofp <2 x i64> %in to <2 x double> 113 %shift = fdiv <2 x double> %conv, <double 2.0, double 2.0> 114 ret <2 x double> %shift 115 } 116
