1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s 2 3 define <2 x float> @test_vfma_lane_f32(<2 x float> %a, <2 x float> %b, <2 x float> %v) { 4 ; CHECK: test_vfma_lane_f32: 5 ; CHECK: fmul {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.s[{{[0-9]+}}] 6 ; CHECK: fadd {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 7 entry: 8 %shuffle = shufflevector <2 x float> %v, <2 x float> undef, <2 x i32> <i32 1, i32 1> 9 %mul = fmul <2 x float> %shuffle, %b 10 %add = fadd <2 x float> %mul, %a 11 ret <2 x float> %add 12 } 13 14 define <4 x i32> @test_vshrn_not_match(<2 x i32> %a, <2 x i64> %b) { 15 ; CHECK: test_vshrn_not_match 16 ; CHECK-NOT: shrn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, #35 17 %1 = bitcast <2 x i32> %a to <1 x i64> 18 %2 = ashr <2 x i64> %b, <i64 35, i64 35> 19 %vshrn_n = trunc <2 x i64> %2 to <2 x i32> 20 %3 = bitcast <2 x i32> %vshrn_n to <1 x i64> 21 %shuffle.i = shufflevector <1 x i64> %1, <1 x i64> %3, <2 x i32> <i32 0, i32 1> 22 %4 = bitcast <2 x i64> %shuffle.i to <4 x i32> 23 ret <4 x i32> %4 24 } 25
