Home | History | Annotate | Download | only in AArch64 
      1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
      2 
      3 %struct.int8x8x2_t = type { [2 x <8 x i8>] }
      4 %struct.int16x4x2_t = type { [2 x <4 x i16>] }
      5 %struct.int32x2x2_t = type { [2 x <2 x i32>] }
      6 %struct.uint8x8x2_t = type { [2 x <8 x i8>] }
      7 %struct.uint16x4x2_t = type { [2 x <4 x i16>] }
      8 %struct.uint32x2x2_t = type { [2 x <2 x i32>] }
      9 %struct.float32x2x2_t = type { [2 x <2 x float>] }
     10 %struct.poly8x8x2_t = type { [2 x <8 x i8>] }
     11 %struct.poly16x4x2_t = type { [2 x <4 x i16>] }
     12 %struct.int8x16x2_t = type { [2 x <16 x i8>] }
     13 %struct.int16x8x2_t = type { [2 x <8 x i16>] }
     14 %struct.int32x4x2_t = type { [2 x <4 x i32>] }
     15 %struct.uint8x16x2_t = type { [2 x <16 x i8>] }
     16 %struct.uint16x8x2_t = type { [2 x <8 x i16>] }
     17 %struct.uint32x4x2_t = type { [2 x <4 x i32>] }
     18 %struct.float32x4x2_t = type { [2 x <4 x float>] }
     19 %struct.poly8x16x2_t = type { [2 x <16 x i8>] }
     20 %struct.poly16x8x2_t = type { [2 x <8 x i16>] }
     21 
     22 define <8 x i8> @test_vuzp1_s8(<8 x i8> %a, <8 x i8> %b) {
     23 ; CHECK-LABEL: test_vuzp1_s8:
     24 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
     25 entry:
     26   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
     27   ret <8 x i8> %shuffle.i
     28 }
     29 
     30 define <16 x i8> @test_vuzp1q_s8(<16 x i8> %a, <16 x i8> %b) {
     31 ; CHECK-LABEL: test_vuzp1q_s8:
     32 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
     33 entry:
     34   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
     35   ret <16 x i8> %shuffle.i
     36 }
     37 
     38 define <4 x i16> @test_vuzp1_s16(<4 x i16> %a, <4 x i16> %b) {
     39 ; CHECK-LABEL: test_vuzp1_s16:
     40 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
     41 entry:
     42   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
     43   ret <4 x i16> %shuffle.i
     44 }
     45 
     46 define <8 x i16> @test_vuzp1q_s16(<8 x i16> %a, <8 x i16> %b) {
     47 ; CHECK-LABEL: test_vuzp1q_s16:
     48 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
     49 entry:
     50   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
     51   ret <8 x i16> %shuffle.i
     52 }
     53 
     54 define <2 x i32> @test_vuzp1_s32(<2 x i32> %a, <2 x i32> %b) {
     55 ; CHECK-LABEL: test_vuzp1_s32:
     56 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
     57 entry:
     58   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
     59   ret <2 x i32> %shuffle.i
     60 }
     61 
     62 define <4 x i32> @test_vuzp1q_s32(<4 x i32> %a, <4 x i32> %b) {
     63 ; CHECK-LABEL: test_vuzp1q_s32:
     64 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
     65 entry:
     66   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
     67   ret <4 x i32> %shuffle.i
     68 }
     69 
     70 define <2 x i64> @test_vuzp1q_s64(<2 x i64> %a, <2 x i64> %b) {
     71 ; CHECK-LABEL: test_vuzp1q_s64:
     72 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
     73 entry:
     74   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
     75   ret <2 x i64> %shuffle.i
     76 }
     77 
     78 define <8 x i8> @test_vuzp1_u8(<8 x i8> %a, <8 x i8> %b) {
     79 ; CHECK-LABEL: test_vuzp1_u8:
     80 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
     81 entry:
     82   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
     83   ret <8 x i8> %shuffle.i
     84 }
     85 
     86 define <16 x i8> @test_vuzp1q_u8(<16 x i8> %a, <16 x i8> %b) {
     87 ; CHECK-LABEL: test_vuzp1q_u8:
     88 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
     89 entry:
     90   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
     91   ret <16 x i8> %shuffle.i
     92 }
     93 
     94 define <4 x i16> @test_vuzp1_u16(<4 x i16> %a, <4 x i16> %b) {
     95 ; CHECK-LABEL: test_vuzp1_u16:
     96 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
     97 entry:
     98   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
     99   ret <4 x i16> %shuffle.i
    100 }
    101 
    102 define <8 x i16> @test_vuzp1q_u16(<8 x i16> %a, <8 x i16> %b) {
    103 ; CHECK-LABEL: test_vuzp1q_u16:
    104 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    105 entry:
    106   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
    107   ret <8 x i16> %shuffle.i
    108 }
    109 
    110 define <2 x i32> @test_vuzp1_u32(<2 x i32> %a, <2 x i32> %b) {
    111 ; CHECK-LABEL: test_vuzp1_u32:
    112 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    113 entry:
    114   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
    115   ret <2 x i32> %shuffle.i
    116 }
    117 
    118 define <4 x i32> @test_vuzp1q_u32(<4 x i32> %a, <4 x i32> %b) {
    119 ; CHECK-LABEL: test_vuzp1q_u32:
    120 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    121 entry:
    122   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
    123   ret <4 x i32> %shuffle.i
    124 }
    125 
    126 define <2 x i64> @test_vuzp1q_u64(<2 x i64> %a, <2 x i64> %b) {
    127 ; CHECK-LABEL: test_vuzp1q_u64:
    128 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    129 entry:
    130   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
    131   ret <2 x i64> %shuffle.i
    132 }
    133 
    134 define <2 x float> @test_vuzp1_f32(<2 x float> %a, <2 x float> %b) {
    135 ; CHECK-LABEL: test_vuzp1_f32:
    136 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    137 entry:
    138   %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
    139   ret <2 x float> %shuffle.i
    140 }
    141 
    142 define <4 x float> @test_vuzp1q_f32(<4 x float> %a, <4 x float> %b) {
    143 ; CHECK-LABEL: test_vuzp1q_f32:
    144 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    145 entry:
    146   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
    147   ret <4 x float> %shuffle.i
    148 }
    149 
    150 define <2 x double> @test_vuzp1q_f64(<2 x double> %a, <2 x double> %b) {
    151 ; CHECK-LABEL: test_vuzp1q_f64:
    152 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    153 entry:
    154   %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
    155   ret <2 x double> %shuffle.i
    156 }
    157 
    158 define <8 x i8> @test_vuzp1_p8(<8 x i8> %a, <8 x i8> %b) {
    159 ; CHECK-LABEL: test_vuzp1_p8:
    160 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    161 entry:
    162   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
    163   ret <8 x i8> %shuffle.i
    164 }
    165 
    166 define <16 x i8> @test_vuzp1q_p8(<16 x i8> %a, <16 x i8> %b) {
    167 ; CHECK-LABEL: test_vuzp1q_p8:
    168 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    169 entry:
    170   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
    171   ret <16 x i8> %shuffle.i
    172 }
    173 
    174 define <4 x i16> @test_vuzp1_p16(<4 x i16> %a, <4 x i16> %b) {
    175 ; CHECK-LABEL: test_vuzp1_p16:
    176 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    177 entry:
    178   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
    179   ret <4 x i16> %shuffle.i
    180 }
    181 
    182 define <8 x i16> @test_vuzp1q_p16(<8 x i16> %a, <8 x i16> %b) {
    183 ; CHECK-LABEL: test_vuzp1q_p16:
    184 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    185 entry:
    186   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
    187   ret <8 x i16> %shuffle.i
    188 }
    189 
    190 define <8 x i8> @test_vuzp2_s8(<8 x i8> %a, <8 x i8> %b) {
    191 ; CHECK-LABEL: test_vuzp2_s8:
    192 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    193 entry:
    194   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    195   ret <8 x i8> %shuffle.i
    196 }
    197 
    198 define <16 x i8> @test_vuzp2q_s8(<16 x i8> %a, <16 x i8> %b) {
    199 ; CHECK-LABEL: test_vuzp2q_s8:
    200 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    201 entry:
    202   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
    203   ret <16 x i8> %shuffle.i
    204 }
    205 
    206 define <4 x i16> @test_vuzp2_s16(<4 x i16> %a, <4 x i16> %b) {
    207 ; CHECK-LABEL: test_vuzp2_s16:
    208 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    209 entry:
    210   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
    211   ret <4 x i16> %shuffle.i
    212 }
    213 
    214 define <8 x i16> @test_vuzp2q_s16(<8 x i16> %a, <8 x i16> %b) {
    215 ; CHECK-LABEL: test_vuzp2q_s16:
    216 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    217 entry:
    218   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    219   ret <8 x i16> %shuffle.i
    220 }
    221 
    222 define <2 x i32> @test_vuzp2_s32(<2 x i32> %a, <2 x i32> %b) {
    223 ; CHECK-LABEL: test_vuzp2_s32:
    224 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    225 entry:
    226   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
    227   ret <2 x i32> %shuffle.i
    228 }
    229 
    230 define <4 x i32> @test_vuzp2q_s32(<4 x i32> %a, <4 x i32> %b) {
    231 ; CHECK-LABEL: test_vuzp2q_s32:
    232 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    233 entry:
    234   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
    235   ret <4 x i32> %shuffle.i
    236 }
    237 
    238 define <2 x i64> @test_vuzp2q_s64(<2 x i64> %a, <2 x i64> %b) {
    239 ; CHECK-LABEL: test_vuzp2q_s64:
    240 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    241 entry:
    242   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
    243   ret <2 x i64> %shuffle.i
    244 }
    245 
    246 define <8 x i8> @test_vuzp2_u8(<8 x i8> %a, <8 x i8> %b) {
    247 ; CHECK-LABEL: test_vuzp2_u8:
    248 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    249 entry:
    250   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    251   ret <8 x i8> %shuffle.i
    252 }
    253 
    254 define <16 x i8> @test_vuzp2q_u8(<16 x i8> %a, <16 x i8> %b) {
    255 ; CHECK-LABEL: test_vuzp2q_u8:
    256 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    257 entry:
    258   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
    259   ret <16 x i8> %shuffle.i
    260 }
    261 
    262 define <4 x i16> @test_vuzp2_u16(<4 x i16> %a, <4 x i16> %b) {
    263 ; CHECK-LABEL: test_vuzp2_u16:
    264 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    265 entry:
    266   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
    267   ret <4 x i16> %shuffle.i
    268 }
    269 
    270 define <8 x i16> @test_vuzp2q_u16(<8 x i16> %a, <8 x i16> %b) {
    271 ; CHECK-LABEL: test_vuzp2q_u16:
    272 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    273 entry:
    274   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    275   ret <8 x i16> %shuffle.i
    276 }
    277 
    278 define <2 x i32> @test_vuzp2_u32(<2 x i32> %a, <2 x i32> %b) {
    279 ; CHECK-LABEL: test_vuzp2_u32:
    280 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    281 entry:
    282   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
    283   ret <2 x i32> %shuffle.i
    284 }
    285 
    286 define <4 x i32> @test_vuzp2q_u32(<4 x i32> %a, <4 x i32> %b) {
    287 ; CHECK-LABEL: test_vuzp2q_u32:
    288 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    289 entry:
    290   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
    291   ret <4 x i32> %shuffle.i
    292 }
    293 
    294 define <2 x i64> @test_vuzp2q_u64(<2 x i64> %a, <2 x i64> %b) {
    295 ; CHECK-LABEL: test_vuzp2q_u64:
    296 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    297 entry:
    298   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
    299   ret <2 x i64> %shuffle.i
    300 }
    301 
    302 define <2 x float> @test_vuzp2_f32(<2 x float> %a, <2 x float> %b) {
    303 ; CHECK-LABEL: test_vuzp2_f32:
    304 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    305 entry:
    306   %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
    307   ret <2 x float> %shuffle.i
    308 }
    309 
    310 define <4 x float> @test_vuzp2q_f32(<4 x float> %a, <4 x float> %b) {
    311 ; CHECK-LABEL: test_vuzp2q_f32:
    312 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    313 entry:
    314   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
    315   ret <4 x float> %shuffle.i
    316 }
    317 
    318 define <2 x double> @test_vuzp2q_f64(<2 x double> %a, <2 x double> %b) {
    319 ; CHECK-LABEL: test_vuzp2q_f64:
    320 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    321 entry:
    322   %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
    323   ret <2 x double> %shuffle.i
    324 }
    325 
    326 define <8 x i8> @test_vuzp2_p8(<8 x i8> %a, <8 x i8> %b) {
    327 ; CHECK-LABEL: test_vuzp2_p8:
    328 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    329 entry:
    330   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    331   ret <8 x i8> %shuffle.i
    332 }
    333 
    334 define <16 x i8> @test_vuzp2q_p8(<16 x i8> %a, <16 x i8> %b) {
    335 ; CHECK-LABEL: test_vuzp2q_p8:
    336 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    337 entry:
    338   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
    339   ret <16 x i8> %shuffle.i
    340 }
    341 
    342 define <4 x i16> @test_vuzp2_p16(<4 x i16> %a, <4 x i16> %b) {
    343 ; CHECK-LABEL: test_vuzp2_p16:
    344 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    345 entry:
    346   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
    347   ret <4 x i16> %shuffle.i
    348 }
    349 
    350 define <8 x i16> @test_vuzp2q_p16(<8 x i16> %a, <8 x i16> %b) {
    351 ; CHECK-LABEL: test_vuzp2q_p16:
    352 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    353 entry:
    354   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
    355   ret <8 x i16> %shuffle.i
    356 }
    357 
    358 define <8 x i8> @test_vzip1_s8(<8 x i8> %a, <8 x i8> %b) {
    359 ; CHECK-LABEL: test_vzip1_s8:
    360 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    361 entry:
    362   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
    363   ret <8 x i8> %shuffle.i
    364 }
    365 
    366 define <16 x i8> @test_vzip1q_s8(<16 x i8> %a, <16 x i8> %b) {
    367 ; CHECK-LABEL: test_vzip1q_s8:
    368 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    369 entry:
    370   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
    371   ret <16 x i8> %shuffle.i
    372 }
    373 
    374 define <4 x i16> @test_vzip1_s16(<4 x i16> %a, <4 x i16> %b) {
    375 ; CHECK-LABEL: test_vzip1_s16:
    376 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    377 entry:
    378   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
    379   ret <4 x i16> %shuffle.i
    380 }
    381 
    382 define <8 x i16> @test_vzip1q_s16(<8 x i16> %a, <8 x i16> %b) {
    383 ; CHECK-LABEL: test_vzip1q_s16:
    384 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    385 entry:
    386   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
    387   ret <8 x i16> %shuffle.i
    388 }
    389 
    390 define <2 x i32> @test_vzip1_s32(<2 x i32> %a, <2 x i32> %b) {
    391 ; CHECK-LABEL: test_vzip1_s32:
    392 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    393 entry:
    394   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
    395   ret <2 x i32> %shuffle.i
    396 }
    397 
    398 define <4 x i32> @test_vzip1q_s32(<4 x i32> %a, <4 x i32> %b) {
    399 ; CHECK-LABEL: test_vzip1q_s32:
    400 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    401 entry:
    402   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
    403   ret <4 x i32> %shuffle.i
    404 }
    405 
    406 define <2 x i64> @test_vzip1q_s64(<2 x i64> %a, <2 x i64> %b) {
    407 ; CHECK-LABEL: test_vzip1q_s64:
    408 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    409 entry:
    410   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
    411   ret <2 x i64> %shuffle.i
    412 }
    413 
    414 define <8 x i8> @test_vzip1_u8(<8 x i8> %a, <8 x i8> %b) {
    415 ; CHECK-LABEL: test_vzip1_u8:
    416 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    417 entry:
    418   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
    419   ret <8 x i8> %shuffle.i
    420 }
    421 
    422 define <16 x i8> @test_vzip1q_u8(<16 x i8> %a, <16 x i8> %b) {
    423 ; CHECK-LABEL: test_vzip1q_u8:
    424 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    425 entry:
    426   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
    427   ret <16 x i8> %shuffle.i
    428 }
    429 
    430 define <4 x i16> @test_vzip1_u16(<4 x i16> %a, <4 x i16> %b) {
    431 ; CHECK-LABEL: test_vzip1_u16:
    432 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    433 entry:
    434   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
    435   ret <4 x i16> %shuffle.i
    436 }
    437 
    438 define <8 x i16> @test_vzip1q_u16(<8 x i16> %a, <8 x i16> %b) {
    439 ; CHECK-LABEL: test_vzip1q_u16:
    440 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    441 entry:
    442   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
    443   ret <8 x i16> %shuffle.i
    444 }
    445 
    446 define <2 x i32> @test_vzip1_u32(<2 x i32> %a, <2 x i32> %b) {
    447 ; CHECK-LABEL: test_vzip1_u32:
    448 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    449 entry:
    450   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
    451   ret <2 x i32> %shuffle.i
    452 }
    453 
    454 define <4 x i32> @test_vzip1q_u32(<4 x i32> %a, <4 x i32> %b) {
    455 ; CHECK-LABEL: test_vzip1q_u32:
    456 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    457 entry:
    458   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
    459   ret <4 x i32> %shuffle.i
    460 }
    461 
    462 define <2 x i64> @test_vzip1q_u64(<2 x i64> %a, <2 x i64> %b) {
    463 ; CHECK-LABEL: test_vzip1q_u64:
    464 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    465 entry:
    466   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
    467   ret <2 x i64> %shuffle.i
    468 }
    469 
    470 define <2 x float> @test_vzip1_f32(<2 x float> %a, <2 x float> %b) {
    471 ; CHECK-LABEL: test_vzip1_f32:
    472 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    473 entry:
    474   %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
    475   ret <2 x float> %shuffle.i
    476 }
    477 
    478 define <4 x float> @test_vzip1q_f32(<4 x float> %a, <4 x float> %b) {
    479 ; CHECK-LABEL: test_vzip1q_f32:
    480 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    481 entry:
    482   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
    483   ret <4 x float> %shuffle.i
    484 }
    485 
    486 define <2 x double> @test_vzip1q_f64(<2 x double> %a, <2 x double> %b) {
    487 ; CHECK-LABEL: test_vzip1q_f64:
    488 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    489 entry:
    490   %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
    491   ret <2 x double> %shuffle.i
    492 }
    493 
    494 define <8 x i8> @test_vzip1_p8(<8 x i8> %a, <8 x i8> %b) {
    495 ; CHECK-LABEL: test_vzip1_p8:
    496 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    497 entry:
    498   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
    499   ret <8 x i8> %shuffle.i
    500 }
    501 
    502 define <16 x i8> @test_vzip1q_p8(<16 x i8> %a, <16 x i8> %b) {
    503 ; CHECK-LABEL: test_vzip1q_p8:
    504 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    505 entry:
    506   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
    507   ret <16 x i8> %shuffle.i
    508 }
    509 
    510 define <4 x i16> @test_vzip1_p16(<4 x i16> %a, <4 x i16> %b) {
    511 ; CHECK-LABEL: test_vzip1_p16:
    512 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    513 entry:
    514   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
    515   ret <4 x i16> %shuffle.i
    516 }
    517 
    518 define <8 x i16> @test_vzip1q_p16(<8 x i16> %a, <8 x i16> %b) {
    519 ; CHECK-LABEL: test_vzip1q_p16:
    520 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    521 entry:
    522   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
    523   ret <8 x i16> %shuffle.i
    524 }
    525 
    526 define <8 x i8> @test_vzip2_s8(<8 x i8> %a, <8 x i8> %b) {
    527 ; CHECK-LABEL: test_vzip2_s8:
    528 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    529 entry:
    530   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
    531   ret <8 x i8> %shuffle.i
    532 }
    533 
    534 define <16 x i8> @test_vzip2q_s8(<16 x i8> %a, <16 x i8> %b) {
    535 ; CHECK-LABEL: test_vzip2q_s8:
    536 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    537 entry:
    538   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
    539   ret <16 x i8> %shuffle.i
    540 }
    541 
    542 define <4 x i16> @test_vzip2_s16(<4 x i16> %a, <4 x i16> %b) {
    543 ; CHECK-LABEL: test_vzip2_s16:
    544 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    545 entry:
    546   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
    547   ret <4 x i16> %shuffle.i
    548 }
    549 
    550 define <8 x i16> @test_vzip2q_s16(<8 x i16> %a, <8 x i16> %b) {
    551 ; CHECK-LABEL: test_vzip2q_s16:
    552 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    553 entry:
    554   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
    555   ret <8 x i16> %shuffle.i
    556 }
    557 
    558 define <2 x i32> @test_vzip2_s32(<2 x i32> %a, <2 x i32> %b) {
    559 ; CHECK-LABEL: test_vzip2_s32:
    560 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    561 entry:
    562   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
    563   ret <2 x i32> %shuffle.i
    564 }
    565 
    566 define <4 x i32> @test_vzip2q_s32(<4 x i32> %a, <4 x i32> %b) {
    567 ; CHECK-LABEL: test_vzip2q_s32:
    568 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    569 entry:
    570   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
    571   ret <4 x i32> %shuffle.i
    572 }
    573 
    574 define <2 x i64> @test_vzip2q_s64(<2 x i64> %a, <2 x i64> %b) {
    575 ; CHECK-LABEL: test_vzip2q_s64:
    576 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    577 entry:
    578   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
    579   ret <2 x i64> %shuffle.i
    580 }
    581 
    582 define <8 x i8> @test_vzip2_u8(<8 x i8> %a, <8 x i8> %b) {
    583 ; CHECK-LABEL: test_vzip2_u8:
    584 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    585 entry:
    586   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
    587   ret <8 x i8> %shuffle.i
    588 }
    589 
    590 define <16 x i8> @test_vzip2q_u8(<16 x i8> %a, <16 x i8> %b) {
    591 ; CHECK-LABEL: test_vzip2q_u8:
    592 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    593 entry:
    594   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
    595   ret <16 x i8> %shuffle.i
    596 }
    597 
    598 define <4 x i16> @test_vzip2_u16(<4 x i16> %a, <4 x i16> %b) {
    599 ; CHECK-LABEL: test_vzip2_u16:
    600 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    601 entry:
    602   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
    603   ret <4 x i16> %shuffle.i
    604 }
    605 
    606 define <8 x i16> @test_vzip2q_u16(<8 x i16> %a, <8 x i16> %b) {
    607 ; CHECK-LABEL: test_vzip2q_u16:
    608 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    609 entry:
    610   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
    611   ret <8 x i16> %shuffle.i
    612 }
    613 
    614 define <2 x i32> @test_vzip2_u32(<2 x i32> %a, <2 x i32> %b) {
    615 ; CHECK-LABEL: test_vzip2_u32:
    616 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    617 entry:
    618   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
    619   ret <2 x i32> %shuffle.i
    620 }
    621 
    622 define <4 x i32> @test_vzip2q_u32(<4 x i32> %a, <4 x i32> %b) {
    623 ; CHECK-LABEL: test_vzip2q_u32:
    624 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    625 entry:
    626   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
    627   ret <4 x i32> %shuffle.i
    628 }
    629 
    630 define <2 x i64> @test_vzip2q_u64(<2 x i64> %a, <2 x i64> %b) {
    631 ; CHECK-LABEL: test_vzip2q_u64:
    632 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    633 entry:
    634   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
    635   ret <2 x i64> %shuffle.i
    636 }
    637 
    638 define <2 x float> @test_vzip2_f32(<2 x float> %a, <2 x float> %b) {
    639 ; CHECK-LABEL: test_vzip2_f32:
    640 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    641 entry:
    642   %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
    643   ret <2 x float> %shuffle.i
    644 }
    645 
    646 define <4 x float> @test_vzip2q_f32(<4 x float> %a, <4 x float> %b) {
    647 ; CHECK-LABEL: test_vzip2q_f32:
    648 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    649 entry:
    650   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
    651   ret <4 x float> %shuffle.i
    652 }
    653 
    654 define <2 x double> @test_vzip2q_f64(<2 x double> %a, <2 x double> %b) {
    655 ; CHECK-LABEL: test_vzip2q_f64:
    656 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    657 entry:
    658   %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
    659   ret <2 x double> %shuffle.i
    660 }
    661 
    662 define <8 x i8> @test_vzip2_p8(<8 x i8> %a, <8 x i8> %b) {
    663 ; CHECK-LABEL: test_vzip2_p8:
    664 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    665 entry:
    666   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
    667   ret <8 x i8> %shuffle.i
    668 }
    669 
    670 define <16 x i8> @test_vzip2q_p8(<16 x i8> %a, <16 x i8> %b) {
    671 ; CHECK-LABEL: test_vzip2q_p8:
    672 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    673 entry:
    674   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
    675   ret <16 x i8> %shuffle.i
    676 }
    677 
    678 define <4 x i16> @test_vzip2_p16(<4 x i16> %a, <4 x i16> %b) {
    679 ; CHECK-LABEL: test_vzip2_p16:
    680 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    681 entry:
    682   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
    683   ret <4 x i16> %shuffle.i
    684 }
    685 
    686 define <8 x i16> @test_vzip2q_p16(<8 x i16> %a, <8 x i16> %b) {
    687 ; CHECK-LABEL: test_vzip2q_p16:
    688 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    689 entry:
    690   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
    691   ret <8 x i16> %shuffle.i
    692 }
    693 
    694 define <8 x i8> @test_vtrn1_s8(<8 x i8> %a, <8 x i8> %b) {
    695 ; CHECK-LABEL: test_vtrn1_s8:
    696 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    697 entry:
    698   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
    699   ret <8 x i8> %shuffle.i
    700 }
    701 
    702 define <16 x i8> @test_vtrn1q_s8(<16 x i8> %a, <16 x i8> %b) {
    703 ; CHECK-LABEL: test_vtrn1q_s8:
    704 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    705 entry:
    706   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
    707   ret <16 x i8> %shuffle.i
    708 }
    709 
    710 define <4 x i16> @test_vtrn1_s16(<4 x i16> %a, <4 x i16> %b) {
    711 ; CHECK-LABEL: test_vtrn1_s16:
    712 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    713 entry:
    714   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
    715   ret <4 x i16> %shuffle.i
    716 }
    717 
    718 define <8 x i16> @test_vtrn1q_s16(<8 x i16> %a, <8 x i16> %b) {
    719 ; CHECK-LABEL: test_vtrn1q_s16:
    720 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    721 entry:
    722   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
    723   ret <8 x i16> %shuffle.i
    724 }
    725 
    726 define <2 x i32> @test_vtrn1_s32(<2 x i32> %a, <2 x i32> %b) {
    727 ; CHECK-LABEL: test_vtrn1_s32:
    728 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    729 entry:
    730   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
    731   ret <2 x i32> %shuffle.i
    732 }
    733 
    734 define <4 x i32> @test_vtrn1q_s32(<4 x i32> %a, <4 x i32> %b) {
    735 ; CHECK-LABEL: test_vtrn1q_s32:
    736 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    737 entry:
    738   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
    739   ret <4 x i32> %shuffle.i
    740 }
    741 
    742 define <2 x i64> @test_vtrn1q_s64(<2 x i64> %a, <2 x i64> %b) {
    743 ; CHECK-LABEL: test_vtrn1q_s64:
    744 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    745 entry:
    746   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
    747   ret <2 x i64> %shuffle.i
    748 }
    749 
    750 define <8 x i8> @test_vtrn1_u8(<8 x i8> %a, <8 x i8> %b) {
    751 ; CHECK-LABEL: test_vtrn1_u8:
    752 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    753 entry:
    754   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
    755   ret <8 x i8> %shuffle.i
    756 }
    757 
    758 define <16 x i8> @test_vtrn1q_u8(<16 x i8> %a, <16 x i8> %b) {
    759 ; CHECK-LABEL: test_vtrn1q_u8:
    760 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    761 entry:
    762   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
    763   ret <16 x i8> %shuffle.i
    764 }
    765 
    766 define <4 x i16> @test_vtrn1_u16(<4 x i16> %a, <4 x i16> %b) {
    767 ; CHECK-LABEL: test_vtrn1_u16:
    768 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    769 entry:
    770   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
    771   ret <4 x i16> %shuffle.i
    772 }
    773 
    774 define <8 x i16> @test_vtrn1q_u16(<8 x i16> %a, <8 x i16> %b) {
    775 ; CHECK-LABEL: test_vtrn1q_u16:
    776 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    777 entry:
    778   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
    779   ret <8 x i16> %shuffle.i
    780 }
    781 
    782 define <2 x i32> @test_vtrn1_u32(<2 x i32> %a, <2 x i32> %b) {
    783 ; CHECK-LABEL: test_vtrn1_u32:
    784 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    785 entry:
    786   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
    787   ret <2 x i32> %shuffle.i
    788 }
    789 
    790 define <4 x i32> @test_vtrn1q_u32(<4 x i32> %a, <4 x i32> %b) {
    791 ; CHECK-LABEL: test_vtrn1q_u32:
    792 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    793 entry:
    794   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
    795   ret <4 x i32> %shuffle.i
    796 }
    797 
    798 define <2 x i64> @test_vtrn1q_u64(<2 x i64> %a, <2 x i64> %b) {
    799 ; CHECK-LABEL: test_vtrn1q_u64:
    800 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    801 entry:
    802   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2>
    803   ret <2 x i64> %shuffle.i
    804 }
    805 
    806 define <2 x float> @test_vtrn1_f32(<2 x float> %a, <2 x float> %b) {
    807 ; CHECK-LABEL: test_vtrn1_f32:
    808 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    809 entry:
    810   %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
    811   ret <2 x float> %shuffle.i
    812 }
    813 
    814 define <4 x float> @test_vtrn1q_f32(<4 x float> %a, <4 x float> %b) {
    815 ; CHECK-LABEL: test_vtrn1q_f32:
    816 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    817 entry:
    818   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
    819   ret <4 x float> %shuffle.i
    820 }
    821 
    822 define <2 x double> @test_vtrn1q_f64(<2 x double> %a, <2 x double> %b) {
    823 ; CHECK-LABEL: test_vtrn1q_f64:
    824 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    825 entry:
    826   %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2>
    827   ret <2 x double> %shuffle.i
    828 }
    829 
    830 define <8 x i8> @test_vtrn1_p8(<8 x i8> %a, <8 x i8> %b) {
    831 ; CHECK-LABEL: test_vtrn1_p8:
    832 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    833 entry:
    834   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
    835   ret <8 x i8> %shuffle.i
    836 }
    837 
    838 define <16 x i8> @test_vtrn1q_p8(<16 x i8> %a, <16 x i8> %b) {
    839 ; CHECK-LABEL: test_vtrn1q_p8:
    840 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    841 entry:
    842   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
    843   ret <16 x i8> %shuffle.i
    844 }
    845 
    846 define <4 x i16> @test_vtrn1_p16(<4 x i16> %a, <4 x i16> %b) {
    847 ; CHECK-LABEL: test_vtrn1_p16:
    848 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    849 entry:
    850   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
    851   ret <4 x i16> %shuffle.i
    852 }
    853 
    854 define <8 x i16> @test_vtrn1q_p16(<8 x i16> %a, <8 x i16> %b) {
    855 ; CHECK-LABEL: test_vtrn1q_p16:
    856 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    857 entry:
    858   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
    859   ret <8 x i16> %shuffle.i
    860 }
    861 
    862 define <8 x i8> @test_vtrn2_s8(<8 x i8> %a, <8 x i8> %b) {
    863 ; CHECK-LABEL: test_vtrn2_s8:
    864 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    865 entry:
    866   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
    867   ret <8 x i8> %shuffle.i
    868 }
    869 
    870 define <16 x i8> @test_vtrn2q_s8(<16 x i8> %a, <16 x i8> %b) {
    871 ; CHECK-LABEL: test_vtrn2q_s8:
    872 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    873 entry:
    874   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
    875   ret <16 x i8> %shuffle.i
    876 }
    877 
    878 define <4 x i16> @test_vtrn2_s16(<4 x i16> %a, <4 x i16> %b) {
    879 ; CHECK-LABEL: test_vtrn2_s16:
    880 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    881 entry:
    882   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
    883   ret <4 x i16> %shuffle.i
    884 }
    885 
    886 define <8 x i16> @test_vtrn2q_s16(<8 x i16> %a, <8 x i16> %b) {
    887 ; CHECK-LABEL: test_vtrn2q_s16:
    888 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    889 entry:
    890   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
    891   ret <8 x i16> %shuffle.i
    892 }
    893 
    894 define <2 x i32> @test_vtrn2_s32(<2 x i32> %a, <2 x i32> %b) {
    895 ; CHECK-LABEL: test_vtrn2_s32:
    896 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    897 entry:
    898   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
    899   ret <2 x i32> %shuffle.i
    900 }
    901 
    902 define <4 x i32> @test_vtrn2q_s32(<4 x i32> %a, <4 x i32> %b) {
    903 ; CHECK-LABEL: test_vtrn2q_s32:
    904 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    905 entry:
    906   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
    907   ret <4 x i32> %shuffle.i
    908 }
    909 
    910 define <2 x i64> @test_vtrn2q_s64(<2 x i64> %a, <2 x i64> %b) {
    911 ; CHECK-LABEL: test_vtrn2q_s64:
    912 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    913 entry:
    914   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
    915   ret <2 x i64> %shuffle.i
    916 }
    917 
    918 define <8 x i8> @test_vtrn2_u8(<8 x i8> %a, <8 x i8> %b) {
    919 ; CHECK-LABEL: test_vtrn2_u8:
    920 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
    921 entry:
    922   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
    923   ret <8 x i8> %shuffle.i
    924 }
    925 
    926 define <16 x i8> @test_vtrn2q_u8(<16 x i8> %a, <16 x i8> %b) {
    927 ; CHECK-LABEL: test_vtrn2q_u8:
    928 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
    929 entry:
    930   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
    931   ret <16 x i8> %shuffle.i
    932 }
    933 
    934 define <4 x i16> @test_vtrn2_u16(<4 x i16> %a, <4 x i16> %b) {
    935 ; CHECK-LABEL: test_vtrn2_u16:
    936 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
    937 entry:
    938   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
    939   ret <4 x i16> %shuffle.i
    940 }
    941 
    942 define <8 x i16> @test_vtrn2q_u16(<8 x i16> %a, <8 x i16> %b) {
    943 ; CHECK-LABEL: test_vtrn2q_u16:
    944 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
    945 entry:
    946   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
    947   ret <8 x i16> %shuffle.i
    948 }
    949 
    950 define <2 x i32> @test_vtrn2_u32(<2 x i32> %a, <2 x i32> %b) {
    951 ; CHECK-LABEL: test_vtrn2_u32:
    952 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    953 entry:
    954   %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
    955   ret <2 x i32> %shuffle.i
    956 }
    957 
    958 define <4 x i32> @test_vtrn2q_u32(<4 x i32> %a, <4 x i32> %b) {
    959 ; CHECK-LABEL: test_vtrn2q_u32:
    960 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    961 entry:
    962   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
    963   ret <4 x i32> %shuffle.i
    964 }
    965 
    966 define <2 x i64> @test_vtrn2q_u64(<2 x i64> %a, <2 x i64> %b) {
    967 ; CHECK-LABEL: test_vtrn2q_u64:
    968 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    969 entry:
    970   %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3>
    971   ret <2 x i64> %shuffle.i
    972 }
    973 
    974 define <2 x float> @test_vtrn2_f32(<2 x float> %a, <2 x float> %b) {
    975 ; CHECK-LABEL: test_vtrn2_f32:
    976 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
    977 entry:
    978   %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
    979   ret <2 x float> %shuffle.i
    980 }
    981 
    982 define <4 x float> @test_vtrn2q_f32(<4 x float> %a, <4 x float> %b) {
    983 ; CHECK-LABEL: test_vtrn2q_f32:
    984 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
    985 entry:
    986   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
    987   ret <4 x float> %shuffle.i
    988 }
    989 
    990 define <2 x double> @test_vtrn2q_f64(<2 x double> %a, <2 x double> %b) {
    991 ; CHECK-LABEL: test_vtrn2q_f64:
    992 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
    993 entry:
    994   %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3>
    995   ret <2 x double> %shuffle.i
    996 }
    997 
    998 define <8 x i8> @test_vtrn2_p8(<8 x i8> %a, <8 x i8> %b) {
    999 ; CHECK-LABEL: test_vtrn2_p8:
   1000 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1001 entry:
   1002   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   1003   ret <8 x i8> %shuffle.i
   1004 }
   1005 
   1006 define <16 x i8> @test_vtrn2q_p8(<16 x i8> %a, <16 x i8> %b) {
   1007 ; CHECK-LABEL: test_vtrn2q_p8:
   1008 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1009 entry:
   1010   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   1011   ret <16 x i8> %shuffle.i
   1012 }
   1013 
   1014 define <4 x i16> @test_vtrn2_p16(<4 x i16> %a, <4 x i16> %b) {
   1015 ; CHECK-LABEL: test_vtrn2_p16:
   1016 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1017 entry:
   1018   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   1019   ret <4 x i16> %shuffle.i
   1020 }
   1021 
   1022 define <8 x i16> @test_vtrn2q_p16(<8 x i16> %a, <8 x i16> %b) {
   1023 ; CHECK-LABEL: test_vtrn2q_p16:
   1024 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1025 entry:
   1026   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   1027   ret <8 x i16> %shuffle.i
   1028 }
   1029 
   1030 define <8 x i8> @test_same_vuzp1_s8(<8 x i8> %a) {
   1031 ; CHECK-LABEL: test_same_vuzp1_s8:
   1032 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1033 entry:
   1034   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1035   ret <8 x i8> %shuffle.i
   1036 }
   1037 
   1038 define <16 x i8> @test_same_vuzp1q_s8(<16 x i8> %a) {
   1039 ; CHECK-LABEL: test_same_vuzp1q_s8:
   1040 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1041 entry:
   1042   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   1043   ret <16 x i8> %shuffle.i
   1044 }
   1045 
   1046 define <4 x i16> @test_same_vuzp1_s16(<4 x i16> %a) {
   1047 ; CHECK-LABEL: test_same_vuzp1_s16:
   1048 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1049 entry:
   1050   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1051   ret <4 x i16> %shuffle.i
   1052 }
   1053 
   1054 define <8 x i16> @test_same_vuzp1q_s16(<8 x i16> %a) {
   1055 ; CHECK-LABEL: test_same_vuzp1q_s16:
   1056 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1057 entry:
   1058   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1059   ret <8 x i16> %shuffle.i
   1060 }
   1061 
   1062 define <4 x i32> @test_same_vuzp1q_s32(<4 x i32> %a) {
   1063 ; CHECK-LABEL: test_same_vuzp1q_s32:
   1064 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1065 entry:
   1066   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1067   ret <4 x i32> %shuffle.i
   1068 }
   1069 
   1070 define <8 x i8> @test_same_vuzp1_u8(<8 x i8> %a) {
   1071 ; CHECK-LABEL: test_same_vuzp1_u8:
   1072 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1073 entry:
   1074   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1075   ret <8 x i8> %shuffle.i
   1076 }
   1077 
   1078 define <16 x i8> @test_same_vuzp1q_u8(<16 x i8> %a) {
   1079 ; CHECK-LABEL: test_same_vuzp1q_u8:
   1080 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1081 entry:
   1082   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   1083   ret <16 x i8> %shuffle.i
   1084 }
   1085 
   1086 define <4 x i16> @test_same_vuzp1_u16(<4 x i16> %a) {
   1087 ; CHECK-LABEL: test_same_vuzp1_u16:
   1088 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1089 entry:
   1090   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1091   ret <4 x i16> %shuffle.i
   1092 }
   1093 
   1094 define <8 x i16> @test_same_vuzp1q_u16(<8 x i16> %a) {
   1095 ; CHECK-LABEL: test_same_vuzp1q_u16:
   1096 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1097 entry:
   1098   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1099   ret <8 x i16> %shuffle.i
   1100 }
   1101 
   1102 define <4 x i32> @test_same_vuzp1q_u32(<4 x i32> %a) {
   1103 ; CHECK-LABEL: test_same_vuzp1q_u32:
   1104 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1105 entry:
   1106   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1107   ret <4 x i32> %shuffle.i
   1108 }
   1109 
   1110 define <4 x float> @test_same_vuzp1q_f32(<4 x float> %a) {
   1111 ; CHECK-LABEL: test_same_vuzp1q_f32:
   1112 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1113 entry:
   1114   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1115   ret <4 x float> %shuffle.i
   1116 }
   1117 
   1118 define <8 x i8> @test_same_vuzp1_p8(<8 x i8> %a) {
   1119 ; CHECK-LABEL: test_same_vuzp1_p8:
   1120 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1121 entry:
   1122   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1123   ret <8 x i8> %shuffle.i
   1124 }
   1125 
   1126 define <16 x i8> @test_same_vuzp1q_p8(<16 x i8> %a) {
   1127 ; CHECK-LABEL: test_same_vuzp1q_p8:
   1128 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1129 entry:
   1130   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   1131   ret <16 x i8> %shuffle.i
   1132 }
   1133 
   1134 define <4 x i16> @test_same_vuzp1_p16(<4 x i16> %a) {
   1135 ; CHECK-LABEL: test_same_vuzp1_p16:
   1136 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1137 entry:
   1138   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1139   ret <4 x i16> %shuffle.i
   1140 }
   1141 
   1142 define <8 x i16> @test_same_vuzp1q_p16(<8 x i16> %a) {
   1143 ; CHECK-LABEL: test_same_vuzp1q_p16:
   1144 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1145 entry:
   1146   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1147   ret <8 x i16> %shuffle.i
   1148 }
   1149 
   1150 define <8 x i8> @test_same_vuzp2_s8(<8 x i8> %a) {
   1151 ; CHECK-LABEL: test_same_vuzp2_s8:
   1152 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1153 entry:
   1154   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1155   ret <8 x i8> %shuffle.i
   1156 }
   1157 
   1158 define <16 x i8> @test_same_vuzp2q_s8(<16 x i8> %a) {
   1159 ; CHECK-LABEL: test_same_vuzp2q_s8:
   1160 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1161 entry:
   1162   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   1163   ret <16 x i8> %shuffle.i
   1164 }
   1165 
   1166 define <4 x i16> @test_same_vuzp2_s16(<4 x i16> %a) {
   1167 ; CHECK-LABEL: test_same_vuzp2_s16:
   1168 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1169 entry:
   1170   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1171   ret <4 x i16> %shuffle.i
   1172 }
   1173 
   1174 define <8 x i16> @test_same_vuzp2q_s16(<8 x i16> %a) {
   1175 ; CHECK-LABEL: test_same_vuzp2q_s16:
   1176 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1177 entry:
   1178   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1179   ret <8 x i16> %shuffle.i
   1180 }
   1181 
   1182 define <4 x i32> @test_same_vuzp2q_s32(<4 x i32> %a) {
   1183 ; CHECK-LABEL: test_same_vuzp2q_s32:
   1184 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1185 entry:
   1186   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1187   ret <4 x i32> %shuffle.i
   1188 }
   1189 
   1190 define <8 x i8> @test_same_vuzp2_u8(<8 x i8> %a) {
   1191 ; CHECK-LABEL: test_same_vuzp2_u8:
   1192 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1193 entry:
   1194   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1195   ret <8 x i8> %shuffle.i
   1196 }
   1197 
   1198 define <16 x i8> @test_same_vuzp2q_u8(<16 x i8> %a) {
   1199 ; CHECK-LABEL: test_same_vuzp2q_u8:
   1200 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1201 entry:
   1202   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   1203   ret <16 x i8> %shuffle.i
   1204 }
   1205 
   1206 define <4 x i16> @test_same_vuzp2_u16(<4 x i16> %a) {
   1207 ; CHECK-LABEL: test_same_vuzp2_u16:
   1208 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1209 entry:
   1210   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1211   ret <4 x i16> %shuffle.i
   1212 }
   1213 
   1214 define <8 x i16> @test_same_vuzp2q_u16(<8 x i16> %a) {
   1215 ; CHECK-LABEL: test_same_vuzp2q_u16:
   1216 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1217 entry:
   1218   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1219   ret <8 x i16> %shuffle.i
   1220 }
   1221 
   1222 define <4 x i32> @test_same_vuzp2q_u32(<4 x i32> %a) {
   1223 ; CHECK-LABEL: test_same_vuzp2q_u32:
   1224 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1225 entry:
   1226   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1227   ret <4 x i32> %shuffle.i
   1228 }
   1229 
   1230 define <4 x float> @test_same_vuzp2q_f32(<4 x float> %a) {
   1231 ; CHECK-LABEL: test_same_vuzp2q_f32:
   1232 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1233 entry:
   1234   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1235   ret <4 x float> %shuffle.i
   1236 }
   1237 
   1238 define <8 x i8> @test_same_vuzp2_p8(<8 x i8> %a) {
   1239 ; CHECK-LABEL: test_same_vuzp2_p8:
   1240 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1241 entry:
   1242   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1243   ret <8 x i8> %shuffle.i
   1244 }
   1245 
   1246 define <16 x i8> @test_same_vuzp2q_p8(<16 x i8> %a) {
   1247 ; CHECK-LABEL: test_same_vuzp2q_p8:
   1248 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1249 entry:
   1250   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   1251   ret <16 x i8> %shuffle.i
   1252 }
   1253 
   1254 define <4 x i16> @test_same_vuzp2_p16(<4 x i16> %a) {
   1255 ; CHECK-LABEL: test_same_vuzp2_p16:
   1256 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1257 entry:
   1258   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1259   ret <4 x i16> %shuffle.i
   1260 }
   1261 
   1262 define <8 x i16> @test_same_vuzp2q_p16(<8 x i16> %a) {
   1263 ; CHECK-LABEL: test_same_vuzp2q_p16:
   1264 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1265 entry:
   1266   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1267   ret <8 x i16> %shuffle.i
   1268 }
   1269 
   1270 define <8 x i8> @test_same_vzip1_s8(<8 x i8> %a) {
   1271 ; CHECK-LABEL: test_same_vzip1_s8:
   1272 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1273 entry:
   1274   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   1275   ret <8 x i8> %shuffle.i
   1276 }
   1277 
   1278 define <16 x i8> @test_same_vzip1q_s8(<16 x i8> %a) {
   1279 ; CHECK-LABEL: test_same_vzip1q_s8:
   1280 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1281 entry:
   1282   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   1283   ret <16 x i8> %shuffle.i
   1284 }
   1285 
   1286 define <4 x i16> @test_same_vzip1_s16(<4 x i16> %a) {
   1287 ; CHECK-LABEL: test_same_vzip1_s16:
   1288 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1289 entry:
   1290   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   1291   ret <4 x i16> %shuffle.i
   1292 }
   1293 
   1294 define <8 x i16> @test_same_vzip1q_s16(<8 x i16> %a) {
   1295 ; CHECK-LABEL: test_same_vzip1q_s16:
   1296 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1297 entry:
   1298   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   1299   ret <8 x i16> %shuffle.i
   1300 }
   1301 
   1302 define <4 x i32> @test_same_vzip1q_s32(<4 x i32> %a) {
   1303 ; CHECK-LABEL: test_same_vzip1q_s32:
   1304 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1305 entry:
   1306   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   1307   ret <4 x i32> %shuffle.i
   1308 }
   1309 
   1310 define <8 x i8> @test_same_vzip1_u8(<8 x i8> %a) {
   1311 ; CHECK-LABEL: test_same_vzip1_u8:
   1312 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1313 entry:
   1314   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   1315   ret <8 x i8> %shuffle.i
   1316 }
   1317 
   1318 define <16 x i8> @test_same_vzip1q_u8(<16 x i8> %a) {
   1319 ; CHECK-LABEL: test_same_vzip1q_u8:
   1320 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1321 entry:
   1322   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   1323   ret <16 x i8> %shuffle.i
   1324 }
   1325 
   1326 define <4 x i16> @test_same_vzip1_u16(<4 x i16> %a) {
   1327 ; CHECK-LABEL: test_same_vzip1_u16:
   1328 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1329 entry:
   1330   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   1331   ret <4 x i16> %shuffle.i
   1332 }
   1333 
   1334 define <8 x i16> @test_same_vzip1q_u16(<8 x i16> %a) {
   1335 ; CHECK-LABEL: test_same_vzip1q_u16:
   1336 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1337 entry:
   1338   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   1339   ret <8 x i16> %shuffle.i
   1340 }
   1341 
   1342 define <4 x i32> @test_same_vzip1q_u32(<4 x i32> %a) {
   1343 ; CHECK-LABEL: test_same_vzip1q_u32:
   1344 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1345 entry:
   1346   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   1347   ret <4 x i32> %shuffle.i
   1348 }
   1349 
   1350 define <4 x float> @test_same_vzip1q_f32(<4 x float> %a) {
   1351 ; CHECK-LABEL: test_same_vzip1q_f32:
   1352 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1353 entry:
   1354   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   1355   ret <4 x float> %shuffle.i
   1356 }
   1357 
   1358 define <8 x i8> @test_same_vzip1_p8(<8 x i8> %a) {
   1359 ; CHECK-LABEL: test_same_vzip1_p8:
   1360 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1361 entry:
   1362   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   1363   ret <8 x i8> %shuffle.i
   1364 }
   1365 
   1366 define <16 x i8> @test_same_vzip1q_p8(<16 x i8> %a) {
   1367 ; CHECK-LABEL: test_same_vzip1q_p8:
   1368 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1369 entry:
   1370   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   1371   ret <16 x i8> %shuffle.i
   1372 }
   1373 
   1374 define <4 x i16> @test_same_vzip1_p16(<4 x i16> %a) {
   1375 ; CHECK-LABEL: test_same_vzip1_p16:
   1376 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1377 entry:
   1378   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   1379   ret <4 x i16> %shuffle.i
   1380 }
   1381 
   1382 define <8 x i16> @test_same_vzip1q_p16(<8 x i16> %a) {
   1383 ; CHECK-LABEL: test_same_vzip1q_p16:
   1384 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1385 entry:
   1386   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   1387   ret <8 x i16> %shuffle.i
   1388 }
   1389 
   1390 define <4 x i8> @test_vzip1_v4i8(<8 x i8> %p) {
   1391 ; CHECK-LABEL: test_vzip1_v4i8:
   1392 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1393  %lo = shufflevector <8 x i8> %p, <8 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
   1394  ret <4 x i8> %lo
   1395 }
   1396 
   1397 define <8 x i8> @test_same_vzip2_s8(<8 x i8> %a) {
   1398 ; CHECK-LABEL: test_same_vzip2_s8:
   1399 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1400 entry:
   1401   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   1402   ret <8 x i8> %shuffle.i
   1403 }
   1404 
   1405 define <16 x i8> @test_same_vzip2q_s8(<16 x i8> %a) {
   1406 ; CHECK-LABEL: test_same_vzip2q_s8:
   1407 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1408 entry:
   1409   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   1410   ret <16 x i8> %shuffle.i
   1411 }
   1412 
   1413 define <4 x i16> @test_same_vzip2_s16(<4 x i16> %a) {
   1414 ; CHECK-LABEL: test_same_vzip2_s16:
   1415 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1416 entry:
   1417   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   1418   ret <4 x i16> %shuffle.i
   1419 }
   1420 
   1421 define <8 x i16> @test_same_vzip2q_s16(<8 x i16> %a) {
   1422 ; CHECK-LABEL: test_same_vzip2q_s16:
   1423 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1424 entry:
   1425   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   1426   ret <8 x i16> %shuffle.i
   1427 }
   1428 
   1429 define <4 x i32> @test_same_vzip2q_s32(<4 x i32> %a) {
   1430 ; CHECK-LABEL: test_same_vzip2q_s32:
   1431 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1432 entry:
   1433   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   1434   ret <4 x i32> %shuffle.i
   1435 }
   1436 
   1437 define <8 x i8> @test_same_vzip2_u8(<8 x i8> %a) {
   1438 ; CHECK-LABEL: test_same_vzip2_u8:
   1439 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1440 entry:
   1441   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   1442   ret <8 x i8> %shuffle.i
   1443 }
   1444 
   1445 define <16 x i8> @test_same_vzip2q_u8(<16 x i8> %a) {
   1446 ; CHECK-LABEL: test_same_vzip2q_u8:
   1447 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1448 entry:
   1449   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   1450   ret <16 x i8> %shuffle.i
   1451 }
   1452 
   1453 define <4 x i16> @test_same_vzip2_u16(<4 x i16> %a) {
   1454 ; CHECK-LABEL: test_same_vzip2_u16:
   1455 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1456 entry:
   1457   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   1458   ret <4 x i16> %shuffle.i
   1459 }
   1460 
   1461 define <8 x i16> @test_same_vzip2q_u16(<8 x i16> %a) {
   1462 ; CHECK-LABEL: test_same_vzip2q_u16:
   1463 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1464 entry:
   1465   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   1466   ret <8 x i16> %shuffle.i
   1467 }
   1468 
   1469 define <4 x i32> @test_same_vzip2q_u32(<4 x i32> %a) {
   1470 ; CHECK-LABEL: test_same_vzip2q_u32:
   1471 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1472 entry:
   1473   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   1474   ret <4 x i32> %shuffle.i
   1475 }
   1476 
   1477 define <4 x float> @test_same_vzip2q_f32(<4 x float> %a) {
   1478 ; CHECK-LABEL: test_same_vzip2q_f32:
   1479 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1480 entry:
   1481   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   1482   ret <4 x float> %shuffle.i
   1483 }
   1484 
   1485 define <8 x i8> @test_same_vzip2_p8(<8 x i8> %a) {
   1486 ; CHECK-LABEL: test_same_vzip2_p8:
   1487 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1488 entry:
   1489   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   1490   ret <8 x i8> %shuffle.i
   1491 }
   1492 
   1493 define <16 x i8> @test_same_vzip2q_p8(<16 x i8> %a) {
   1494 ; CHECK-LABEL: test_same_vzip2q_p8:
   1495 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1496 entry:
   1497   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   1498   ret <16 x i8> %shuffle.i
   1499 }
   1500 
   1501 define <4 x i16> @test_same_vzip2_p16(<4 x i16> %a) {
   1502 ; CHECK-LABEL: test_same_vzip2_p16:
   1503 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1504 entry:
   1505   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   1506   ret <4 x i16> %shuffle.i
   1507 }
   1508 
   1509 define <8 x i16> @test_same_vzip2q_p16(<8 x i16> %a) {
   1510 ; CHECK-LABEL: test_same_vzip2q_p16:
   1511 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1512 entry:
   1513   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   1514   ret <8 x i16> %shuffle.i
   1515 }
   1516 
   1517 define <8 x i8> @test_same_vtrn1_s8(<8 x i8> %a) {
   1518 ; CHECK-LABEL: test_same_vtrn1_s8:
   1519 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1520 entry:
   1521   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   1522   ret <8 x i8> %shuffle.i
   1523 }
   1524 
   1525 define <16 x i8> @test_same_vtrn1q_s8(<16 x i8> %a) {
   1526 ; CHECK-LABEL: test_same_vtrn1q_s8:
   1527 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1528 entry:
   1529   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   1530   ret <16 x i8> %shuffle.i
   1531 }
   1532 
   1533 define <4 x i16> @test_same_vtrn1_s16(<4 x i16> %a) {
   1534 ; CHECK-LABEL: test_same_vtrn1_s16:
   1535 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1536 entry:
   1537   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   1538   ret <4 x i16> %shuffle.i
   1539 }
   1540 
   1541 define <8 x i16> @test_same_vtrn1q_s16(<8 x i16> %a) {
   1542 ; CHECK-LABEL: test_same_vtrn1q_s16:
   1543 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1544 entry:
   1545   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   1546   ret <8 x i16> %shuffle.i
   1547 }
   1548 
   1549 define <4 x i32> @test_same_vtrn1q_s32(<4 x i32> %a) {
   1550 ; CHECK-LABEL: test_same_vtrn1q_s32:
   1551 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1552 entry:
   1553   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   1554   ret <4 x i32> %shuffle.i
   1555 }
   1556 
   1557 define <8 x i8> @test_same_vtrn1_u8(<8 x i8> %a) {
   1558 ; CHECK-LABEL: test_same_vtrn1_u8:
   1559 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1560 entry:
   1561   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   1562   ret <8 x i8> %shuffle.i
   1563 }
   1564 
   1565 define <16 x i8> @test_same_vtrn1q_u8(<16 x i8> %a) {
   1566 ; CHECK-LABEL: test_same_vtrn1q_u8:
   1567 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1568 entry:
   1569   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   1570   ret <16 x i8> %shuffle.i
   1571 }
   1572 
   1573 define <4 x i16> @test_same_vtrn1_u16(<4 x i16> %a) {
   1574 ; CHECK-LABEL: test_same_vtrn1_u16:
   1575 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1576 entry:
   1577   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   1578   ret <4 x i16> %shuffle.i
   1579 }
   1580 
   1581 define <8 x i16> @test_same_vtrn1q_u16(<8 x i16> %a) {
   1582 ; CHECK-LABEL: test_same_vtrn1q_u16:
   1583 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1584 entry:
   1585   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   1586   ret <8 x i16> %shuffle.i
   1587 }
   1588 
   1589 define <4 x i32> @test_same_vtrn1q_u32(<4 x i32> %a) {
   1590 ; CHECK-LABEL: test_same_vtrn1q_u32:
   1591 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1592 entry:
   1593   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   1594   ret <4 x i32> %shuffle.i
   1595 }
   1596 
   1597 define <4 x float> @test_same_vtrn1q_f32(<4 x float> %a) {
   1598 ; CHECK-LABEL: test_same_vtrn1q_f32:
   1599 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1600 entry:
   1601   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   1602   ret <4 x float> %shuffle.i
   1603 }
   1604 
   1605 define <8 x i8> @test_same_vtrn1_p8(<8 x i8> %a) {
   1606 ; CHECK-LABEL: test_same_vtrn1_p8:
   1607 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1608 entry:
   1609   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   1610   ret <8 x i8> %shuffle.i
   1611 }
   1612 
   1613 define <16 x i8> @test_same_vtrn1q_p8(<16 x i8> %a) {
   1614 ; CHECK-LABEL: test_same_vtrn1q_p8:
   1615 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1616 entry:
   1617   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   1618   ret <16 x i8> %shuffle.i
   1619 }
   1620 
   1621 define <4 x i16> @test_same_vtrn1_p16(<4 x i16> %a) {
   1622 ; CHECK-LABEL: test_same_vtrn1_p16:
   1623 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1624 entry:
   1625   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   1626   ret <4 x i16> %shuffle.i
   1627 }
   1628 
   1629 define <8 x i16> @test_same_vtrn1q_p16(<8 x i16> %a) {
   1630 ; CHECK-LABEL: test_same_vtrn1q_p16:
   1631 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1632 entry:
   1633   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   1634   ret <8 x i16> %shuffle.i
   1635 }
   1636 
   1637 define <8 x i8> @test_same_vtrn2_s8(<8 x i8> %a) {
   1638 ; CHECK-LABEL: test_same_vtrn2_s8:
   1639 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1640 entry:
   1641   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   1642   ret <8 x i8> %shuffle.i
   1643 }
   1644 
   1645 define <16 x i8> @test_same_vtrn2q_s8(<16 x i8> %a) {
   1646 ; CHECK-LABEL: test_same_vtrn2q_s8:
   1647 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1648 entry:
   1649   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   1650   ret <16 x i8> %shuffle.i
   1651 }
   1652 
   1653 define <4 x i16> @test_same_vtrn2_s16(<4 x i16> %a) {
   1654 ; CHECK-LABEL: test_same_vtrn2_s16:
   1655 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1656 entry:
   1657   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   1658   ret <4 x i16> %shuffle.i
   1659 }
   1660 
   1661 define <8 x i16> @test_same_vtrn2q_s16(<8 x i16> %a) {
   1662 ; CHECK-LABEL: test_same_vtrn2q_s16:
   1663 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1664 entry:
   1665   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   1666   ret <8 x i16> %shuffle.i
   1667 }
   1668 
   1669 define <4 x i32> @test_same_vtrn2q_s32(<4 x i32> %a) {
   1670 ; CHECK-LABEL: test_same_vtrn2q_s32:
   1671 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1672 entry:
   1673   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   1674   ret <4 x i32> %shuffle.i
   1675 }
   1676 
   1677 define <8 x i8> @test_same_vtrn2_u8(<8 x i8> %a) {
   1678 ; CHECK-LABEL: test_same_vtrn2_u8:
   1679 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1680 entry:
   1681   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   1682   ret <8 x i8> %shuffle.i
   1683 }
   1684 
   1685 define <16 x i8> @test_same_vtrn2q_u8(<16 x i8> %a) {
   1686 ; CHECK-LABEL: test_same_vtrn2q_u8:
   1687 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1688 entry:
   1689   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   1690   ret <16 x i8> %shuffle.i
   1691 }
   1692 
   1693 define <4 x i16> @test_same_vtrn2_u16(<4 x i16> %a) {
   1694 ; CHECK-LABEL: test_same_vtrn2_u16:
   1695 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1696 entry:
   1697   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   1698   ret <4 x i16> %shuffle.i
   1699 }
   1700 
   1701 define <8 x i16> @test_same_vtrn2q_u16(<8 x i16> %a) {
   1702 ; CHECK-LABEL: test_same_vtrn2q_u16:
   1703 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1704 entry:
   1705   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   1706   ret <8 x i16> %shuffle.i
   1707 }
   1708 
   1709 define <4 x i32> @test_same_vtrn2q_u32(<4 x i32> %a) {
   1710 ; CHECK-LABEL: test_same_vtrn2q_u32:
   1711 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1712 entry:
   1713   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   1714   ret <4 x i32> %shuffle.i
   1715 }
   1716 
   1717 define <4 x float> @test_same_vtrn2q_f32(<4 x float> %a) {
   1718 ; CHECK-LABEL: test_same_vtrn2q_f32:
   1719 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1720 entry:
   1721   %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   1722   ret <4 x float> %shuffle.i
   1723 }
   1724 
   1725 define <8 x i8> @test_same_vtrn2_p8(<8 x i8> %a) {
   1726 ; CHECK-LABEL: test_same_vtrn2_p8:
   1727 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1728 entry:
   1729   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   1730   ret <8 x i8> %shuffle.i
   1731 }
   1732 
   1733 define <16 x i8> @test_same_vtrn2q_p8(<16 x i8> %a) {
   1734 ; CHECK-LABEL: test_same_vtrn2q_p8:
   1735 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1736 entry:
   1737   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   1738   ret <16 x i8> %shuffle.i
   1739 }
   1740 
   1741 define <4 x i16> @test_same_vtrn2_p16(<4 x i16> %a) {
   1742 ; CHECK-LABEL: test_same_vtrn2_p16:
   1743 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1744 entry:
   1745   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   1746   ret <4 x i16> %shuffle.i
   1747 }
   1748 
   1749 define <8 x i16> @test_same_vtrn2q_p16(<8 x i16> %a) {
   1750 ; CHECK-LABEL: test_same_vtrn2q_p16:
   1751 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1752 entry:
   1753   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   1754   ret <8 x i16> %shuffle.i
   1755 }
   1756 
   1757 
   1758 define <8 x i8> @test_undef_vuzp1_s8(<8 x i8> %a) {
   1759 ; CHECK-LABEL: test_undef_vuzp1_s8:
   1760 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1761 entry:
   1762   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1763   ret <8 x i8> %shuffle.i
   1764 }
   1765 
   1766 define <16 x i8> @test_undef_vuzp1q_s8(<16 x i8> %a) {
   1767 ; CHECK-LABEL: test_undef_vuzp1q_s8:
   1768 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1769 entry:
   1770   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   1771   ret <16 x i8> %shuffle.i
   1772 }
   1773 
   1774 define <4 x i16> @test_undef_vuzp1_s16(<4 x i16> %a) {
   1775 ; CHECK-LABEL: test_undef_vuzp1_s16:
   1776 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1777 entry:
   1778   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1779   ret <4 x i16> %shuffle.i
   1780 }
   1781 
   1782 define <8 x i16> @test_undef_vuzp1q_s16(<8 x i16> %a) {
   1783 ; CHECK-LABEL: test_undef_vuzp1q_s16:
   1784 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1785 entry:
   1786   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1787   ret <8 x i16> %shuffle.i
   1788 }
   1789 
   1790 define <4 x i32> @test_undef_vuzp1q_s32(<4 x i32> %a) {
   1791 ; CHECK-LABEL: test_undef_vuzp1q_s32:
   1792 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1793 entry:
   1794   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1795   ret <4 x i32> %shuffle.i
   1796 }
   1797 
   1798 define <8 x i8> @test_undef_vuzp1_u8(<8 x i8> %a) {
   1799 ; CHECK-LABEL: test_undef_vuzp1_u8:
   1800 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1801 entry:
   1802   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1803   ret <8 x i8> %shuffle.i
   1804 }
   1805 
   1806 define <16 x i8> @test_undef_vuzp1q_u8(<16 x i8> %a) {
   1807 ; CHECK-LABEL: test_undef_vuzp1q_u8:
   1808 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1809 entry:
   1810   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   1811   ret <16 x i8> %shuffle.i
   1812 }
   1813 
   1814 define <4 x i16> @test_undef_vuzp1_u16(<4 x i16> %a) {
   1815 ; CHECK-LABEL: test_undef_vuzp1_u16:
   1816 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1817 entry:
   1818   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1819   ret <4 x i16> %shuffle.i
   1820 }
   1821 
   1822 define <8 x i16> @test_undef_vuzp1q_u16(<8 x i16> %a) {
   1823 ; CHECK-LABEL: test_undef_vuzp1q_u16:
   1824 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1825 entry:
   1826   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1827   ret <8 x i16> %shuffle.i
   1828 }
   1829 
   1830 define <4 x i32> @test_undef_vuzp1q_u32(<4 x i32> %a) {
   1831 ; CHECK-LABEL: test_undef_vuzp1q_u32:
   1832 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1833 entry:
   1834   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1835   ret <4 x i32> %shuffle.i
   1836 }
   1837 
   1838 define <4 x float> @test_undef_vuzp1q_f32(<4 x float> %a) {
   1839 ; CHECK-LABEL: test_undef_vuzp1q_f32:
   1840 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1841 entry:
   1842   %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1843   ret <4 x float> %shuffle.i
   1844 }
   1845 
   1846 define <8 x i8> @test_undef_vuzp1_p8(<8 x i8> %a) {
   1847 ; CHECK-LABEL: test_undef_vuzp1_p8:
   1848 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1849 entry:
   1850   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1851   ret <8 x i8> %shuffle.i
   1852 }
   1853 
   1854 define <16 x i8> @test_undef_vuzp1q_p8(<16 x i8> %a) {
   1855 ; CHECK-LABEL: test_undef_vuzp1q_p8:
   1856 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1857 entry:
   1858   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   1859   ret <16 x i8> %shuffle.i
   1860 }
   1861 
   1862 define <4 x i16> @test_undef_vuzp1_p16(<4 x i16> %a) {
   1863 ; CHECK-LABEL: test_undef_vuzp1_p16:
   1864 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1865 entry:
   1866   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   1867   ret <4 x i16> %shuffle.i
   1868 }
   1869 
   1870 define <8 x i16> @test_undef_vuzp1q_p16(<8 x i16> %a) {
   1871 ; CHECK-LABEL: test_undef_vuzp1q_p16:
   1872 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1873 entry:
   1874   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   1875   ret <8 x i16> %shuffle.i
   1876 }
   1877 
   1878 define <8 x i8> @test_undef_vuzp2_s8(<8 x i8> %a) {
   1879 ; CHECK-LABEL: test_undef_vuzp2_s8:
   1880 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1881 entry:
   1882   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1883   ret <8 x i8> %shuffle.i
   1884 }
   1885 
   1886 define <16 x i8> @test_undef_vuzp2q_s8(<16 x i8> %a) {
   1887 ; CHECK-LABEL: test_undef_vuzp2q_s8:
   1888 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1889 entry:
   1890   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   1891   ret <16 x i8> %shuffle.i
   1892 }
   1893 
   1894 define <4 x i16> @test_undef_vuzp2_s16(<4 x i16> %a) {
   1895 ; CHECK-LABEL: test_undef_vuzp2_s16:
   1896 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1897 entry:
   1898   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1899   ret <4 x i16> %shuffle.i
   1900 }
   1901 
   1902 define <8 x i16> @test_undef_vuzp2q_s16(<8 x i16> %a) {
   1903 ; CHECK-LABEL: test_undef_vuzp2q_s16:
   1904 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1905 entry:
   1906   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1907   ret <8 x i16> %shuffle.i
   1908 }
   1909 
   1910 define <4 x i32> @test_undef_vuzp2q_s32(<4 x i32> %a) {
   1911 ; CHECK-LABEL: test_undef_vuzp2q_s32:
   1912 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1913 entry:
   1914   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1915   ret <4 x i32> %shuffle.i
   1916 }
   1917 
   1918 define <8 x i8> @test_undef_vuzp2_u8(<8 x i8> %a) {
   1919 ; CHECK-LABEL: test_undef_vuzp2_u8:
   1920 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1921 entry:
   1922   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1923   ret <8 x i8> %shuffle.i
   1924 }
   1925 
   1926 define <16 x i8> @test_undef_vuzp2q_u8(<16 x i8> %a) {
   1927 ; CHECK-LABEL: test_undef_vuzp2q_u8:
   1928 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1929 entry:
   1930   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   1931   ret <16 x i8> %shuffle.i
   1932 }
   1933 
   1934 define <4 x i16> @test_undef_vuzp2_u16(<4 x i16> %a) {
   1935 ; CHECK-LABEL: test_undef_vuzp2_u16:
   1936 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1937 entry:
   1938   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1939   ret <4 x i16> %shuffle.i
   1940 }
   1941 
   1942 define <8 x i16> @test_undef_vuzp2q_u16(<8 x i16> %a) {
   1943 ; CHECK-LABEL: test_undef_vuzp2q_u16:
   1944 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1945 entry:
   1946   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1947   ret <8 x i16> %shuffle.i
   1948 }
   1949 
   1950 define <4 x i32> @test_undef_vuzp2q_u32(<4 x i32> %a) {
   1951 ; CHECK-LABEL: test_undef_vuzp2q_u32:
   1952 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1953 entry:
   1954   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1955   ret <4 x i32> %shuffle.i
   1956 }
   1957 
   1958 define <4 x float> @test_undef_vuzp2q_f32(<4 x float> %a) {
   1959 ; CHECK-LABEL: test_undef_vuzp2q_f32:
   1960 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   1961 entry:
   1962   %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1963   ret <4 x float> %shuffle.i
   1964 }
   1965 
   1966 define <8 x i8> @test_undef_vuzp2_p8(<8 x i8> %a) {
   1967 ; CHECK-LABEL: test_undef_vuzp2_p8:
   1968 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   1969 entry:
   1970   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1971   ret <8 x i8> %shuffle.i
   1972 }
   1973 
   1974 define <16 x i8> @test_undef_vuzp2q_p8(<16 x i8> %a) {
   1975 ; CHECK-LABEL: test_undef_vuzp2q_p8:
   1976 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   1977 entry:
   1978   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   1979   ret <16 x i8> %shuffle.i
   1980 }
   1981 
   1982 define <4 x i16> @test_undef_vuzp2_p16(<4 x i16> %a) {
   1983 ; CHECK-LABEL: test_undef_vuzp2_p16:
   1984 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   1985 entry:
   1986   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   1987   ret <4 x i16> %shuffle.i
   1988 }
   1989 
   1990 define <8 x i16> @test_undef_vuzp2q_p16(<8 x i16> %a) {
   1991 ; CHECK-LABEL: test_undef_vuzp2q_p16:
   1992 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   1993 entry:
   1994   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   1995   ret <8 x i16> %shuffle.i
   1996 }
   1997 
   1998 define <8 x i8> @test_undef_vzip1_s8(<8 x i8> %a) {
   1999 ; CHECK-LABEL: test_undef_vzip1_s8:
   2000 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2001 entry:
   2002   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2003   ret <8 x i8> %shuffle.i
   2004 }
   2005 
   2006 define <16 x i8> @test_undef_vzip1q_s8(<16 x i8> %a) {
   2007 ; CHECK-LABEL: test_undef_vzip1q_s8:
   2008 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2009 entry:
   2010   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   2011   ret <16 x i8> %shuffle.i
   2012 }
   2013 
   2014 define <4 x i16> @test_undef_vzip1_s16(<4 x i16> %a) {
   2015 ; CHECK-LABEL: test_undef_vzip1_s16:
   2016 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2017 entry:
   2018   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2019   ret <4 x i16> %shuffle.i
   2020 }
   2021 
   2022 define <8 x i16> @test_undef_vzip1q_s16(<8 x i16> %a) {
   2023 ; CHECK-LABEL: test_undef_vzip1q_s16:
   2024 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2025 entry:
   2026   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2027   ret <8 x i16> %shuffle.i
   2028 }
   2029 
   2030 define <4 x i32> @test_undef_vzip1q_s32(<4 x i32> %a) {
   2031 ; CHECK-LABEL: test_undef_vzip1q_s32:
   2032 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2033 entry:
   2034   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2035   ret <4 x i32> %shuffle.i
   2036 }
   2037 
   2038 define <8 x i8> @test_undef_vzip1_u8(<8 x i8> %a) {
   2039 ; CHECK-LABEL: test_undef_vzip1_u8:
   2040 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2041 entry:
   2042   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2043   ret <8 x i8> %shuffle.i
   2044 }
   2045 
   2046 define <16 x i8> @test_undef_vzip1q_u8(<16 x i8> %a) {
   2047 ; CHECK-LABEL: test_undef_vzip1q_u8:
   2048 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2049 entry:
   2050   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   2051   ret <16 x i8> %shuffle.i
   2052 }
   2053 
   2054 define <4 x i16> @test_undef_vzip1_u16(<4 x i16> %a) {
   2055 ; CHECK-LABEL: test_undef_vzip1_u16:
   2056 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2057 entry:
   2058   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2059   ret <4 x i16> %shuffle.i
   2060 }
   2061 
   2062 define <8 x i16> @test_undef_vzip1q_u16(<8 x i16> %a) {
   2063 ; CHECK-LABEL: test_undef_vzip1q_u16:
   2064 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2065 entry:
   2066   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2067   ret <8 x i16> %shuffle.i
   2068 }
   2069 
   2070 define <4 x i32> @test_undef_vzip1q_u32(<4 x i32> %a) {
   2071 ; CHECK-LABEL: test_undef_vzip1q_u32:
   2072 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2073 entry:
   2074   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2075   ret <4 x i32> %shuffle.i
   2076 }
   2077 
   2078 define <4 x float> @test_undef_vzip1q_f32(<4 x float> %a) {
   2079 ; CHECK-LABEL: test_undef_vzip1q_f32:
   2080 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2081 entry:
   2082   %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2083   ret <4 x float> %shuffle.i
   2084 }
   2085 
   2086 define <8 x i8> @test_undef_vzip1_p8(<8 x i8> %a) {
   2087 ; CHECK-LABEL: test_undef_vzip1_p8:
   2088 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2089 entry:
   2090   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2091   ret <8 x i8> %shuffle.i
   2092 }
   2093 
   2094 define <16 x i8> @test_undef_vzip1q_p8(<16 x i8> %a) {
   2095 ; CHECK-LABEL: test_undef_vzip1q_p8:
   2096 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2097 entry:
   2098   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   2099   ret <16 x i8> %shuffle.i
   2100 }
   2101 
   2102 define <4 x i16> @test_undef_vzip1_p16(<4 x i16> %a) {
   2103 ; CHECK-LABEL: test_undef_vzip1_p16:
   2104 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2105 entry:
   2106   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2107   ret <4 x i16> %shuffle.i
   2108 }
   2109 
   2110 define <8 x i16> @test_undef_vzip1q_p16(<8 x i16> %a) {
   2111 ; CHECK-LABEL: test_undef_vzip1q_p16:
   2112 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2113 entry:
   2114   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2115   ret <8 x i16> %shuffle.i
   2116 }
   2117 
   2118 define <8 x i8> @test_undef_vzip2_s8(<8 x i8> %a) {
   2119 ; CHECK-LABEL: test_undef_vzip2_s8:
   2120 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2121 entry:
   2122   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2123   ret <8 x i8> %shuffle.i
   2124 }
   2125 
   2126 define <16 x i8> @test_undef_vzip2q_s8(<16 x i8> %a) {
   2127 ; CHECK-LABEL: test_undef_vzip2q_s8:
   2128 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2129 entry:
   2130   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   2131   ret <16 x i8> %shuffle.i
   2132 }
   2133 
   2134 define <4 x i16> @test_undef_vzip2_s16(<4 x i16> %a) {
   2135 ; CHECK-LABEL: test_undef_vzip2_s16:
   2136 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2137 entry:
   2138   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2139   ret <4 x i16> %shuffle.i
   2140 }
   2141 
   2142 define <8 x i16> @test_undef_vzip2q_s16(<8 x i16> %a) {
   2143 ; CHECK-LABEL: test_undef_vzip2q_s16:
   2144 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2145 entry:
   2146   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2147   ret <8 x i16> %shuffle.i
   2148 }
   2149 
   2150 define <4 x i32> @test_undef_vzip2q_s32(<4 x i32> %a) {
   2151 ; CHECK-LABEL: test_undef_vzip2q_s32:
   2152 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2153 entry:
   2154   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2155   ret <4 x i32> %shuffle.i
   2156 }
   2157 
   2158 define <8 x i8> @test_undef_vzip2_u8(<8 x i8> %a) {
   2159 ; CHECK-LABEL: test_undef_vzip2_u8:
   2160 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2161 entry:
   2162   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2163   ret <8 x i8> %shuffle.i
   2164 }
   2165 
   2166 define <16 x i8> @test_undef_vzip2q_u8(<16 x i8> %a) {
   2167 ; CHECK-LABEL: test_undef_vzip2q_u8:
   2168 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2169 entry:
   2170   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   2171   ret <16 x i8> %shuffle.i
   2172 }
   2173 
   2174 define <4 x i16> @test_undef_vzip2_u16(<4 x i16> %a) {
   2175 ; CHECK-LABEL: test_undef_vzip2_u16:
   2176 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2177 entry:
   2178   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2179   ret <4 x i16> %shuffle.i
   2180 }
   2181 
   2182 define <8 x i16> @test_undef_vzip2q_u16(<8 x i16> %a) {
   2183 ; CHECK-LABEL: test_undef_vzip2q_u16:
   2184 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2185 entry:
   2186   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2187   ret <8 x i16> %shuffle.i
   2188 }
   2189 
   2190 define <4 x i32> @test_undef_vzip2q_u32(<4 x i32> %a) {
   2191 ; CHECK-LABEL: test_undef_vzip2q_u32:
   2192 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2193 entry:
   2194   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2195   ret <4 x i32> %shuffle.i
   2196 }
   2197 
   2198 define <4 x float> @test_undef_vzip2q_f32(<4 x float> %a) {
   2199 ; CHECK-LABEL: test_undef_vzip2q_f32:
   2200 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2201 entry:
   2202   %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2203   ret <4 x float> %shuffle.i
   2204 }
   2205 
   2206 define <8 x i8> @test_undef_vzip2_p8(<8 x i8> %a) {
   2207 ; CHECK-LABEL: test_undef_vzip2_p8:
   2208 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2209 entry:
   2210   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2211   ret <8 x i8> %shuffle.i
   2212 }
   2213 
   2214 define <16 x i8> @test_undef_vzip2q_p8(<16 x i8> %a) {
   2215 ; CHECK-LABEL: test_undef_vzip2q_p8:
   2216 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2217 entry:
   2218   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   2219   ret <16 x i8> %shuffle.i
   2220 }
   2221 
   2222 define <4 x i16> @test_undef_vzip2_p16(<4 x i16> %a) {
   2223 ; CHECK-LABEL: test_undef_vzip2_p16:
   2224 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2225 entry:
   2226   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2227   ret <4 x i16> %shuffle.i
   2228 }
   2229 
   2230 define <8 x i16> @test_undef_vzip2q_p16(<8 x i16> %a) {
   2231 ; CHECK-LABEL: test_undef_vzip2q_p16:
   2232 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2233 entry:
   2234   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2235   ret <8 x i16> %shuffle.i
   2236 }
   2237 
   2238 define <8 x i8> @test_undef_vtrn1_s8(<8 x i8> %a) {
   2239 ; CHECK-LABEL: test_undef_vtrn1_s8:
   2240 ; CHECK: ret
   2241 entry:
   2242   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   2243   ret <8 x i8> %shuffle.i
   2244 }
   2245 
   2246 define <16 x i8> @test_undef_vtrn1q_s8(<16 x i8> %a) {
   2247 ; CHECK-LABEL: test_undef_vtrn1q_s8:
   2248 ; CHECK: ret
   2249 entry:
   2250   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   2251   ret <16 x i8> %shuffle.i
   2252 }
   2253 
   2254 define <4 x i16> @test_undef_vtrn1_s16(<4 x i16> %a) {
   2255 ; CHECK-LABEL: test_undef_vtrn1_s16:
   2256 ; CHECK: ret
   2257 entry:
   2258   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   2259   ret <4 x i16> %shuffle.i
   2260 }
   2261 
   2262 define <8 x i16> @test_undef_vtrn1q_s16(<8 x i16> %a) {
   2263 ; CHECK-LABEL: test_undef_vtrn1q_s16:
   2264 ; CHECK: ret
   2265 entry:
   2266   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   2267   ret <8 x i16> %shuffle.i
   2268 }
   2269 
   2270 define <4 x i32> @test_undef_vtrn1q_s32(<4 x i32> %a) {
   2271 ; CHECK-LABEL: test_undef_vtrn1q_s32:
   2272 ; CHECK: ret
   2273 entry:
   2274   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   2275   ret <4 x i32> %shuffle.i
   2276 }
   2277 
   2278 define <8 x i8> @test_undef_vtrn1_u8(<8 x i8> %a) {
   2279 ; CHECK-LABEL: test_undef_vtrn1_u8:
   2280 ; CHECK: ret
   2281 entry:
   2282   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   2283   ret <8 x i8> %shuffle.i
   2284 }
   2285 
   2286 define <16 x i8> @test_undef_vtrn1q_u8(<16 x i8> %a) {
   2287 ; CHECK-LABEL: test_undef_vtrn1q_u8:
   2288 ; CHECK: ret
   2289 entry:
   2290   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   2291   ret <16 x i8> %shuffle.i
   2292 }
   2293 
   2294 define <4 x i16> @test_undef_vtrn1_u16(<4 x i16> %a) {
   2295 ; CHECK-LABEL: test_undef_vtrn1_u16:
   2296 ; CHECK: ret
   2297 entry:
   2298   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   2299   ret <4 x i16> %shuffle.i
   2300 }
   2301 
   2302 define <8 x i16> @test_undef_vtrn1q_u16(<8 x i16> %a) {
   2303 ; CHECK-LABEL: test_undef_vtrn1q_u16:
   2304 ; CHECK: ret
   2305 entry:
   2306   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   2307   ret <8 x i16> %shuffle.i
   2308 }
   2309 
   2310 define <4 x i32> @test_undef_vtrn1q_u32(<4 x i32> %a) {
   2311 ; CHECK-LABEL: test_undef_vtrn1q_u32:
   2312 ; CHECK: ret
   2313 entry:
   2314   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   2315   ret <4 x i32> %shuffle.i
   2316 }
   2317 
   2318 define <4 x float> @test_undef_vtrn1q_f32(<4 x float> %a) {
   2319 ; CHECK-LABEL: test_undef_vtrn1q_f32:
   2320 ; CHECK: ret
   2321 entry:
   2322   %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   2323   ret <4 x float> %shuffle.i
   2324 }
   2325 
   2326 define <8 x i8> @test_undef_vtrn1_p8(<8 x i8> %a) {
   2327 ; CHECK-LABEL: test_undef_vtrn1_p8:
   2328 ; CHECK: ret
   2329 entry:
   2330   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   2331   ret <8 x i8> %shuffle.i
   2332 }
   2333 
   2334 define <16 x i8> @test_undef_vtrn1q_p8(<16 x i8> %a) {
   2335 ; CHECK-LABEL: test_undef_vtrn1q_p8:
   2336 ; CHECK: ret
   2337 entry:
   2338   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   2339   ret <16 x i8> %shuffle.i
   2340 }
   2341 
   2342 define <4 x i16> @test_undef_vtrn1_p16(<4 x i16> %a) {
   2343 ; CHECK-LABEL: test_undef_vtrn1_p16:
   2344 ; CHECK: ret
   2345 entry:
   2346   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   2347   ret <4 x i16> %shuffle.i
   2348 }
   2349 
   2350 define <8 x i16> @test_undef_vtrn1q_p16(<8 x i16> %a) {
   2351 ; CHECK-LABEL: test_undef_vtrn1q_p16:
   2352 ; CHECK: ret
   2353 entry:
   2354   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   2355   ret <8 x i16> %shuffle.i
   2356 }
   2357 
   2358 define <8 x i8> @test_undef_vtrn2_s8(<8 x i8> %a) {
   2359 ; CHECK-LABEL: test_undef_vtrn2_s8:
   2360 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2361 entry:
   2362   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   2363   ret <8 x i8> %shuffle.i
   2364 }
   2365 
   2366 define <16 x i8> @test_undef_vtrn2q_s8(<16 x i8> %a) {
   2367 ; CHECK-LABEL: test_undef_vtrn2q_s8:
   2368 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2369 entry:
   2370   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   2371   ret <16 x i8> %shuffle.i
   2372 }
   2373 
   2374 define <4 x i16> @test_undef_vtrn2_s16(<4 x i16> %a) {
   2375 ; CHECK-LABEL: test_undef_vtrn2_s16:
   2376 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2377 entry:
   2378   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   2379   ret <4 x i16> %shuffle.i
   2380 }
   2381 
   2382 define <8 x i16> @test_undef_vtrn2q_s16(<8 x i16> %a) {
   2383 ; CHECK-LABEL: test_undef_vtrn2q_s16:
   2384 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2385 entry:
   2386   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   2387   ret <8 x i16> %shuffle.i
   2388 }
   2389 
   2390 define <4 x i32> @test_undef_vtrn2q_s32(<4 x i32> %a) {
   2391 ; CHECK-LABEL: test_undef_vtrn2q_s32:
   2392 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2393 entry:
   2394   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   2395   ret <4 x i32> %shuffle.i
   2396 }
   2397 
   2398 define <8 x i8> @test_undef_vtrn2_u8(<8 x i8> %a) {
   2399 ; CHECK-LABEL: test_undef_vtrn2_u8:
   2400 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2401 entry:
   2402   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   2403   ret <8 x i8> %shuffle.i
   2404 }
   2405 
   2406 define <16 x i8> @test_undef_vtrn2q_u8(<16 x i8> %a) {
   2407 ; CHECK-LABEL: test_undef_vtrn2q_u8:
   2408 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2409 entry:
   2410   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   2411   ret <16 x i8> %shuffle.i
   2412 }
   2413 
   2414 define <4 x i16> @test_undef_vtrn2_u16(<4 x i16> %a) {
   2415 ; CHECK-LABEL: test_undef_vtrn2_u16:
   2416 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2417 entry:
   2418   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   2419   ret <4 x i16> %shuffle.i
   2420 }
   2421 
   2422 define <8 x i16> @test_undef_vtrn2q_u16(<8 x i16> %a) {
   2423 ; CHECK-LABEL: test_undef_vtrn2q_u16:
   2424 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2425 entry:
   2426   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   2427   ret <8 x i16> %shuffle.i
   2428 }
   2429 
   2430 define <4 x i32> @test_undef_vtrn2q_u32(<4 x i32> %a) {
   2431 ; CHECK-LABEL: test_undef_vtrn2q_u32:
   2432 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2433 entry:
   2434   %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   2435   ret <4 x i32> %shuffle.i
   2436 }
   2437 
   2438 define <4 x float> @test_undef_vtrn2q_f32(<4 x float> %a) {
   2439 ; CHECK-LABEL: test_undef_vtrn2q_f32:
   2440 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2441 entry:
   2442   %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   2443   ret <4 x float> %shuffle.i
   2444 }
   2445 
   2446 define <8 x i8> @test_undef_vtrn2_p8(<8 x i8> %a) {
   2447 ; CHECK-LABEL: test_undef_vtrn2_p8:
   2448 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2449 entry:
   2450   %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   2451   ret <8 x i8> %shuffle.i
   2452 }
   2453 
   2454 define <16 x i8> @test_undef_vtrn2q_p8(<16 x i8> %a) {
   2455 ; CHECK-LABEL: test_undef_vtrn2q_p8:
   2456 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2457 entry:
   2458   %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   2459   ret <16 x i8> %shuffle.i
   2460 }
   2461 
   2462 define <4 x i16> @test_undef_vtrn2_p16(<4 x i16> %a) {
   2463 ; CHECK-LABEL: test_undef_vtrn2_p16:
   2464 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2465 entry:
   2466   %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   2467   ret <4 x i16> %shuffle.i
   2468 }
   2469 
   2470 define <8 x i16> @test_undef_vtrn2q_p16(<8 x i16> %a) {
   2471 ; CHECK-LABEL: test_undef_vtrn2q_p16:
   2472 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2473 entry:
   2474   %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   2475   ret <8 x i16> %shuffle.i
   2476 }
   2477 
   2478 define %struct.int8x8x2_t @test_vuzp_s8(<8 x i8> %a, <8 x i8> %b) {
   2479 ; CHECK-LABEL: test_vuzp_s8:
   2480 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2481 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2482 entry:
   2483   %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   2484   %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   2485   %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
   2486   %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
   2487   ret %struct.int8x8x2_t %.fca.0.1.insert
   2488 }
   2489 
   2490 define %struct.int16x4x2_t @test_vuzp_s16(<4 x i16> %a, <4 x i16> %b) {
   2491 ; CHECK-LABEL: test_vuzp_s16:
   2492 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2493 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2494 entry:
   2495   %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   2496   %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   2497   %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
   2498   %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
   2499   ret %struct.int16x4x2_t %.fca.0.1.insert
   2500 }
   2501 
   2502 define %struct.int32x2x2_t @test_vuzp_s32(<2 x i32> %a, <2 x i32> %b) {
   2503 ; CHECK-LABEL: test_vuzp_s32:
   2504 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2505 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2506 entry:
   2507   %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
   2508   %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
   2509   %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
   2510   %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
   2511   ret %struct.int32x2x2_t %.fca.0.1.insert
   2512 }
   2513 
   2514 define %struct.uint8x8x2_t @test_vuzp_u8(<8 x i8> %a, <8 x i8> %b) {
   2515 ; CHECK-LABEL: test_vuzp_u8:
   2516 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2517 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2518 entry:
   2519   %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   2520   %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   2521   %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
   2522   %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
   2523   ret %struct.uint8x8x2_t %.fca.0.1.insert
   2524 }
   2525 
   2526 define %struct.uint16x4x2_t @test_vuzp_u16(<4 x i16> %a, <4 x i16> %b) {
   2527 ; CHECK-LABEL: test_vuzp_u16:
   2528 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2529 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2530 entry:
   2531   %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   2532   %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   2533   %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
   2534   %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
   2535   ret %struct.uint16x4x2_t %.fca.0.1.insert
   2536 }
   2537 
   2538 define %struct.uint32x2x2_t @test_vuzp_u32(<2 x i32> %a, <2 x i32> %b) {
   2539 ; CHECK-LABEL: test_vuzp_u32:
   2540 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2541 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2542 entry:
   2543   %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
   2544   %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
   2545   %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0
   2546   %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1
   2547   ret %struct.uint32x2x2_t %.fca.0.1.insert
   2548 }
   2549 
   2550 define %struct.float32x2x2_t @test_vuzp_f32(<2 x float> %a, <2 x float> %b) {
   2551 ; CHECK-LABEL: test_vuzp_f32:
   2552 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2553 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2554 entry:
   2555   %vuzp.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
   2556   %vuzp1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
   2557   %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vuzp.i, 0, 0
   2558   %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vuzp1.i, 0, 1
   2559   ret %struct.float32x2x2_t %.fca.0.1.insert
   2560 }
   2561 
   2562 define %struct.poly8x8x2_t @test_vuzp_p8(<8 x i8> %a, <8 x i8> %b) {
   2563 ; CHECK-LABEL: test_vuzp_p8:
   2564 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2565 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2566 entry:
   2567   %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   2568   %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   2569   %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
   2570   %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
   2571   ret %struct.poly8x8x2_t %.fca.0.1.insert
   2572 }
   2573 
   2574 define %struct.poly16x4x2_t @test_vuzp_p16(<4 x i16> %a, <4 x i16> %b) {
   2575 ; CHECK-LABEL: test_vuzp_p16:
   2576 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2577 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2578 entry:
   2579   %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   2580   %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   2581   %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0
   2582   %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1
   2583   ret %struct.poly16x4x2_t %.fca.0.1.insert
   2584 }
   2585 
   2586 define %struct.int8x16x2_t @test_vuzpq_s8(<16 x i8> %a, <16 x i8> %b) {
   2587 ; CHECK-LABEL: test_vuzpq_s8:
   2588 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2589 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2590 entry:
   2591   %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   2592   %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   2593   %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
   2594   %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
   2595   ret %struct.int8x16x2_t %.fca.0.1.insert
   2596 }
   2597 
   2598 define %struct.int16x8x2_t @test_vuzpq_s16(<8 x i16> %a, <8 x i16> %b) {
   2599 ; CHECK-LABEL: test_vuzpq_s16:
   2600 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2601 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2602 entry:
   2603   %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   2604   %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   2605   %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
   2606   %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
   2607   ret %struct.int16x8x2_t %.fca.0.1.insert
   2608 }
   2609 
   2610 define %struct.int32x4x2_t @test_vuzpq_s32(<4 x i32> %a, <4 x i32> %b) {
   2611 ; CHECK-LABEL: test_vuzpq_s32:
   2612 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2613 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2614 entry:
   2615   %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   2616   %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   2617   %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0
   2618   %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1
   2619   ret %struct.int32x4x2_t %.fca.0.1.insert
   2620 }
   2621 
   2622 define %struct.uint8x16x2_t @test_vuzpq_u8(<16 x i8> %a, <16 x i8> %b) {
   2623 ; CHECK-LABEL: test_vuzpq_u8:
   2624 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2625 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2626 entry:
   2627   %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   2628   %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   2629   %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
   2630   %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
   2631   ret %struct.uint8x16x2_t %.fca.0.1.insert
   2632 }
   2633 
   2634 define %struct.uint16x8x2_t @test_vuzpq_u16(<8 x i16> %a, <8 x i16> %b) {
   2635 ; CHECK-LABEL: test_vuzpq_u16:
   2636 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2637 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2638 entry:
   2639   %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   2640   %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   2641   %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
   2642   %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
   2643   ret %struct.uint16x8x2_t %.fca.0.1.insert
   2644 }
   2645 
   2646 define %struct.uint32x4x2_t @test_vuzpq_u32(<4 x i32> %a, <4 x i32> %b) {
   2647 ; CHECK-LABEL: test_vuzpq_u32:
   2648 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2649 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2650 entry:
   2651   %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   2652   %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   2653   %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0
   2654   %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1
   2655   ret %struct.uint32x4x2_t %.fca.0.1.insert
   2656 }
   2657 
   2658 define %struct.float32x4x2_t @test_vuzpq_f32(<4 x float> %a, <4 x float> %b) {
   2659 ; CHECK-LABEL: test_vuzpq_f32:
   2660 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2661 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2662 entry:
   2663   %vuzp.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
   2664   %vuzp1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
   2665   %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vuzp.i, 0, 0
   2666   %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vuzp1.i, 0, 1
   2667   ret %struct.float32x4x2_t %.fca.0.1.insert
   2668 }
   2669 
   2670 define %struct.poly8x16x2_t @test_vuzpq_p8(<16 x i8> %a, <16 x i8> %b) {
   2671 ; CHECK-LABEL: test_vuzpq_p8:
   2672 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2673 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2674 entry:
   2675   %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
   2676   %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
   2677   %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0
   2678   %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1
   2679   ret %struct.poly8x16x2_t %.fca.0.1.insert
   2680 }
   2681 
   2682 define %struct.poly16x8x2_t @test_vuzpq_p16(<8 x i16> %a, <8 x i16> %b) {
   2683 ; CHECK-LABEL: test_vuzpq_p16:
   2684 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2685 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2686 entry:
   2687   %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   2688   %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   2689   %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0
   2690   %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1
   2691   ret %struct.poly16x8x2_t %.fca.0.1.insert
   2692 }
   2693 
   2694 define %struct.int8x8x2_t @test_vzip_s8(<8 x i8> %a, <8 x i8> %b) {
   2695 ; CHECK-LABEL: test_vzip_s8:
   2696 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2697 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2698 entry:
   2699   %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2700   %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2701   %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
   2702   %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
   2703   ret %struct.int8x8x2_t %.fca.0.1.insert
   2704 }
   2705 
   2706 define %struct.int16x4x2_t @test_vzip_s16(<4 x i16> %a, <4 x i16> %b) {
   2707 ; CHECK-LABEL: test_vzip_s16:
   2708 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2709 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2710 entry:
   2711   %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2712   %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2713   %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
   2714   %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
   2715   ret %struct.int16x4x2_t %.fca.0.1.insert
   2716 }
   2717 
   2718 define %struct.int32x2x2_t @test_vzip_s32(<2 x i32> %a, <2 x i32> %b) {
   2719 ; CHECK-LABEL: test_vzip_s32:
   2720 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2721 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2722 entry:
   2723   %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
   2724   %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
   2725   %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vzip.i, 0, 0
   2726   %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1
   2727   ret %struct.int32x2x2_t %.fca.0.1.insert
   2728 }
   2729 
   2730 define %struct.uint8x8x2_t @test_vzip_u8(<8 x i8> %a, <8 x i8> %b) {
   2731 ; CHECK-LABEL: test_vzip_u8:
   2732 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2733 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2734 entry:
   2735   %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2736   %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2737   %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
   2738   %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
   2739   ret %struct.uint8x8x2_t %.fca.0.1.insert
   2740 }
   2741 
   2742 define %struct.uint16x4x2_t @test_vzip_u16(<4 x i16> %a, <4 x i16> %b) {
   2743 ; CHECK-LABEL: test_vzip_u16:
   2744 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2745 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2746 entry:
   2747   %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2748   %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2749   %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
   2750   %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
   2751   ret %struct.uint16x4x2_t %.fca.0.1.insert
   2752 }
   2753 
   2754 define %struct.uint32x2x2_t @test_vzip_u32(<2 x i32> %a, <2 x i32> %b) {
   2755 ; CHECK-LABEL: test_vzip_u32:
   2756 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2757 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2758 entry:
   2759   %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
   2760   %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
   2761   %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vzip.i, 0, 0
   2762   %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1
   2763   ret %struct.uint32x2x2_t %.fca.0.1.insert
   2764 }
   2765 
   2766 define %struct.float32x2x2_t @test_vzip_f32(<2 x float> %a, <2 x float> %b) {
   2767 ; CHECK-LABEL: test_vzip_f32:
   2768 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2769 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2770 entry:
   2771   %vzip.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
   2772   %vzip1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
   2773   %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vzip.i, 0, 0
   2774   %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vzip1.i, 0, 1
   2775   ret %struct.float32x2x2_t %.fca.0.1.insert
   2776 }
   2777 
   2778 define %struct.poly8x8x2_t @test_vzip_p8(<8 x i8> %a, <8 x i8> %b) {
   2779 ; CHECK-LABEL: test_vzip_p8:
   2780 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2781 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2782 entry:
   2783   %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2784   %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2785   %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vzip.i, 0, 0
   2786   %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1
   2787   ret %struct.poly8x8x2_t %.fca.0.1.insert
   2788 }
   2789 
   2790 define %struct.poly16x4x2_t @test_vzip_p16(<4 x i16> %a, <4 x i16> %b) {
   2791 ; CHECK-LABEL: test_vzip_p16:
   2792 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2793 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2794 entry:
   2795   %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2796   %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2797   %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vzip.i, 0, 0
   2798   %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1
   2799   ret %struct.poly16x4x2_t %.fca.0.1.insert
   2800 }
   2801 
   2802 define %struct.int8x16x2_t @test_vzipq_s8(<16 x i8> %a, <16 x i8> %b) {
   2803 ; CHECK-LABEL: test_vzipq_s8:
   2804 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2805 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2806 entry:
   2807   %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   2808   %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   2809   %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
   2810   %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
   2811   ret %struct.int8x16x2_t %.fca.0.1.insert
   2812 }
   2813 
   2814 define %struct.int16x8x2_t @test_vzipq_s16(<8 x i16> %a, <8 x i16> %b) {
   2815 ; CHECK-LABEL: test_vzipq_s16:
   2816 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2817 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2818 entry:
   2819   %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2820   %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2821   %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
   2822   %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
   2823   ret %struct.int16x8x2_t %.fca.0.1.insert
   2824 }
   2825 
   2826 define %struct.int32x4x2_t @test_vzipq_s32(<4 x i32> %a, <4 x i32> %b) {
   2827 ; CHECK-LABEL: test_vzipq_s32:
   2828 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2829 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2830 entry:
   2831   %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2832   %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2833   %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vzip.i, 0, 0
   2834   %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1
   2835   ret %struct.int32x4x2_t %.fca.0.1.insert
   2836 }
   2837 
   2838 define %struct.uint8x16x2_t @test_vzipq_u8(<16 x i8> %a, <16 x i8> %b) {
   2839 ; CHECK-LABEL: test_vzipq_u8:
   2840 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2841 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2842 entry:
   2843   %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   2844   %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   2845   %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
   2846   %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
   2847   ret %struct.uint8x16x2_t %.fca.0.1.insert
   2848 }
   2849 
   2850 define %struct.uint16x8x2_t @test_vzipq_u16(<8 x i16> %a, <8 x i16> %b) {
   2851 ; CHECK-LABEL: test_vzipq_u16:
   2852 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2853 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2854 entry:
   2855   %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2856   %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2857   %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
   2858   %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
   2859   ret %struct.uint16x8x2_t %.fca.0.1.insert
   2860 }
   2861 
   2862 define %struct.uint32x4x2_t @test_vzipq_u32(<4 x i32> %a, <4 x i32> %b) {
   2863 ; CHECK-LABEL: test_vzipq_u32:
   2864 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2865 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2866 entry:
   2867   %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2868   %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2869   %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vzip.i, 0, 0
   2870   %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1
   2871   ret %struct.uint32x4x2_t %.fca.0.1.insert
   2872 }
   2873 
   2874 define %struct.float32x4x2_t @test_vzipq_f32(<4 x float> %a, <4 x float> %b) {
   2875 ; CHECK-LABEL: test_vzipq_f32:
   2876 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2877 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   2878 entry:
   2879   %vzip.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
   2880   %vzip1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
   2881   %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vzip.i, 0, 0
   2882   %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vzip1.i, 0, 1
   2883   ret %struct.float32x4x2_t %.fca.0.1.insert
   2884 }
   2885 
   2886 define %struct.poly8x16x2_t @test_vzipq_p8(<16 x i8> %a, <16 x i8> %b) {
   2887 ; CHECK-LABEL: test_vzipq_p8:
   2888 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2889 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   2890 entry:
   2891   %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
   2892   %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
   2893   %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vzip.i, 0, 0
   2894   %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1
   2895   ret %struct.poly8x16x2_t %.fca.0.1.insert
   2896 }
   2897 
   2898 define %struct.poly16x8x2_t @test_vzipq_p16(<8 x i16> %a, <8 x i16> %b) {
   2899 ; CHECK-LABEL: test_vzipq_p16:
   2900 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2901 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   2902 entry:
   2903   %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
   2904   %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
   2905   %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vzip.i, 0, 0
   2906   %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1
   2907   ret %struct.poly16x8x2_t %.fca.0.1.insert
   2908 }
   2909 
   2910 define %struct.int8x8x2_t @test_vtrn_s8(<8 x i8> %a, <8 x i8> %b) {
   2911 ; CHECK-LABEL: test_vtrn_s8:
   2912 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2913 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2914 entry:
   2915   %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   2916   %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   2917   %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
   2918   %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
   2919   ret %struct.int8x8x2_t %.fca.0.1.insert
   2920 }
   2921 
   2922 define %struct.int16x4x2_t @test_vtrn_s16(<4 x i16> %a, <4 x i16> %b) {
   2923 ; CHECK-LABEL: test_vtrn_s16:
   2924 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2925 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2926 entry:
   2927   %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   2928   %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   2929   %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
   2930   %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
   2931   ret %struct.int16x4x2_t %.fca.0.1.insert
   2932 }
   2933 
   2934 define %struct.int32x2x2_t @test_vtrn_s32(<2 x i32> %a, <2 x i32> %b) {
   2935 ; CHECK-LABEL: test_vtrn_s32:
   2936 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2937 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2938 entry:
   2939   %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
   2940   %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
   2941   %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0
   2942   %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1
   2943   ret %struct.int32x2x2_t %.fca.0.1.insert
   2944 }
   2945 
   2946 define %struct.uint8x8x2_t @test_vtrn_u8(<8 x i8> %a, <8 x i8> %b) {
   2947 ; CHECK-LABEL: test_vtrn_u8:
   2948 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2949 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2950 entry:
   2951   %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   2952   %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   2953   %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
   2954   %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
   2955   ret %struct.uint8x8x2_t %.fca.0.1.insert
   2956 }
   2957 
   2958 define %struct.uint16x4x2_t @test_vtrn_u16(<4 x i16> %a, <4 x i16> %b) {
   2959 ; CHECK-LABEL: test_vtrn_u16:
   2960 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2961 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   2962 entry:
   2963   %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   2964   %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   2965   %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
   2966   %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
   2967   ret %struct.uint16x4x2_t %.fca.0.1.insert
   2968 }
   2969 
   2970 define %struct.uint32x2x2_t @test_vtrn_u32(<2 x i32> %a, <2 x i32> %b) {
   2971 ; CHECK-LABEL: test_vtrn_u32:
   2972 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2973 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2974 entry:
   2975   %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2>
   2976   %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3>
   2977   %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0
   2978   %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1
   2979   ret %struct.uint32x2x2_t %.fca.0.1.insert
   2980 }
   2981 
   2982 define %struct.float32x2x2_t @test_vtrn_f32(<2 x float> %a, <2 x float> %b) {
   2983 ; CHECK-LABEL: test_vtrn_f32:
   2984 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2985 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
   2986 entry:
   2987   %vtrn.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2>
   2988   %vtrn1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3>
   2989   %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vtrn.i, 0, 0
   2990   %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vtrn1.i, 0, 1
   2991   ret %struct.float32x2x2_t %.fca.0.1.insert
   2992 }
   2993 
   2994 define %struct.poly8x8x2_t @test_vtrn_p8(<8 x i8> %a, <8 x i8> %b) {
   2995 ; CHECK-LABEL: test_vtrn_p8:
   2996 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2997 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
   2998 entry:
   2999   %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   3000   %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   3001   %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0
   3002   %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1
   3003   ret %struct.poly8x8x2_t %.fca.0.1.insert
   3004 }
   3005 
   3006 define %struct.poly16x4x2_t @test_vtrn_p16(<4 x i16> %a, <4 x i16> %b) {
   3007 ; CHECK-LABEL: test_vtrn_p16:
   3008 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   3009 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
   3010 entry:
   3011   %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   3012   %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   3013   %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0
   3014   %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1
   3015   ret %struct.poly16x4x2_t %.fca.0.1.insert
   3016 }
   3017 
   3018 define %struct.int8x16x2_t @test_vtrnq_s8(<16 x i8> %a, <16 x i8> %b) {
   3019 ; CHECK-LABEL: test_vtrnq_s8:
   3020 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   3021 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   3022 entry:
   3023   %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   3024   %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   3025   %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
   3026   %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
   3027   ret %struct.int8x16x2_t %.fca.0.1.insert
   3028 }
   3029 
   3030 define %struct.int16x8x2_t @test_vtrnq_s16(<8 x i16> %a, <8 x i16> %b) {
   3031 ; CHECK-LABEL: test_vtrnq_s16:
   3032 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   3033 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   3034 entry:
   3035   %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   3036   %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   3037   %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
   3038   %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
   3039   ret %struct.int16x8x2_t %.fca.0.1.insert
   3040 }
   3041 
   3042 define %struct.int32x4x2_t @test_vtrnq_s32(<4 x i32> %a, <4 x i32> %b) {
   3043 ; CHECK-LABEL: test_vtrnq_s32:
   3044 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   3045 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   3046 entry:
   3047   %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   3048   %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   3049   %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0
   3050   %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1
   3051   ret %struct.int32x4x2_t %.fca.0.1.insert
   3052 }
   3053 
   3054 define %struct.uint8x16x2_t @test_vtrnq_u8(<16 x i8> %a, <16 x i8> %b) {
   3055 ; CHECK-LABEL: test_vtrnq_u8:
   3056 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   3057 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   3058 entry:
   3059   %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   3060   %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   3061   %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
   3062   %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
   3063   ret %struct.uint8x16x2_t %.fca.0.1.insert
   3064 }
   3065 
   3066 define %struct.uint16x8x2_t @test_vtrnq_u16(<8 x i16> %a, <8 x i16> %b) {
   3067 ; CHECK-LABEL: test_vtrnq_u16:
   3068 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   3069 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   3070 entry:
   3071   %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   3072   %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   3073   %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
   3074   %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
   3075   ret %struct.uint16x8x2_t %.fca.0.1.insert
   3076 }
   3077 
   3078 define %struct.uint32x4x2_t @test_vtrnq_u32(<4 x i32> %a, <4 x i32> %b) {
   3079 ; CHECK-LABEL: test_vtrnq_u32:
   3080 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   3081 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   3082 entry:
   3083   %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   3084   %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   3085   %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0
   3086   %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1
   3087   ret %struct.uint32x4x2_t %.fca.0.1.insert
   3088 }
   3089 
   3090 define %struct.float32x4x2_t @test_vtrnq_f32(<4 x float> %a, <4 x float> %b) {
   3091 ; CHECK-LABEL: test_vtrnq_f32:
   3092 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   3093 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
   3094 entry:
   3095   %vtrn.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
   3096   %vtrn1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
   3097   %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vtrn.i, 0, 0
   3098   %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vtrn1.i, 0, 1
   3099   ret %struct.float32x4x2_t %.fca.0.1.insert
   3100 }
   3101 
   3102 define %struct.poly8x16x2_t @test_vtrnq_p8(<16 x i8> %a, <16 x i8> %b) {
   3103 ; CHECK-LABEL: test_vtrnq_p8:
   3104 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   3105 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
   3106 entry:
   3107   %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30>
   3108   %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31>
   3109   %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0
   3110   %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1
   3111   ret %struct.poly8x16x2_t %.fca.0.1.insert
   3112 }
   3113 
   3114 define %struct.poly16x8x2_t @test_vtrnq_p16(<8 x i16> %a, <8 x i16> %b) {
   3115 ; CHECK-LABEL: test_vtrnq_p16:
   3116 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   3117 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
   3118 entry:
   3119   %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
   3120   %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15>
   3121   %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0
   3122   %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1
   3123   ret %struct.poly16x8x2_t %.fca.0.1.insert
   3124 }
   3125 
   3126 define %struct.uint8x8x2_t @test_uzp(<16 x i8> %y) {
   3127 ; CHECK-LABEL: test_uzp:
   3128 
   3129   %vuzp.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
   3130   %vuzp1.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
   3131   %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0
   3132   %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1
   3133   ret %struct.uint8x8x2_t %.fca.0.1.insert
   3134 
   3135 }
   3136