1 ; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-linux-gnu | FileCheck %s 2 3 @var32 = global i32 0 4 @var64 = global i64 0 5 6 define void @test_zr() { 7 ; CHECK-LABEL: test_zr: 8 9 store i32 0, i32* @var32 10 ; CHECK: str wzr, [{{x[0-9]+}}, {{#?}}:lo12:var32] 11 store i64 0, i64* @var64 12 ; CHECK: str xzr, [{{x[0-9]+}}, {{#?}}:lo12:var64] 13 14 ret void 15 ; CHECK: ret 16 } 17 18 define void @test_sp(i32 %val) { 19 ; CHECK-LABEL: test_sp: 20 21 ; Important correctness point here is that LLVM doesn't try to use xzr 22 ; as an addressing register: "str w0, [xzr]" is not a valid A64 23 ; instruction (0b11111 in the Rn field would mean "sp"). 24 %addr = getelementptr i32, i32* null, i64 0 25 store i32 %val, i32* %addr 26 ; CHECK: str {{w[0-9]+}}, [{{x[0-9]+|sp}}] 27 28 ret void 29 ; CHECK: ret 30 } 31
