1 ; RUN: not llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s --check-prefix=BASELINE 2 ; RUN: llc < %s -mtriple=thumbv8m.main-none-eabi -mattr=+dsp 2>&1 | FileCheck %s --check-prefix=MAINLINE 3 4 ; BASELINE: LLVM ERROR: Invalid register name "basepri_max_ns". 5 6 define i32 @read_mclass_registers() nounwind { 7 entry: 8 ; MAINLINE-LABEL: read_mclass_registers: 9 ; MAINLINE: mrs r0, apsr 10 ; MAINLINE: mrs r1, iapsr 11 ; MAINLINE: mrs r1, eapsr 12 ; MAINLINE: mrs r1, xpsr 13 ; MAINLINE: mrs r1, ipsr 14 ; MAINLINE: mrs r1, epsr 15 ; MAINLINE: mrs r1, iepsr 16 ; MAINLINE: mrs r1, msp 17 ; MAINLINE: mrs r1, psp 18 ; MAINLINE: mrs r1, primask 19 ; MAINLINE: mrs r1, basepri 20 ; MAINLINE: mrs r1, basepri_max 21 ; MAINLINE: mrs r1, faultmask 22 ; MAINLINE: mrs r1, control 23 ; MAINLINE: mrs r1, msplim 24 ; MAINLINE: mrs r1, psplim 25 ; MAINLINE: mrs r1, msp_ns 26 ; MAINLINE: mrs r1, psp_ns 27 ; MAINLINE: mrs r1, msplim_ns 28 ; MAINLINE: mrs r1, psplim_ns 29 ; MAINLINE: mrs r1, primask_ns 30 ; MAINLINE: mrs r1, basepri_ns 31 ; MAINLINE: mrs r1, faultmask_ns 32 ; MAINLINE: mrs r1, control_ns 33 ; MAINLINE: mrs r1, sp_ns 34 ; MAINLINE: mrs r1, basepri_max_ns 35 36 %0 = call i32 @llvm.read_register.i32(metadata !0) 37 %1 = call i32 @llvm.read_register.i32(metadata !4) 38 %add1 = add i32 %1, %0 39 %2 = call i32 @llvm.read_register.i32(metadata !8) 40 %add2 = add i32 %add1, %2 41 %3 = call i32 @llvm.read_register.i32(metadata !12) 42 %add3 = add i32 %add2, %3 43 %4 = call i32 @llvm.read_register.i32(metadata !16) 44 %add4 = add i32 %add3, %4 45 %5 = call i32 @llvm.read_register.i32(metadata !17) 46 %add5 = add i32 %add4, %5 47 %6 = call i32 @llvm.read_register.i32(metadata !18) 48 %add6 = add i32 %add5, %6 49 %7 = call i32 @llvm.read_register.i32(metadata !19) 50 %add7 = add i32 %add6, %7 51 %8 = call i32 @llvm.read_register.i32(metadata !20) 52 %add8 = add i32 %add7, %8 53 %9 = call i32 @llvm.read_register.i32(metadata !21) 54 %add9 = add i32 %add8, %9 55 %10 = call i32 @llvm.read_register.i32(metadata !22) 56 %add10 = add i32 %add9, %10 57 %11 = call i32 @llvm.read_register.i32(metadata !23) 58 %add11 = add i32 %add10, %11 59 %12 = call i32 @llvm.read_register.i32(metadata !24) 60 %add12 = add i32 %add11, %12 61 %13 = call i32 @llvm.read_register.i32(metadata !25) 62 %add13 = add i32 %add12, %13 63 %14 = call i32 @llvm.read_register.i32(metadata !26) 64 %add14 = add i32 %add13, %14 65 %15 = call i32 @llvm.read_register.i32(metadata !27) 66 %add15 = add i32 %add14, %15 67 %16 = call i32 @llvm.read_register.i32(metadata !28) 68 %add16 = add i32 %add15, %16 69 %17 = call i32 @llvm.read_register.i32(metadata !29) 70 %add17 = add i32 %add16, %17 71 %18 = call i32 @llvm.read_register.i32(metadata !30) 72 %add18 = add i32 %add17, %18 73 %19 = call i32 @llvm.read_register.i32(metadata !31) 74 %add19 = add i32 %add18, %19 75 %20 = call i32 @llvm.read_register.i32(metadata !32) 76 %add20 = add i32 %add19, %20 77 %21 = call i32 @llvm.read_register.i32(metadata !33) 78 %add21 = add i32 %add20, %21 79 %22 = call i32 @llvm.read_register.i32(metadata !34) 80 %add22 = add i32 %add21, %22 81 %23 = call i32 @llvm.read_register.i32(metadata !35) 82 %add23 = add i32 %add22, %23 83 %24 = call i32 @llvm.read_register.i32(metadata !36) 84 %add24 = add i32 %add23, %24 85 %25 = call i32 @llvm.read_register.i32(metadata !37) 86 %add25 = add i32 %add24, %25 87 ret i32 %add25 88 } 89 90 define void @write_mclass_registers(i32 %x) nounwind { 91 entry: 92 ; MAINLINE-LABEL: write_mclass_registers: 93 ; MAINLINE: msr apsr_nzcvqg, r0 94 ; MAINLINE: msr apsr_nzcvq, r0 95 ; MAINLINE: msr apsr_g, r0 96 ; MAINLINE: msr apsr_nzcvqg, r0 97 ; MAINLINE: msr iapsr_nzcvqg, r0 98 ; MAINLINE: msr iapsr_nzcvq, r0 99 ; MAINLINE: msr iapsr_g, r0 100 ; MAINLINE: msr iapsr_nzcvqg, r0 101 ; MAINLINE: msr eapsr_nzcvqg, r0 102 ; MAINLINE: msr eapsr_nzcvq, r0 103 ; MAINLINE: msr eapsr_g, r0 104 ; MAINLINE: msr eapsr_nzcvqg, r0 105 ; MAINLINE: msr xpsr_nzcvqg, r0 106 ; MAINLINE: msr xpsr_nzcvq, r0 107 ; MAINLINE: msr xpsr_g, r0 108 ; MAINLINE: msr xpsr_nzcvqg, r0 109 ; MAINLINE: msr ipsr, r0 110 ; MAINLINE: msr epsr, r0 111 ; MAINLINE: msr iepsr, r0 112 ; MAINLINE: msr msp, r0 113 ; MAINLINE: msr psp, r0 114 ; MAINLINE: msr primask, r0 115 ; MAINLINE: msr basepri, r0 116 ; MAINLINE: msr basepri_max, r0 117 ; MAINLINE: msr faultmask, r0 118 ; MAINLINE: msr control, r0 119 ; MAINLINE: msr msplim, r0 120 ; MAINLINE: msr psplim, r0 121 ; MAINLINE: msr msp_ns, r0 122 ; MAINLINE: msr psp_ns, r0 123 ; MAINLINE: msr msplim_ns, r0 124 ; MAINLINE: msr psplim_ns, r0 125 ; MAINLINE: msr primask_ns, r0 126 ; MAINLINE: msr basepri_ns, r0 127 ; MAINLINE: msr faultmask_ns, r0 128 ; MAINLINE: msr control_ns, r0 129 ; MAINLINE: msr sp_ns, r0 130 ; MAINLINE: msr basepri_max_ns, r0 131 132 call void @llvm.write_register.i32(metadata !0, i32 %x) 133 call void @llvm.write_register.i32(metadata !1, i32 %x) 134 call void @llvm.write_register.i32(metadata !2, i32 %x) 135 call void @llvm.write_register.i32(metadata !3, i32 %x) 136 call void @llvm.write_register.i32(metadata !4, i32 %x) 137 call void @llvm.write_register.i32(metadata !5, i32 %x) 138 call void @llvm.write_register.i32(metadata !6, i32 %x) 139 call void @llvm.write_register.i32(metadata !7, i32 %x) 140 call void @llvm.write_register.i32(metadata !8, i32 %x) 141 call void @llvm.write_register.i32(metadata !9, i32 %x) 142 call void @llvm.write_register.i32(metadata !10, i32 %x) 143 call void @llvm.write_register.i32(metadata !11, i32 %x) 144 call void @llvm.write_register.i32(metadata !12, i32 %x) 145 call void @llvm.write_register.i32(metadata !13, i32 %x) 146 call void @llvm.write_register.i32(metadata !14, i32 %x) 147 call void @llvm.write_register.i32(metadata !15, i32 %x) 148 call void @llvm.write_register.i32(metadata !16, i32 %x) 149 call void @llvm.write_register.i32(metadata !17, i32 %x) 150 call void @llvm.write_register.i32(metadata !18, i32 %x) 151 call void @llvm.write_register.i32(metadata !19, i32 %x) 152 call void @llvm.write_register.i32(metadata !20, i32 %x) 153 call void @llvm.write_register.i32(metadata !21, i32 %x) 154 call void @llvm.write_register.i32(metadata !22, i32 %x) 155 call void @llvm.write_register.i32(metadata !23, i32 %x) 156 call void @llvm.write_register.i32(metadata !24, i32 %x) 157 call void @llvm.write_register.i32(metadata !25, i32 %x) 158 call void @llvm.write_register.i32(metadata !26, i32 %x) 159 call void @llvm.write_register.i32(metadata !27, i32 %x) 160 call void @llvm.write_register.i32(metadata !28, i32 %x) 161 call void @llvm.write_register.i32(metadata !29, i32 %x) 162 call void @llvm.write_register.i32(metadata !30, i32 %x) 163 call void @llvm.write_register.i32(metadata !31, i32 %x) 164 call void @llvm.write_register.i32(metadata !32, i32 %x) 165 call void @llvm.write_register.i32(metadata !33, i32 %x) 166 call void @llvm.write_register.i32(metadata !34, i32 %x) 167 call void @llvm.write_register.i32(metadata !35, i32 %x) 168 call void @llvm.write_register.i32(metadata !36, i32 %x) 169 call void @llvm.write_register.i32(metadata !37, i32 %x) 170 ret void 171 } 172 173 declare i32 @llvm.read_register.i32(metadata) nounwind 174 declare void @llvm.write_register.i32(metadata, i32) nounwind 175 176 !0 = !{!"apsr"} 177 !1 = !{!"apsr_nzcvq"} 178 !2 = !{!"apsr_g"} 179 !3 = !{!"apsr_nzcvqg"} 180 !4 = !{!"iapsr"} 181 !5 = !{!"iapsr_nzcvq"} 182 !6 = !{!"iapsr_g"} 183 !7 = !{!"iapsr_nzcvqg"} 184 !8 = !{!"eapsr"} 185 !9 = !{!"eapsr_nzcvq"} 186 !10 = !{!"eapsr_g"} 187 !11 = !{!"eapsr_nzcvqg"} 188 !12 = !{!"xpsr"} 189 !13 = !{!"xpsr_nzcvq"} 190 !14 = !{!"xpsr_g"} 191 !15 = !{!"xpsr_nzcvqg"} 192 !16 = !{!"ipsr"} 193 !17 = !{!"epsr"} 194 !18 = !{!"iepsr"} 195 !19 = !{!"msp"} 196 !20 = !{!"psp"} 197 !21 = !{!"primask"} 198 !22 = !{!"basepri"} 199 !23 = !{!"basepri_max"} 200 !24 = !{!"faultmask"} 201 !25 = !{!"control"} 202 !26 = !{!"msplim"} 203 !27 = !{!"psplim"} 204 !28 = !{!"msp_ns"} 205 !29 = !{!"psp_ns"} 206 !30 = !{!"msplim_ns"} 207 !31 = !{!"psplim_ns"} 208 !32 = !{!"primask_ns"} 209 !33 = !{!"basepri_ns"} 210 !34 = !{!"faultmask_ns"} 211 !35 = !{!"control_ns"} 212 !36 = !{!"sp_ns"} 213 !37 = !{!"basepri_max_ns"} 214 215
