1 ; RUN: llc < %s -print-machineinstrs=expand-isel-pseudos -o /dev/null 2>&1 | FileCheck %s 2 3 ; ARM & AArch64 run an extra SimplifyCFG which disrupts this test. 4 ; Hexagon crashes (PR23377) 5 ; XFAIL: arm,aarch64 6 7 ; Make sure we have the correct weight attached to each successor. 8 define i32 @test2(i32 %x) nounwind uwtable readnone ssp { 9 ; CHECK-LABEL: Machine code for function test2: 10 entry: 11 %conv = sext i32 %x to i64 12 switch i64 %conv, label %return [ 13 i64 0, label %sw.bb 14 i64 1, label %sw.bb 15 i64 4, label %sw.bb 16 i64 5, label %sw.bb1 17 ], !prof !0 18 ; CHECK: BB#0: derived from LLVM BB %entry 19 ; CHECK: Successors according to CFG: BB#2({{[0-9a-fx/= ]+}}75.29%) BB#4({{[0-9a-fx/= ]+}}24.71%) 20 ; CHECK: BB#4: derived from LLVM BB %entry 21 ; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}47.62%) BB#5({{[0-9a-fx/= ]+}}52.38%) 22 ; CHECK: BB#5: derived from LLVM BB %entry 23 ; CHECK: Successors according to CFG: BB#1({{[0-9a-fx/= ]+}}36.36%) BB#3({{[0-9a-fx/= ]+}}63.64%) 24 25 sw.bb: 26 br label %return 27 28 sw.bb1: 29 br label %return 30 31 return: 32 %retval.0 = phi i32 [ 5, %sw.bb1 ], [ 1, %sw.bb ], [ 0, %entry ] 33 ret i32 %retval.0 34 } 35 36 !0 = !{!"branch_weights", i32 7, i32 6, i32 4, i32 4, i32 64} 37 38 39 declare void @g(i32) 40 define void @left_leaning_weight_balanced_tree(i32 %x) { 41 entry: 42 switch i32 %x, label %return [ 43 i32 0, label %bb0 44 i32 100, label %bb1 45 i32 200, label %bb2 46 i32 300, label %bb3 47 i32 400, label %bb4 48 i32 500, label %bb5 49 ], !prof !1 50 bb0: tail call void @g(i32 0) br label %return 51 bb1: tail call void @g(i32 1) br label %return 52 bb2: tail call void @g(i32 2) br label %return 53 bb3: tail call void @g(i32 3) br label %return 54 bb4: tail call void @g(i32 4) br label %return 55 bb5: tail call void @g(i32 5) br label %return 56 return: ret void 57 58 ; Check that we set branch weights on the pivot cmp instruction correctly. 59 ; Cases {0,10,20,30} go on the left with weight 13; cases {40,50} go on the 60 ; right with weight 20. 61 ; 62 ; CHECK-LABEL: Machine code for function left_leaning_weight_balanced_tree: 63 ; CHECK: BB#0: derived from LLVM BB %entry 64 ; CHECK-NOT: Successors 65 ; CHECK: Successors according to CFG: BB#8({{[0-9a-fx/= ]+}}39.71%) BB#9({{[0-9a-fx/= ]+}}60.29%) 66 } 67 68 !1 = !{!"branch_weights", 69 ; Default: 70 i32 1, 71 ; Case 0, 100, 200: 72 i32 10, i32 1, i32 1, 73 ; Case 300, 400, 500: 74 i32 1, i32 10, i32 10} 75
