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      1 ; RUN: llc -march=hexagon < %s | FileCheck %s
      2 ; RUN: llc -march=hexagon -O0 < %s | FileCheck -check-prefix=CHECK-CALL %s
      3 ; Hexagon Programmer's Reference Manual 11.2 CR
      4 
      5 ; CHECK-CALL-NOT: call
      6 
      7 ; Corner detection acceleration
      8 declare i32 @llvm.hexagon.C4.fastcorner9(i32, i32)
      9 define i32 @C4_fastcorner9(i32 %a, i32 %b) {
     10   %z = call i32 (a] llvm.hexagon.C4.fastcorner9(i32 %a, i32 %b)
     11   ret i32 %z
     12 }
     13 ; CHECK: = fastcorner9({{.*}}, {{.*}})
     14 
     15 declare i32 @llvm.hexagon.C4.fastcorner9.not(i32, i32)
     16 define i32 @C4_fastcorner9_not(i32 %a, i32 %b) {
     17   %z = call i32 (a] llvm.hexagon.C4.fastcorner9.not(i32 %a, i32 %b)
     18   ret i32 %z
     19 }
     20 ; CHECK: = !fastcorner9({{.*}}, {{.*}})
     21 
     22 ; Logical reductions on predicates
     23 declare i32 @llvm.hexagon.C2.any8(i32)
     24 define i32 @C2_any8(i32 %a) {
     25   %z = call i32 (a] llvm.hexagon.C2.any8(i32 %a)
     26   ret i32 %z
     27 }
     28 ; CHECK: = any8({{.*}})
     29 
     30 declare i32 @llvm.hexagon.C2.all8(i32)
     31 define i32 @C2_all8(i32 %a) {
     32   %z = call i32 (a] llvm.hexagon.C2.all8(i32 %a)
     33   ret i32 %z
     34 }
     35 
     36 ; CHECK: = all8({{.*}})
     37 
     38 ; Logical operations on predicates
     39 declare i32 @llvm.hexagon.C2.and(i32, i32)
     40 define i32 @C2_and(i32 %a, i32 %b) {
     41   %z = call i32 (a] llvm.hexagon.C2.and(i32 %a, i32 %b)
     42   ret i32 %z
     43 }
     44 ; CHECK: = and({{.*}}, {{.*}})
     45 
     46 declare i32 @llvm.hexagon.C4.and.and(i32, i32, i32)
     47 define i32 @C4_and_and(i32 %a, i32 %b, i32 %c) {
     48   %z = call i32 (a] llvm.hexagon.C4.and.and(i32 %a, i32 %b, i32 %c)
     49   ret i32 %z
     50 }
     51 ; CHECK: = and({{.*}}, and({{.*}}, {{.*}}))
     52 
     53 declare i32 @llvm.hexagon.C2.or(i32, i32)
     54 define i32 @C2_or(i32 %a, i32 %b) {
     55   %z = call i32 (a] llvm.hexagon.C2.or(i32 %a, i32 %b)
     56   ret i32 %z
     57 }
     58 ; CHECK: = or({{.*}}, {{.*}})
     59 
     60 declare i32 @llvm.hexagon.C4.and.or(i32, i32, i32)
     61 define i32 @C4_and_or(i32 %a, i32 %b, i32 %c) {
     62   %z = call i32 (a] llvm.hexagon.C4.and.or(i32 %a, i32 %b, i32 %c)
     63   ret i32 %z
     64 }
     65 ; CHECK: = and({{.*}}, or({{.*}}, {{.*}}))
     66 
     67 declare i32 @llvm.hexagon.C2.xor(i32, i32)
     68 define i32 @C2_xor(i32 %a, i32 %b) {
     69   %z = call i32 (a] llvm.hexagon.C2.xor(i32 %a, i32 %b)
     70   ret i32 %z
     71 }
     72 ; CHECK: = xor({{.*}}, {{.*}})
     73 
     74 declare i32 @llvm.hexagon.C4.or.and(i32, i32, i32)
     75 define i32 @C4_or_and(i32 %a, i32 %b, i32 %c) {
     76   %z = call i32 (a] llvm.hexagon.C4.or.and(i32 %a, i32 %b, i32 %c)
     77   ret i32 %z
     78 }
     79 ; CHECK: = or({{.*}}, and({{.*}}, {{.*}}))
     80 
     81 declare i32 @llvm.hexagon.C2.andn(i32, i32)
     82 define i32 @C2_andn(i32 %a, i32 %b) {
     83   %z = call i32 (a] llvm.hexagon.C2.andn(i32 %a, i32 %b)
     84   ret i32 %z
     85 }
     86 ; CHECK: = and({{.*}}, !{{.*}})
     87 
     88 declare i32 @llvm.hexagon.C4.or.or(i32, i32, i32)
     89 define i32 @C4_or_or(i32 %a, i32 %b, i32 %c) {
     90   %z = call i32 (a] llvm.hexagon.C4.or.or(i32 %a, i32 %b, i32 %c)
     91   ret i32 %z
     92 }
     93 ; CHECK: = or({{.*}}, or({{.*}}, {{.*}}))
     94 
     95 declare i32 @llvm.hexagon.C4.and.andn(i32, i32, i32)
     96 define i32 @C4_and_andn(i32 %a, i32 %b, i32 %c) {
     97   %z = call i32 (a] llvm.hexagon.C4.and.andn(i32 %a, i32 %b, i32 %c)
     98   ret i32 %z
     99 }
    100 ; CHECK: = and({{.*}}, and({{.*}}, !{{.*}}))
    101 
    102 declare i32 @llvm.hexagon.C4.and.orn(i32, i32, i32)
    103 define i32 @C4_and_orn(i32 %a, i32 %b, i32 %c) {
    104   %z = call i32 (a] llvm.hexagon.C4.and.orn(i32 %a, i32 %b, i32 %c)
    105   ret i32 %z
    106 }
    107 ; CHECK: = and({{.*}}, or({{.*}}, !{{.*}}))
    108 
    109 declare i32 @llvm.hexagon.C2.not(i32)
    110 define i32 @C2_not(i32 %a) {
    111   %z = call i32 (a] llvm.hexagon.C2.not(i32 %a)
    112   ret i32 %z
    113 }
    114 ; CHECK: = not({{.*}})
    115 
    116 declare i32 @llvm.hexagon.C4.or.andn(i32, i32, i32)
    117 define i32 @C4_or_andn(i32 %a, i32 %b, i32 %c) {
    118   %z = call i32 (a] llvm.hexagon.C4.or.andn(i32 %a, i32 %b, i32 %c)
    119   ret i32 %z
    120 }
    121 ; CHECK: = or({{.*}}, and({{.*}}, !{{.*}}))
    122 
    123 declare i32 @llvm.hexagon.C2.orn(i32, i32)
    124 define i32 @C2_orn(i32 %a, i32 %b) {
    125   %z = call i32 (a] llvm.hexagon.C2.orn(i32 %a, i32 %b)
    126   ret i32 %z
    127 }
    128 ; CHECK: = or({{.*}}, !{{.*}})
    129 
    130 declare i32 @llvm.hexagon.C4.or.orn(i32, i32, i32)
    131 define i32 @C4_or_orn(i32 %a, i32 %b, i32 %c) {
    132   %z = call i32 (a] llvm.hexagon.C4.or.orn(i32 %a, i32 %b, i32 %c)
    133   ret i32 %z
    134 }
    135 ; CHECK: = or({{.*}}, or({{.*}}, !{{.*}}))
    136