1 ; RUN: llc -march=mipsel -O0 < %s | FileCheck %s -check-prefix=None 2 ; RUN: llc -march=mipsel -relocation-model=pic < %s | \ 3 ; RUN: FileCheck %s -check-prefix=Default 4 ; RUN: llc -march=mipsel -O1 -relocation-model=static < %s | \ 5 ; RUN: FileCheck %s -check-prefix=STATICO1 6 ; RUN: llc -march=mipsel -disable-mips-df-forward-search=false \ 7 ; RUN: -relocation-model=static < %s | FileCheck %s -check-prefix=FORWARD 8 ; RUN: llc -march=mipsel -disable-mips-df-backward-search -relocation-model=pic \ 9 ; RUN: -disable-mips-df-succbb-search=false -disable-preheader-prot=true < %s | \ 10 ; RUN: FileCheck %s -check-prefix=SUCCBB 11 12 define void @foo1() nounwind { 13 entry: 14 ; Default: jalr 15 ; Default-NOT: nop 16 ; Default: jr 17 ; Default-NOT: nop 18 ; Default: .end 19 ; None: jalr 20 ; None: nop 21 ; None: jr 22 ; None: nop 23 ; None: .end 24 25 tail call void @foo2(i32 3) nounwind 26 ret void 27 } 28 29 declare void @foo2(i32) 30 31 ; Check that cvt.d.w goes into jalr's delay slot. 32 ; 33 define void @foo3(i32 %a) nounwind { 34 entry: 35 ; Default-LABEL: foo3: 36 ; Default: jalr 37 ; Default: cvt.d.w 38 39 %conv = sitofp i32 %a to double 40 tail call void @foo4(double %conv) nounwind 41 ret void 42 } 43 44 declare void @foo4(double) 45 46 @g2 = external global i32 47 @g1 = external global i32 48 @g3 = external global i32 49 50 ; Check that branch delay slot can be filled with an instruction with operand 51 ; $1. 52 ; 53 ; Default-LABEL: foo5: 54 ; Default-NOT: nop 55 56 define void @foo5(i32 %a) nounwind { 57 entry: 58 %0 = load i32, i32* @g2, align 4 59 %tobool = icmp eq i32 %a, 0 60 br i1 %tobool, label %if.else, label %if.then 61 62 if.then: 63 %1 = load i32, i32* @g1, align 4 64 %add = add nsw i32 %1, %0 65 store i32 %add, i32* @g1, align 4 66 br label %if.end 67 68 if.else: 69 %2 = load i32, i32* @g3, align 4 70 %sub = sub nsw i32 %2, %0 71 store i32 %sub, i32* @g3, align 4 72 br label %if.end 73 74 if.end: 75 ret void 76 } 77 78 ; Check that delay slot filler can place mov.s or mov.d in delay slot. 79 ; 80 ; Default-LABEL: foo6: 81 ; Default-NOT: nop 82 ; Default: .end foo6 83 84 define void @foo6(float %a0, double %a1) nounwind { 85 entry: 86 tail call void @foo7(double %a1, float %a0) nounwind 87 ret void 88 } 89 90 declare void @foo7(double, float) 91 92 ; Check that a store can move past other memory instructions. 93 ; 94 ; STATICO1-LABEL: foo8: 95 ; STATICO1: jalr ${{[0-9]+}} 96 ; STATICO1-NEXT: sw ${{[0-9]+}}, %lo(g1) 97 98 @foo9 = common global void ()* null, align 4 99 100 define i32 @foo8(i32 %a) nounwind { 101 entry: 102 store i32 %a, i32* @g1, align 4 103 %0 = load void ()*, void ()** @foo9, align 4 104 tail call void %0() nounwind 105 %1 = load i32, i32* @g1, align 4 106 %add = add nsw i32 %1, %a 107 ret i32 %add 108 } 109 110 ; Test searchForward. Check that the second jal's slot is filled with another 111 ; instruction in the same block. 112 ; 113 ; FORWARD-LABEL: foo10: 114 ; FORWARD: jal foo11 115 ; FORWARD: jal foo11 116 ; FORWARD-NOT: nop 117 ; FORWARD: end foo10 118 119 define void @foo10() nounwind { 120 entry: 121 tail call void @foo11() nounwind 122 tail call void @foo11() nounwind 123 store i32 0, i32* @g1, align 4 124 tail call void @foo11() nounwind 125 store i32 0, i32* @g1, align 4 126 ret void 127 } 128 129 declare void @foo11() 130 131 ; Check that delay slots of branches in both the entry block and loop body are 132 ; filled. 133 ; 134 ; SUCCBB-LABEL: succbbs_loop1: 135 ; SUCCBB: blez $5, $BB 136 ; SUCCBB-NEXT: addiu 137 ; SUCCBB: bnez ${{[0-9]+}}, $BB 138 ; SUCCBB-NEXT: addiu 139 140 define i32 @succbbs_loop1(i32* nocapture %a, i32 %n) { 141 entry: 142 %cmp4 = icmp sgt i32 %n, 0 143 br i1 %cmp4, label %for.body, label %for.end 144 145 for.body: ; preds = %entry, %for.body 146 %s.06 = phi i32 [ %add, %for.body ], [ 0, %entry ] 147 %i.05 = phi i32 [ %inc, %for.body ], [ 0, %entry ] 148 %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.05 149 %0 = load i32, i32* %arrayidx, align 4 150 %add = add nsw i32 %0, %s.06 151 %inc = add nsw i32 %i.05, 1 152 %exitcond = icmp eq i32 %inc, %n 153 br i1 %exitcond, label %for.end, label %for.body 154 155 for.end: ; preds = %for.body, %entry 156 %s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ] 157 ret i32 %s.0.lcssa 158 } 159 160 ; Check that the first branch has its slot filled. 161 ; 162 ; SUCCBB-LABEL: succbbs_br1: 163 ; SUCCBB: beqz ${{[0-9]+}}, $BB 164 ; SUCCBB-NEXT: lw ${{[0-9]+}}, %got(foo101)(${{[0-9]+}}) 165 166 define internal fastcc void @foo101() { 167 entry: 168 tail call void @foo100() 169 tail call void @foo100() 170 ret void 171 } 172 173 define void @succbbs_br1(i32 %a) { 174 entry: 175 %tobool = icmp eq i32 %a, 0 176 br i1 %tobool, label %if.end, label %if.then 177 178 if.then: ; preds = %entry 179 tail call fastcc void @foo101() 180 br label %if.end 181 182 if.end: ; preds = %entry, %if.then 183 ret void 184 } 185 186 declare void @foo100() 187
