1 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,FCC,32-FCC 2 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,FCC,32-FCC 3 ; RUN: llc < %s -march=mipsel -mcpu=mips32r6 -relocation-model=pic | FileCheck %s -check-prefixes=ALL,GPR,32-GPR 4 ; RUN: llc < %s -march=mips64el -mcpu=mips64 | FileCheck %s -check-prefixes=ALL,FCC,64-FCC 5 ; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefixes=ALL,FCC,64-FCC 6 ; RUN: llc < %s -march=mips64el -mcpu=mips64r6 | FileCheck %s -check-prefixes=ALL,GPR,64-GPR 7 8 define void @func0(float %f2, float %f3) nounwind { 9 entry: 10 ; ALL-LABEL: func0: 11 12 ; 32-FCC: c.eq.s $f12, $f14 13 ; 64-FCC: c.eq.s $f12, $f13 14 ; FCC: bc1f $BB0_2 15 16 ; 32-GPR: cmp.eq.s $[[FGRCC:f[0-9]+]], $f12, $f14 17 ; 64-GPR: cmp.eq.s $[[FGRCC:f[0-9]+]], $f12, $f13 18 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 19 ; FIXME: We ought to be able to transform not+bnez -> beqz 20 ; GPR: not $[[GPRCC]], $[[GPRCC]] 21 ; 32-GPR: bnez $[[GPRCC]], $BB0_2 22 ; 64-GPR: bnezc $[[GPRCC]], $BB0_2 23 24 %cmp = fcmp oeq float %f2, %f3 25 br i1 %cmp, label %if.then, label %if.else 26 27 if.then: ; preds = %entry 28 tail call void (...) @g0() nounwind 29 br label %if.end 30 31 if.else: ; preds = %entry 32 tail call void (...) @g1() nounwind 33 br label %if.end 34 35 if.end: ; preds = %if.else, %if.then 36 ret void 37 } 38 39 declare void @g0(...) 40 41 declare void @g1(...) 42 43 define void @func1(float %f2, float %f3) nounwind { 44 entry: 45 ; ALL-LABEL: func1: 46 47 ; 32-FCC: c.olt.s $f12, $f14 48 ; 64-FCC: c.olt.s $f12, $f13 49 ; FCC: bc1f $BB1_2 50 51 ; 32-GPR: cmp.ule.s $[[FGRCC:f[0-9]+]], $f14, $f12 52 ; 64-GPR: cmp.ule.s $[[FGRCC:f[0-9]+]], $f13, $f12 53 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 54 ; GPR-NOT: not $[[GPRCC]], $[[GPRCC]] 55 ; 32-GPR: bnez $[[GPRCC]], $BB1_2 56 ; 64-GPR: bnezc $[[GPRCC]], $BB1_2 57 58 %cmp = fcmp olt float %f2, %f3 59 br i1 %cmp, label %if.then, label %if.else 60 61 if.then: ; preds = %entry 62 tail call void (...) @g0() nounwind 63 br label %if.end 64 65 if.else: ; preds = %entry 66 tail call void (...) @g1() nounwind 67 br label %if.end 68 69 if.end: ; preds = %if.else, %if.then 70 ret void 71 } 72 73 define void @func2(float %f2, float %f3) nounwind { 74 entry: 75 ; ALL-LABEL: func2: 76 77 ; 32-FCC: c.ole.s $f12, $f14 78 ; 64-FCC: c.ole.s $f12, $f13 79 ; FCC: bc1t $BB2_2 80 81 ; 32-GPR: cmp.ult.s $[[FGRCC:f[0-9]+]], $f14, $f12 82 ; 64-GPR: cmp.ult.s $[[FGRCC:f[0-9]+]], $f13, $f12 83 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 84 ; GPR-NOT: not $[[GPRCC]], $[[GPRCC]] 85 ; 32-GPR: beqz $[[GPRCC]], $BB2_2 86 ; 64-GPR: beqzc $[[GPRCC]], $BB2_2 87 88 %cmp = fcmp ugt float %f2, %f3 89 br i1 %cmp, label %if.else, label %if.then 90 91 if.then: ; preds = %entry 92 tail call void (...) @g0() nounwind 93 br label %if.end 94 95 if.else: ; preds = %entry 96 tail call void (...) @g1() nounwind 97 br label %if.end 98 99 if.end: ; preds = %if.else, %if.then 100 ret void 101 } 102 103 define void @func3(double %f2, double %f3) nounwind { 104 entry: 105 ; ALL-LABEL: func3: 106 107 ; 32-FCC: c.eq.d $f12, $f14 108 ; 64-FCC: c.eq.d $f12, $f13 109 ; FCC: bc1f $BB3_2 110 111 ; 32-GPR: cmp.eq.d $[[FGRCC:f[0-9]+]], $f12, $f14 112 ; 64-GPR: cmp.eq.d $[[FGRCC:f[0-9]+]], $f12, $f13 113 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 114 ; FIXME: We ought to be able to transform not+bnez -> beqz 115 ; GPR: not $[[GPRCC]], $[[GPRCC]] 116 ; 32-GPR: bnez $[[GPRCC]], $BB3_2 117 ; 64-GPR: bnezc $[[GPRCC]], $BB3_2 118 119 %cmp = fcmp oeq double %f2, %f3 120 br i1 %cmp, label %if.then, label %if.else 121 122 if.then: ; preds = %entry 123 tail call void (...) @g0() nounwind 124 br label %if.end 125 126 if.else: ; preds = %entry 127 tail call void (...) @g1() nounwind 128 br label %if.end 129 130 if.end: ; preds = %if.else, %if.then 131 ret void 132 } 133 134 define void @func4(double %f2, double %f3) nounwind { 135 entry: 136 ; ALL-LABEL: func4: 137 138 ; 32-FCC: c.olt.d $f12, $f14 139 ; 64-FCC: c.olt.d $f12, $f13 140 ; FCC: bc1f $BB4_2 141 142 ; 32-GPR: cmp.ule.d $[[FGRCC:f[0-9]+]], $f14, $f12 143 ; 64-GPR: cmp.ule.d $[[FGRCC:f[0-9]+]], $f13, $f12 144 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 145 ; GPR-NOT: not $[[GPRCC]], $[[GPRCC]] 146 ; 32-GPR: bnez $[[GPRCC]], $BB4_2 147 ; 64-GPR: bnezc $[[GPRCC]], $BB4_2 148 149 %cmp = fcmp olt double %f2, %f3 150 br i1 %cmp, label %if.then, label %if.else 151 152 if.then: ; preds = %entry 153 tail call void (...) @g0() nounwind 154 br label %if.end 155 156 if.else: ; preds = %entry 157 tail call void (...) @g1() nounwind 158 br label %if.end 159 160 if.end: ; preds = %if.else, %if.then 161 ret void 162 } 163 164 define void @func5(double %f2, double %f3) nounwind { 165 entry: 166 ; ALL-LABEL: func5: 167 168 ; 32-FCC: c.ole.d $f12, $f14 169 ; 64-FCC: c.ole.d $f12, $f13 170 ; FCC: bc1t $BB5_2 171 172 ; 32-GPR: cmp.ult.d $[[FGRCC:f[0-9]+]], $f14, $f12 173 ; 64-GPR: cmp.ult.d $[[FGRCC:f[0-9]+]], $f13, $f12 174 ; GPR: mfc1 $[[GPRCC:[0-9]+]], $[[FGRCC:f[0-9]+]] 175 ; GPR-NOT: not $[[GPRCC]], $[[GPRCC]] 176 ; 32-GPR: beqz $[[GPRCC]], $BB5_2 177 ; 64-GPR: beqzc $[[GPRCC]], $BB5_2 178 179 %cmp = fcmp ugt double %f2, %f3 180 br i1 %cmp, label %if.else, label %if.then 181 182 if.then: ; preds = %entry 183 tail call void (...) @g0() nounwind 184 br label %if.end 185 186 if.else: ; preds = %entry 187 tail call void (...) @g1() nounwind 188 br label %if.end 189 190 if.end: ; preds = %if.else, %if.then 191 ret void 192 } 193
