1 ; Check the vctlz* instructions that were added in P8 2 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s 3 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s 4 5 declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>) nounwind readnone 6 declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>) nounwind readnone 7 declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>) nounwind readnone 8 declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>) nounwind readnone 9 10 define <16 x i8> @test_v16i8(<16 x i8> %x) nounwind readnone { 11 %vcnt = tail call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %x) 12 ret <16 x i8> %vcnt 13 ; CHECK: @test_v16i8 14 ; CHECK: vclzb 2, 2 15 ; CHECK: blr 16 } 17 18 define <8 x i16> @test_v8i16(<8 x i16> %x) nounwind readnone { 19 %vcnt = tail call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %x) 20 ret <8 x i16> %vcnt 21 ; CHECK: @test_v8i16 22 ; CHECK: vclzh 2, 2 23 ; CHECK: blr 24 } 25 26 define <4 x i32> @test_v4i32(<4 x i32> %x) nounwind readnone { 27 %vcnt = tail call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %x) 28 ret <4 x i32> %vcnt 29 ; CHECK: @test_v4i32 30 ; CHECK: vclzw 2, 2 31 ; CHECK: blr 32 } 33 34 define <2 x i64> @test_v2i64(<2 x i64> %x) nounwind readnone { 35 %vcnt = tail call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %x) 36 ret <2 x i64> %vcnt 37 ; CHECK: @test_v2i64 38 ; CHECK: vclzd 2, 2 39 ; CHECK: blr 40 } 41
