1 ; Check the vector multiply even/odd word instructions that were added in P8 2 ; 3 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s 4 ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s 5 6 declare <2 x i64> @llvm.ppc.altivec.vmuleuw(<4 x i32>, <4 x i32>) nounwind readnone 7 declare <2 x i64> @llvm.ppc.altivec.vmulesw(<4 x i32>, <4 x i32>) nounwind readnone 8 declare <2 x i64> @llvm.ppc.altivec.vmulouw(<4 x i32>, <4 x i32>) nounwind readnone 9 declare <2 x i64> @llvm.ppc.altivec.vmulosw(<4 x i32>, <4 x i32>) nounwind readnone 10 declare <4 x i32> @llvm.ppc.altivec.vmuluwm(<4 x i32>, <4 x i32>) nounwind readnone 11 12 define <2 x i64> @test_vmuleuw(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 13 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmuleuw(<4 x i32> %x, <4 x i32> %y) 14 ret <2 x i64> %tmp 15 ; CHECK: vmuleuw 2, 2, 3 16 } 17 18 define <2 x i64> @test_vmulesw(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 19 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmulesw(<4 x i32> %x, <4 x i32> %y) 20 ret <2 x i64> %tmp 21 ; CHECK: vmulesw 2, 2, 3 22 } 23 24 define <2 x i64> @test_vmulouw(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 25 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmulouw(<4 x i32> %x, <4 x i32> %y) 26 ret <2 x i64> %tmp 27 ; CHECK: vmulouw 2, 2, 3 28 } 29 30 define <2 x i64> @test_vmulosw(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 31 %tmp = tail call <2 x i64> @llvm.ppc.altivec.vmulosw(<4 x i32> %x, <4 x i32> %y) 32 ret <2 x i64> %tmp 33 ; CHECK: vmulosw 2, 2, 3 34 } 35 36 define <4 x i32> @test_vmuluwm(<4 x i32> %x, <4 x i32> %y) nounwind readnone { 37 %tmp = mul <4 x i32> %x, %y 38 ret <4 x i32> %tmp 39 ; CHECK-LABEL: test_vmuluwm 40 ; CHECK: vmuluwm 2, 2, 3 41 } 42 43
