1 ; RUN: opt < %s -instcombine -S | FileCheck %s 2 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 3 4 define i16 @test1(float %f) { 5 entry: 6 ; CHECK-LABEL: @test1( 7 ; CHECK: fmul float 8 ; CHECK-NOT: insertelement {{.*}} 0.00 9 ; CHECK-NOT: call {{.*}} @llvm.x86.sse.mul 10 ; CHECK-NOT: call {{.*}} @llvm.x86.sse.sub 11 ; CHECK: ret 12 %tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1] 13 %tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1] 14 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1] 15 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1] 16 %tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] 17 %tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] 18 %tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1] 19 %tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1] 20 %tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1] 21 %tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1] 22 ret i16 %tmp69 23 } 24 25 define i32 @test2(float %f) { 26 ; CHECK-LABEL: @test2( 27 ; CHECK-NOT: insertelement 28 ; CHECK-NOT: extractelement 29 ; CHECK: ret 30 %tmp5 = fmul float %f, %f 31 %tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0 32 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1 33 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 34 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 35 %tmp19 = bitcast <4 x float> %tmp12 to <4 x i32> 36 %tmp21 = extractelement <4 x i32> %tmp19, i32 0 37 ret i32 %tmp21 38 } 39 40 define i64 @test3(float %f, double %d) { 41 ; CHECK-LABEL: @test3( 42 ; CHECK-NOT: insertelement {{.*}} 0.00 43 ; CHECK: ret 44 entry: 45 %v00 = insertelement <4 x float> undef, float %f, i32 0 46 %v01 = insertelement <4 x float> %v00, float 0.000000e+00, i32 1 47 %v02 = insertelement <4 x float> %v01, float 0.000000e+00, i32 2 48 %v03 = insertelement <4 x float> %v02, float 0.000000e+00, i32 3 49 %tmp0 = tail call i32 @llvm.x86.sse.cvtss2si(<4 x float> %v03) 50 %v10 = insertelement <4 x float> undef, float %f, i32 0 51 %v11 = insertelement <4 x float> %v10, float 0.000000e+00, i32 1 52 %v12 = insertelement <4 x float> %v11, float 0.000000e+00, i32 2 53 %v13 = insertelement <4 x float> %v12, float 0.000000e+00, i32 3 54 %tmp1 = tail call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %v13) 55 %v20 = insertelement <4 x float> undef, float %f, i32 0 56 %v21 = insertelement <4 x float> %v20, float 0.000000e+00, i32 1 57 %v22 = insertelement <4 x float> %v21, float 0.000000e+00, i32 2 58 %v23 = insertelement <4 x float> %v22, float 0.000000e+00, i32 3 59 %tmp2 = tail call i32 @llvm.x86.sse.cvttss2si(<4 x float> %v23) 60 %v30 = insertelement <4 x float> undef, float %f, i32 0 61 %v31 = insertelement <4 x float> %v30, float 0.000000e+00, i32 1 62 %v32 = insertelement <4 x float> %v31, float 0.000000e+00, i32 2 63 %v33 = insertelement <4 x float> %v32, float 0.000000e+00, i32 3 64 %tmp3 = tail call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %v33) 65 %v40 = insertelement <2 x double> undef, double %d, i32 0 66 %v41 = insertelement <2 x double> %v40, double 0.000000e+00, i32 1 67 %tmp4 = tail call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %v41) 68 %v50 = insertelement <2 x double> undef, double %d, i32 0 69 %v51 = insertelement <2 x double> %v50, double 0.000000e+00, i32 1 70 %tmp5 = tail call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %v51) 71 %v60 = insertelement <2 x double> undef, double %d, i32 0 72 %v61 = insertelement <2 x double> %v60, double 0.000000e+00, i32 1 73 %tmp6 = tail call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %v61) 74 %v70 = insertelement <2 x double> undef, double %d, i32 0 75 %v71 = insertelement <2 x double> %v70, double 0.000000e+00, i32 1 76 %tmp7 = tail call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %v71) 77 %tmp8 = add i32 %tmp0, %tmp2 78 %tmp9 = add i32 %tmp4, %tmp6 79 %tmp10 = add i32 %tmp8, %tmp9 80 %tmp11 = sext i32 %tmp10 to i64 81 %tmp12 = add i64 %tmp1, %tmp3 82 %tmp13 = add i64 %tmp5, %tmp7 83 %tmp14 = add i64 %tmp12, %tmp13 84 %tmp15 = add i64 %tmp11, %tmp14 85 ret i64 %tmp15 86 } 87 88 define void @get_image() nounwind { 89 ; CHECK-LABEL: @get_image( 90 ; CHECK-NOT: extractelement 91 ; CHECK: unreachable 92 entry: 93 %0 = call i32 @fgetc(i8* null) nounwind ; <i32> [#uses=1] 94 %1 = trunc i32 %0 to i8 ; <i8> [#uses=1] 95 %tmp2 = insertelement <100 x i8> zeroinitializer, i8 %1, i32 1 ; <<100 x i8>> [#uses=1] 96 %tmp1 = extractelement <100 x i8> %tmp2, i32 0 ; <i8> [#uses=1] 97 %2 = icmp eq i8 %tmp1, 80 ; <i1> [#uses=1] 98 br i1 %2, label %bb2, label %bb3 99 100 bb2: ; preds = %entry 101 br label %bb3 102 103 bb3: ; preds = %bb2, %entry 104 unreachable 105 } 106 107 ; PR4340 108 define void @vac(<4 x float>* nocapture %a) nounwind { 109 ; CHECK-LABEL: @vac( 110 ; CHECK-NOT: load 111 ; CHECK: ret 112 entry: 113 %tmp1 = load <4 x float>, <4 x float>* %a ; <<4 x float>> [#uses=1] 114 %vecins = insertelement <4 x float> %tmp1, float 0.000000e+00, i32 0 ; <<4 x float>> [#uses=1] 115 %vecins4 = insertelement <4 x float> %vecins, float 0.000000e+00, i32 1; <<4 x float>> [#uses=1] 116 %vecins6 = insertelement <4 x float> %vecins4, float 0.000000e+00, i32 2; <<4 x float>> [#uses=1] 117 %vecins8 = insertelement <4 x float> %vecins6, float 0.000000e+00, i32 3; <<4 x float>> [#uses=1] 118 store <4 x float> %vecins8, <4 x float>* %a 119 ret void 120 } 121 122 declare i32 @fgetc(i8*) 123 124 declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) 125 126 declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) 127 128 declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) 129 130 declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) 131 132 declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) 133 declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) 134 declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) 135 declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) 136 declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) 137 declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) 138 declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) 139 declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) 140 141 define <4 x float> @dead_shuffle_elt(<4 x float> %x, <2 x float> %y) nounwind { 142 entry: 143 ; CHECK-LABEL: define <4 x float> @dead_shuffle_elt( 144 ; CHECK: shufflevector <2 x float> %y, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> 145 %shuffle.i = shufflevector <2 x float> %y, <2 x float> %y, <4 x i32> <i32 0, i32 1, i32 0, i32 1> 146 %shuffle9.i = shufflevector <4 x float> %x, <4 x float> %shuffle.i, <4 x i32> <i32 4, i32 5, i32 2, i32 3> 147 ret <4 x float> %shuffle9.i 148 } 149 150 define <2 x float> @test_fptrunc(double %f) { 151 ; CHECK-LABEL: @test_fptrunc( 152 ; CHECK: insertelement 153 ; CHECK: insertelement 154 ; CHECK-NOT: insertelement 155 %tmp9 = insertelement <4 x double> undef, double %f, i32 0 156 %tmp10 = insertelement <4 x double> %tmp9, double 0.000000e+00, i32 1 157 %tmp11 = insertelement <4 x double> %tmp10, double 0.000000e+00, i32 2 158 %tmp12 = insertelement <4 x double> %tmp11, double 0.000000e+00, i32 3 159 %tmp5 = fptrunc <4 x double> %tmp12 to <4 x float> 160 %ret = shufflevector <4 x float> %tmp5, <4 x float> undef, <2 x i32> <i32 0, i32 1> 161 ret <2 x float> %ret 162 } 163 164 define <2 x double> @test_fpext(float %f) { 165 ; CHECK-LABEL: @test_fpext( 166 ; CHECK: insertelement 167 ; CHECK: insertelement 168 ; CHECK-NOT: insertelement 169 %tmp9 = insertelement <4 x float> undef, float %f, i32 0 170 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1 171 %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 172 %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 173 %tmp5 = fpext <4 x float> %tmp12 to <4 x double> 174 %ret = shufflevector <4 x double> %tmp5, <4 x double> undef, <2 x i32> <i32 0, i32 1> 175 ret <2 x double> %ret 176 } 177 178 define <4 x float> @test_select(float %f, float %g) { 179 ; CHECK-LABEL: @test_select( 180 ; CHECK: %a0 = insertelement <4 x float> undef, float %f, i32 0 181 ; CHECK-NOT: insertelement 182 ; CHECK: %a3 = insertelement <4 x float> %a0, float 3.000000e+00, i32 3 183 ; CHECK-NOT: insertelement 184 ; CHECK: %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> <float undef, float 4.000000e+00, float 5.000000e+00, float undef> 185 %a0 = insertelement <4 x float> undef, float %f, i32 0 186 %a1 = insertelement <4 x float> %a0, float 1.000000e+00, i32 1 187 %a2 = insertelement <4 x float> %a1, float 2.000000e+00, i32 2 188 %a3 = insertelement <4 x float> %a2, float 3.000000e+00, i32 3 189 %b0 = insertelement <4 x float> undef, float %g, i32 0 190 %b1 = insertelement <4 x float> %b0, float 4.000000e+00, i32 1 191 %b2 = insertelement <4 x float> %b1, float 5.000000e+00, i32 2 192 %b3 = insertelement <4 x float> %b2, float 6.000000e+00, i32 3 193 %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> %b3 194 ret <4 x float> %ret 195 } 196 197 define <2 x i64> @PR24922(<2 x i64> %v) { 198 ; CHECK-LABEL: @PR24922 199 ; CHECK: select <2 x i1> 200 ; 201 ; Check that instcombine doesn't wrongly fold the select statement into a 202 ; ret <2 x i64> %v 203 ; 204 ; FIXME: We should be able to simplify the ConstantExpr in the select mask. 205 entry: 206 %result = select <2 x i1> <i1 icmp eq (i64 extractelement (<2 x i64> bitcast (<4 x i32> <i32 15, i32 15, i32 15, i32 15> to <2 x i64>), i64 0), i64 0), i1 true>, <2 x i64> %v, <2 x i64> zeroinitializer 207 ret <2 x i64> %result 208 } 209
