1 /************************************************************************** 2 * 3 * Copyright 2003 VMware, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #include "pipe/p_context.h" 29 #include "pipe/p_state.h" 30 31 #include "i915_state_inlines.h" 32 #include "i915_context.h" 33 #include "i915_reg.h" 34 #include "i915_state.h" 35 #include "i915_resource.h" 36 37 38 /* 39 * A note about min_lod & max_lod. 40 * 41 * There is a circular dependancy between the sampler state 42 * and the map state to be submitted to hw. 43 * 44 * Two condition must be meet: 45 * min_lod =< max_lod == true 46 * max_lod =< last_level == true 47 * 48 * 49 * This is all fine and dandy if it were for the fact that max_lod 50 * is set on the map state instead of the sampler state. That is 51 * the max_lod we submit on map is: 52 * max_lod = MIN2(last_level, max_lod); 53 * 54 * So we need to update the map state when we change samplers and 55 * we need to change the sampler state when map state is changed. 56 * The first part is done by calling update_texture in update_samplers 57 * and the second part is done else where in code tracking the state 58 * changes. 59 */ 60 61 static void update_map(struct i915_context *i915, 62 uint unit, 63 const struct i915_texture *tex, 64 const struct i915_sampler_state *sampler, 65 const struct pipe_sampler_view* view, 66 uint state[3]); 67 68 69 70 /*********************************************************************** 71 * Samplers 72 */ 73 74 /** 75 * Compute i915 texture sampling state. 76 * 77 * Recalculate all state from scratch. Perhaps not the most 78 * efficient, but this has gotten complex enough that we need 79 * something which is understandable and reliable. 80 * \param state returns the 3 words of compute state 81 */ 82 static void update_sampler(struct i915_context *i915, 83 uint unit, 84 const struct i915_sampler_state *sampler, 85 const struct i915_texture *tex, 86 unsigned state[3]) 87 { 88 const struct pipe_resource *pt = &tex->b.b; 89 unsigned minlod, lastlod; 90 91 state[0] = sampler->state[0]; 92 state[1] = sampler->state[1]; 93 state[2] = sampler->state[2]; 94 95 if (pt->format == PIPE_FORMAT_UYVY || 96 pt->format == PIPE_FORMAT_YUYV) 97 state[0] |= SS2_COLORSPACE_CONVERSION; 98 99 if (pt->format == PIPE_FORMAT_B8G8R8A8_SRGB || 100 pt->format == PIPE_FORMAT_L8_SRGB ) 101 state[0] |= SS2_REVERSE_GAMMA_ENABLE; 102 103 /* 3D textures don't seem to respect the border color. 104 * Fallback if there's ever a danger that they might refer to 105 * it. 106 * 107 * Effectively this means fallback on 3D clamp or 108 * clamp_to_border. 109 * 110 * XXX: Check if this is true on i945. 111 * XXX: Check if this bug got fixed in release silicon. 112 */ 113 #if 0 114 { 115 const unsigned ws = sampler->templ->wrap_s; 116 const unsigned wt = sampler->templ->wrap_t; 117 const unsigned wr = sampler->templ->wrap_r; 118 if (pt->target == PIPE_TEXTURE_3D && 119 (sampler->templ->min_img_filter != PIPE_TEX_FILTER_NEAREST || 120 sampler->templ->mag_img_filter != PIPE_TEX_FILTER_NEAREST) && 121 (ws == PIPE_TEX_WRAP_CLAMP || 122 wt == PIPE_TEX_WRAP_CLAMP || 123 wr == PIPE_TEX_WRAP_CLAMP || 124 ws == PIPE_TEX_WRAP_CLAMP_TO_BORDER || 125 wt == PIPE_TEX_WRAP_CLAMP_TO_BORDER || 126 wr == PIPE_TEX_WRAP_CLAMP_TO_BORDER)) { 127 if (i915->conformance_mode > 0) { 128 assert(0); 129 /* sampler->fallback = true; */ 130 /* TODO */ 131 } 132 } 133 } 134 #endif 135 136 /* See note at the top of file */ 137 minlod = sampler->minlod; 138 lastlod = pt->last_level << 4; 139 140 if (lastlod < minlod) { 141 minlod = lastlod; 142 } 143 144 state[1] |= (sampler->minlod << SS3_MIN_LOD_SHIFT); 145 state[1] |= (unit << SS3_TEXTUREMAP_INDEX_SHIFT); 146 } 147 148 static void update_samplers(struct i915_context *i915) 149 { 150 uint unit; 151 152 i915->current.sampler_enable_nr = 0; 153 i915->current.sampler_enable_flags = 0x0; 154 155 for (unit = 0; unit < i915->num_fragment_sampler_views && unit < i915->num_samplers; 156 unit++) { 157 /* determine unit enable/disable by looking for a bound texture */ 158 /* could also examine the fragment program? */ 159 if (i915->fragment_sampler_views[unit]) { 160 struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture); 161 162 update_sampler(i915, 163 unit, 164 i915->fragment_sampler[unit], /* sampler state */ 165 texture, /* texture */ 166 i915->current.sampler[unit]); /* the result */ 167 update_map(i915, 168 unit, 169 texture, /* texture */ 170 i915->fragment_sampler[unit], /* sampler state */ 171 i915->fragment_sampler_views[unit], /* sampler view */ 172 i915->current.texbuffer[unit]); /* the result */ 173 174 i915->current.sampler_enable_nr++; 175 i915->current.sampler_enable_flags |= (1 << unit); 176 } 177 } 178 179 i915->hardware_dirty |= I915_HW_SAMPLER | I915_HW_MAP; 180 } 181 182 struct i915_tracked_state i915_hw_samplers = { 183 "samplers", 184 update_samplers, 185 I915_NEW_SAMPLER | I915_NEW_SAMPLER_VIEW 186 }; 187 188 189 /*********************************************************************** 190 * Sampler views 191 */ 192 193 static uint translate_texture_format(enum pipe_format pipeFormat, 194 const struct pipe_sampler_view* view) 195 { 196 if ( (view->swizzle_r != PIPE_SWIZZLE_X || 197 view->swizzle_g != PIPE_SWIZZLE_Y || 198 view->swizzle_b != PIPE_SWIZZLE_Z || 199 view->swizzle_a != PIPE_SWIZZLE_W ) && 200 pipeFormat != PIPE_FORMAT_Z24_UNORM_S8_UINT && 201 pipeFormat != PIPE_FORMAT_Z24X8_UNORM ) 202 debug_printf("i915: unsupported texture swizzle for format %d\n", pipeFormat); 203 204 switch (pipeFormat) { 205 case PIPE_FORMAT_L8_UNORM: 206 return MAPSURF_8BIT | MT_8BIT_L8; 207 case PIPE_FORMAT_I8_UNORM: 208 return MAPSURF_8BIT | MT_8BIT_I8; 209 case PIPE_FORMAT_A8_UNORM: 210 return MAPSURF_8BIT | MT_8BIT_A8; 211 case PIPE_FORMAT_L8A8_UNORM: 212 return MAPSURF_16BIT | MT_16BIT_AY88; 213 case PIPE_FORMAT_B5G6R5_UNORM: 214 return MAPSURF_16BIT | MT_16BIT_RGB565; 215 case PIPE_FORMAT_B5G5R5A1_UNORM: 216 return MAPSURF_16BIT | MT_16BIT_ARGB1555; 217 case PIPE_FORMAT_B4G4R4A4_UNORM: 218 return MAPSURF_16BIT | MT_16BIT_ARGB4444; 219 case PIPE_FORMAT_B10G10R10A2_UNORM: 220 return MAPSURF_32BIT | MT_32BIT_ARGB2101010; 221 case PIPE_FORMAT_B8G8R8A8_UNORM: 222 case PIPE_FORMAT_B8G8R8A8_SRGB: 223 return MAPSURF_32BIT | MT_32BIT_ARGB8888; 224 case PIPE_FORMAT_B8G8R8X8_UNORM: 225 return MAPSURF_32BIT | MT_32BIT_XRGB8888; 226 case PIPE_FORMAT_R8G8B8A8_UNORM: 227 return MAPSURF_32BIT | MT_32BIT_ABGR8888; 228 case PIPE_FORMAT_R8G8B8X8_UNORM: 229 return MAPSURF_32BIT | MT_32BIT_XBGR8888; 230 case PIPE_FORMAT_YUYV: 231 return (MAPSURF_422 | MT_422_YCRCB_NORMAL); 232 case PIPE_FORMAT_UYVY: 233 return (MAPSURF_422 | MT_422_YCRCB_SWAPY); 234 #if 0 235 case PIPE_FORMAT_RGB_FXT1: 236 case PIPE_FORMAT_RGBA_FXT1: 237 return (MAPSURF_COMPRESSED | MT_COMPRESS_FXT1); 238 #endif 239 case PIPE_FORMAT_Z16_UNORM: 240 return (MAPSURF_16BIT | MT_16BIT_L16); 241 case PIPE_FORMAT_DXT1_RGBA: 242 case PIPE_FORMAT_DXT1_RGB: 243 return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT1); 244 case PIPE_FORMAT_DXT3_RGBA: 245 return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT2_3); 246 case PIPE_FORMAT_DXT5_RGBA: 247 return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5); 248 case PIPE_FORMAT_Z24_UNORM_S8_UINT: 249 case PIPE_FORMAT_Z24X8_UNORM: 250 { 251 if ( view->swizzle_r == PIPE_SWIZZLE_X && 252 view->swizzle_g == PIPE_SWIZZLE_X && 253 view->swizzle_b == PIPE_SWIZZLE_X && 254 view->swizzle_a == PIPE_SWIZZLE_1) 255 return (MAPSURF_32BIT | MT_32BIT_xA824); 256 if ( view->swizzle_r == PIPE_SWIZZLE_X && 257 view->swizzle_g == PIPE_SWIZZLE_X && 258 view->swizzle_b == PIPE_SWIZZLE_X && 259 view->swizzle_a == PIPE_SWIZZLE_X) 260 return (MAPSURF_32BIT | MT_32BIT_xI824); 261 if ( view->swizzle_r == PIPE_SWIZZLE_0 && 262 view->swizzle_g == PIPE_SWIZZLE_0 && 263 view->swizzle_b == PIPE_SWIZZLE_0 && 264 view->swizzle_a == PIPE_SWIZZLE_X) 265 return (MAPSURF_32BIT | MT_32BIT_xL824); 266 debug_printf("i915: unsupported depth swizzle %d %d %d %d\n", 267 view->swizzle_r, 268 view->swizzle_g, 269 view->swizzle_b, 270 view->swizzle_a); 271 return (MAPSURF_32BIT | MT_32BIT_xL824); 272 } 273 default: 274 debug_printf("i915: translate_texture_format() bad image format %x\n", 275 pipeFormat); 276 assert(0); 277 return 0; 278 } 279 } 280 281 static inline uint32_t 282 ms3_tiling_bits(enum i915_winsys_buffer_tile tiling) 283 { 284 uint32_t tiling_bits = 0; 285 286 switch (tiling) { 287 case I915_TILE_Y: 288 tiling_bits |= MS3_TILE_WALK_Y; 289 case I915_TILE_X: 290 tiling_bits |= MS3_TILED_SURFACE; 291 case I915_TILE_NONE: 292 break; 293 } 294 295 return tiling_bits; 296 } 297 298 static void update_map(struct i915_context *i915, 299 uint unit, 300 const struct i915_texture *tex, 301 const struct i915_sampler_state *sampler, 302 const struct pipe_sampler_view* view, 303 uint state[3]) 304 { 305 const struct pipe_resource *pt = &tex->b.b; 306 uint width = pt->width0, height = pt->height0, depth = pt->depth0; 307 int first_level = view->u.tex.first_level; 308 const uint num_levels = pt->last_level - first_level; 309 unsigned max_lod = num_levels * 4; 310 bool is_npot = (!util_is_power_of_two(pt->width0) || !util_is_power_of_two(pt->height0)); 311 uint format, pitch; 312 313 /* 314 * This is a bit messy. i915 doesn't support NPOT with mipmaps, but we can 315 * still texture from a single level. This is useful to make u_blitter work. 316 */ 317 if (is_npot) { 318 width = u_minify(width, first_level); 319 height = u_minify(height, first_level); 320 max_lod = 1; 321 } 322 323 assert(tex); 324 assert(width); 325 assert(height); 326 assert(depth); 327 328 format = translate_texture_format(pt->format, view); 329 pitch = tex->stride; 330 331 assert(format); 332 assert(pitch); 333 334 /* MS3 state */ 335 state[0] = 336 (((height - 1) << MS3_HEIGHT_SHIFT) 337 | ((width - 1) << MS3_WIDTH_SHIFT) 338 | format 339 | ms3_tiling_bits(tex->tiling)); 340 341 /* 342 * XXX When min_filter != mag_filter and there's just one mipmap level, 343 * set max_lod = 1 to make sure i915 chooses between min/mag filtering. 344 */ 345 346 /* See note at the top of file */ 347 if (max_lod > (sampler->maxlod >> 2)) 348 max_lod = sampler->maxlod >> 2; 349 350 /* MS4 state */ 351 state[1] = 352 ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) 353 | MS4_CUBE_FACE_ENA_MASK 354 | ((max_lod) << MS4_MAX_LOD_SHIFT) 355 | ((depth - 1) << MS4_VOLUME_DEPTH_SHIFT)); 356 357 if (is_npot) 358 state[2] = i915_texture_offset(tex, first_level, 0); 359 else 360 state[2] = 0; 361 } 362 363 static void update_maps(struct i915_context *i915) 364 { 365 uint unit; 366 367 for (unit = 0; unit < i915->num_fragment_sampler_views && unit < i915->num_samplers; 368 unit++) { 369 /* determine unit enable/disable by looking for a bound texture */ 370 /* could also examine the fragment program? */ 371 if (i915->fragment_sampler_views[unit]) { 372 struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture); 373 374 update_map(i915, 375 unit, 376 texture, /* texture */ 377 i915->fragment_sampler[unit], /* sampler state */ 378 i915->fragment_sampler_views[unit], /* sampler view */ 379 i915->current.texbuffer[unit]); 380 } 381 } 382 383 i915->hardware_dirty |= I915_HW_MAP; 384 } 385 386 struct i915_tracked_state i915_hw_sampler_views = { 387 "sampler_views", 388 update_maps, 389 I915_NEW_SAMPLER_VIEW 390 }; 391
