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      1 /*
      2  * Copyright 2011 Christoph Bumiller
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice shall be included in
     12  * all copies or substantial portions of the Software.
     13  *
     14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20  * OTHER DEALINGS IN THE SOFTWARE.
     21  */
     22 
     23 #include "codegen/nv50_ir_target_nv50.h"
     24 
     25 namespace nv50_ir {
     26 
     27 Target *getTargetNV50(unsigned int chipset)
     28 {
     29    return new TargetNV50(chipset);
     30 }
     31 
     32 TargetNV50::TargetNV50(unsigned int card) : Target(true, true, false)
     33 {
     34    chipset = card;
     35 
     36    wposMask = 0;
     37    for (unsigned int i = 0; i <= SV_LAST; ++i)
     38       sysvalLocation[i] = ~0;
     39 
     40    initOpInfo();
     41 }
     42 
     43 #if 0
     44 // BULTINS / LIBRARY FUNCTIONS:
     45 
     46 // TODO
     47 static const uint32_t nvc0_builtin_code[] =
     48 {
     49 };
     50 
     51 static const uint16_t nvc0_builtin_offsets[NV50_BUILTIN_COUNT] =
     52 {
     53 };
     54 #endif
     55 
     56 void
     57 TargetNV50::getBuiltinCode(const uint32_t **code, uint32_t *size) const
     58 {
     59    *code = NULL;
     60    *size = 0;
     61 }
     62 
     63 uint32_t
     64 TargetNV50::getBuiltinOffset(int builtin) const
     65 {
     66    return 0;
     67 }
     68 
     69 struct opProperties
     70 {
     71    operation op;
     72    unsigned int mNeg    : 4;
     73    unsigned int mAbs    : 4;
     74    unsigned int mNot    : 4;
     75    unsigned int mSat    : 4;
     76    unsigned int fConst  : 3;
     77    unsigned int fShared : 3;
     78    unsigned int fAttrib : 3;
     79    unsigned int fImm    : 3;
     80 };
     81 
     82 static const struct opProperties _initProps[] =
     83 {
     84    //           neg  abs  not  sat  c[]  s[], a[], imm
     85    { OP_ADD,    0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
     86    { OP_SUB,    0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
     87    { OP_MUL,    0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
     88    { OP_MAX,    0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
     89    { OP_MIN,    0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
     90    { OP_MAD,    0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
     91    { OP_ABS,    0x0, 0x0, 0x0, 0x0, 0x0, 0x1, 0x1, 0x0 },
     92    { OP_NEG,    0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x1, 0x0 },
     93    { OP_CVT,    0x1, 0x1, 0x0, 0x8, 0x0, 0x1, 0x1, 0x0 },
     94    { OP_AND,    0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x2 },
     95    { OP_OR,     0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x2 },
     96    { OP_XOR,    0x0, 0x0, 0x3, 0x0, 0x0, 0x0, 0x0, 0x2 },
     97    { OP_SHL,    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2 },
     98    { OP_SHR,    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x2 },
     99    { OP_SET,    0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
    100    { OP_PREEX2, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
    101    { OP_PRESIN, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
    102    { OP_EX2,    0x0, 0x0, 0x0, 0x8, 0x0, 0x0, 0x0, 0x0 },
    103    { OP_LG2,    0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
    104    { OP_RCP,    0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
    105    { OP_RSQ,    0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
    106    { OP_DFDX,   0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
    107    { OP_DFDY,   0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 },
    108 };
    109 
    110 void TargetNV50::initOpInfo()
    111 {
    112    unsigned int i, j;
    113 
    114    static const uint32_t commutative[(OP_LAST + 31) / 32] =
    115    {
    116       // ADD, MUL, MAD, FMA, AND, OR, XOR, MAX, MIN, SET_AND, SET_OR, SET_XOR,
    117       // SET, SELP, SLCT
    118       0x0ce0ca00, 0x0000007e, 0x00000000, 0x00000000
    119    };
    120    static const uint32_t shortForm[(OP_LAST + 31) / 32] =
    121    {
    122       // MOV, ADD, SUB, MUL, MAD, SAD, RCP, L/PINTERP, TEX, TXF
    123       0x00014e40, 0x00000080, 0x00001260, 0x00000000
    124    };
    125    static const operation noDestList[] =
    126    {
    127       OP_STORE, OP_WRSV, OP_EXPORT, OP_BRA, OP_CALL, OP_RET, OP_EXIT,
    128       OP_DISCARD, OP_CONT, OP_BREAK, OP_PRECONT, OP_PREBREAK, OP_PRERET,
    129       OP_JOIN, OP_JOINAT, OP_BRKPT, OP_MEMBAR, OP_EMIT, OP_RESTART,
    130       OP_QUADON, OP_QUADPOP, OP_TEXBAR, OP_SUSTB, OP_SUSTP, OP_SUREDP,
    131       OP_SUREDB, OP_BAR
    132    };
    133    static const operation noPredList[] =
    134    {
    135       OP_CALL, OP_PREBREAK, OP_PRERET, OP_QUADON, OP_QUADPOP, OP_JOINAT,
    136       OP_EMIT, OP_RESTART
    137    };
    138 
    139    for (i = 0; i < DATA_FILE_COUNT; ++i)
    140       nativeFileMap[i] = (DataFile)i;
    141    nativeFileMap[FILE_PREDICATE] = FILE_FLAGS;
    142 
    143    for (i = 0; i < OP_LAST; ++i) {
    144       opInfo[i].variants = NULL;
    145       opInfo[i].op = (operation)i;
    146       opInfo[i].srcTypes = 1 << (int)TYPE_F32;
    147       opInfo[i].dstTypes = 1 << (int)TYPE_F32;
    148       opInfo[i].immdBits = 0xffffffff;
    149       opInfo[i].srcNr = operationSrcNr[i];
    150 
    151       for (j = 0; j < opInfo[i].srcNr; ++j) {
    152          opInfo[i].srcMods[j] = 0;
    153          opInfo[i].srcFiles[j] = 1 << (int)FILE_GPR;
    154       }
    155       opInfo[i].dstMods = 0;
    156       opInfo[i].dstFiles = 1 << (int)FILE_GPR;
    157 
    158       opInfo[i].hasDest = 1;
    159       opInfo[i].vector = (i >= OP_TEX && i <= OP_TEXCSAA);
    160       opInfo[i].commutative = (commutative[i / 32] >> (i % 32)) & 1;
    161       opInfo[i].pseudo = (i < OP_MOV);
    162       opInfo[i].predicate = !opInfo[i].pseudo;
    163       opInfo[i].flow = (i >= OP_BRA && i <= OP_JOIN);
    164       opInfo[i].minEncSize = (shortForm[i / 32] & (1 << (i % 32))) ? 4 : 8;
    165    }
    166    for (i = 0; i < sizeof(noDestList) / sizeof(noDestList[0]); ++i)
    167       opInfo[noDestList[i]].hasDest = 0;
    168    for (i = 0; i < sizeof(noPredList) / sizeof(noPredList[0]); ++i)
    169       opInfo[noPredList[i]].predicate = 0;
    170 
    171    for (i = 0; i < sizeof(_initProps) / sizeof(_initProps[0]); ++i) {
    172       const struct opProperties *prop = &_initProps[i];
    173 
    174       for (int s = 0; s < 3; ++s) {
    175          if (prop->mNeg & (1 << s))
    176             opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_NEG;
    177          if (prop->mAbs & (1 << s))
    178             opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_ABS;
    179          if (prop->mNot & (1 << s))
    180             opInfo[prop->op].srcMods[s] |= NV50_IR_MOD_NOT;
    181          if (prop->fConst & (1 << s))
    182             opInfo[prop->op].srcFiles[s] |= 1 << (int)FILE_MEMORY_CONST;
    183          if (prop->fShared & (1 << s))
    184             opInfo[prop->op].srcFiles[s] |= 1 << (int)FILE_MEMORY_SHARED;
    185          if (prop->fAttrib & (1 << s))
    186             opInfo[prop->op].srcFiles[s] |= 1 << (int)FILE_SHADER_INPUT;
    187          if (prop->fImm & (1 << s))
    188             opInfo[prop->op].srcFiles[s] |= 1 << (int)FILE_IMMEDIATE;
    189       }
    190       if (prop->mSat & 8)
    191          opInfo[prop->op].dstMods = NV50_IR_MOD_SAT;
    192    }
    193 
    194    if (chipset >= 0xa0)
    195       opInfo[OP_MUL].dstMods = NV50_IR_MOD_SAT;
    196 }
    197 
    198 unsigned int
    199 TargetNV50::getFileSize(DataFile file) const
    200 {
    201    switch (file) {
    202    case FILE_NULL:          return 0;
    203    case FILE_GPR:           return 256; // in 16-bit units **
    204    case FILE_PREDICATE:     return 0;
    205    case FILE_FLAGS:         return 4;
    206    case FILE_ADDRESS:       return 4;
    207    case FILE_IMMEDIATE:     return 0;
    208    case FILE_MEMORY_CONST:  return 65536;
    209    case FILE_SHADER_INPUT:  return 0x200;
    210    case FILE_SHADER_OUTPUT: return 0x200;
    211    case FILE_MEMORY_BUFFER: return 0xffffffff;
    212    case FILE_MEMORY_GLOBAL: return 0xffffffff;
    213    case FILE_MEMORY_SHARED: return 16 << 10;
    214    case FILE_MEMORY_LOCAL:  return 48 << 10;
    215    case FILE_SYSTEM_VALUE:  return 16;
    216    default:
    217       assert(!"invalid file");
    218       return 0;
    219    }
    220    // ** only first 128 units encodable for 16-bit regs
    221 }
    222 
    223 unsigned int
    224 TargetNV50::getFileUnit(DataFile file) const
    225 {
    226    if (file == FILE_GPR || file == FILE_ADDRESS)
    227       return 1;
    228    if (file == FILE_SYSTEM_VALUE)
    229       return 2;
    230    return 0;
    231 }
    232 
    233 uint32_t
    234 TargetNV50::getSVAddress(DataFile shaderFile, const Symbol *sym) const
    235 {
    236    switch (sym->reg.data.sv.sv) {
    237    case SV_FACE:
    238       return 0x3fc;
    239    case SV_POSITION:
    240    {
    241       uint32_t addr = sysvalLocation[sym->reg.data.sv.sv];
    242       for (int c = 0; c < sym->reg.data.sv.index; ++c)
    243          if (wposMask & (1 << c))
    244             addr += 4;
    245       return addr;
    246    }
    247    case SV_PRIMITIVE_ID:
    248       return shaderFile == FILE_SHADER_INPUT ? 0x18 :
    249          sysvalLocation[sym->reg.data.sv.sv];
    250    case SV_NCTAID:
    251       return 0x8 + 2 * sym->reg.data.sv.index;
    252    case SV_CTAID:
    253       return 0xc + 2 * sym->reg.data.sv.index;
    254    case SV_NTID:
    255       return 0x2 + 2 * sym->reg.data.sv.index;
    256    case SV_TID:
    257       return 0;
    258    case SV_SAMPLE_POS:
    259       return 0; /* sample position is handled differently */
    260    default:
    261       return sysvalLocation[sym->reg.data.sv.sv];
    262    }
    263 }
    264 
    265 // long:  rrr, arr, rcr, acr, rrc, arc, gcr, grr
    266 // short: rr, ar, rc, gr
    267 // immd:  ri, gi
    268 bool
    269 TargetNV50::insnCanLoad(const Instruction *i, int s,
    270                         const Instruction *ld) const
    271 {
    272    DataFile sf = ld->src(0).getFile();
    273 
    274    // immediate 0 can be represented by GPR $r63/$r127
    275    if (sf == FILE_IMMEDIATE && ld->getSrc(0)->reg.data.u64 == 0)
    276       return (!i->isPseudo() &&
    277               !i->asTex() &&
    278               i->op != OP_EXPORT && i->op != OP_STORE);
    279 
    280    if (sf == FILE_IMMEDIATE && (i->predSrc >= 0 || i->flagsDef >= 0))
    281       return false;
    282    if (s >= opInfo[i->op].srcNr)
    283       return false;
    284    if (!(opInfo[i->op].srcFiles[s] & (1 << (int)sf)))
    285       return false;
    286    if (s == 2 && i->src(1).getFile() != FILE_GPR)
    287       return false;
    288 
    289    // NOTE: don't rely on flagsDef
    290    if (sf == FILE_IMMEDIATE)
    291       for (int d = 0; i->defExists(d); ++d)
    292          if (i->def(d).getFile() == FILE_FLAGS)
    293             return false;
    294 
    295    unsigned mode = 0;
    296 
    297    for (int z = 0; z < Target::operationSrcNr[i->op]; ++z) {
    298       DataFile zf = (z == s) ? sf : i->src(z).getFile();
    299       switch (zf) {
    300       case FILE_GPR:
    301          break;
    302       case FILE_MEMORY_SHARED:
    303       case FILE_SHADER_INPUT:
    304          mode |= 1 << (z * 2);
    305          break;
    306       case FILE_MEMORY_CONST:
    307          mode |= 2 << (z * 2);
    308          break;
    309       case FILE_IMMEDIATE:
    310          mode |= 3 << (z * 2);
    311       default:
    312          break;
    313       }
    314    }
    315 
    316    switch (mode) {
    317    case 0x00:
    318    case 0x01:
    319    case 0x03:
    320    case 0x08:
    321    case 0x0c:
    322    case 0x20:
    323    case 0x21:
    324       break;
    325    case 0x09:
    326       // Shader inputs get transformed to p[] in geometry shaders, and those
    327       // aren't allowed to be used at the same time as c[].
    328       if (ld->bb->getProgram()->getType() == Program::TYPE_GEOMETRY)
    329          return false;
    330       break;
    331    case 0x0d:
    332       if (ld->bb->getProgram()->getType() != Program::TYPE_GEOMETRY)
    333          return false;
    334       break;
    335    default:
    336       return false;
    337    }
    338 
    339    uint8_t ldSize;
    340 
    341    if ((i->op == OP_MUL || i->op == OP_MAD) && !isFloatType(i->dType)) {
    342       // 32-bit MUL will be split into 16-bit MULs
    343       if (ld->src(0).isIndirect(0))
    344          return false;
    345       if (sf == FILE_IMMEDIATE)
    346          return false;
    347       if (i->subOp == NV50_IR_SUBOP_MUL_HIGH && sf == FILE_MEMORY_CONST)
    348          return false;
    349       ldSize = 2;
    350    } else {
    351       ldSize = typeSizeof(ld->dType);
    352    }
    353 
    354    if (sf == FILE_IMMEDIATE)
    355       return ldSize <= 4;
    356 
    357 
    358    // Check if memory access is encodable:
    359 
    360    if (ldSize < 4 && sf == FILE_SHADER_INPUT) // no < 4-byte aligned a[] access
    361       return false;
    362    if (ld->getSrc(0)->reg.data.offset > (int32_t)(127 * ldSize))
    363       return false;
    364 
    365    if (ld->src(0).isIndirect(0)) {
    366       for (int z = 0; i->srcExists(z); ++z)
    367          if (i->src(z).isIndirect(0))
    368             return false;
    369 
    370       // s[] access only possible in CP, $aX always applies
    371       if (sf == FILE_MEMORY_SHARED)
    372          return true;
    373       if (!ld->bb) // can't check type ...
    374          return false;
    375       Program::Type pt = ld->bb->getProgram()->getType();
    376 
    377       // $aX applies to c[] only in VP, FP, GP if p[] is not accessed
    378       if (pt == Program::TYPE_COMPUTE)
    379          return false;
    380       if (pt == Program::TYPE_GEOMETRY) {
    381          if (sf == FILE_MEMORY_CONST)
    382             return i->src(s).getFile() != FILE_SHADER_INPUT;
    383          return sf == FILE_SHADER_INPUT;
    384       }
    385       return sf == FILE_MEMORY_CONST;
    386    }
    387    return true;
    388 }
    389 
    390 bool
    391 TargetNV50::insnCanLoadOffset(const Instruction *i, int s, int offset) const
    392 {
    393    if (!i->src(s).isIndirect(0))
    394       return true;
    395    offset += i->src(s).get()->reg.data.offset;
    396    if (i->op == OP_LOAD || i->op == OP_STORE) {
    397       // There are some restrictions in theory, but in practice they're never
    398       // going to be hit. When we enable shared/global memory, this will
    399       // become more important.
    400       return true;
    401    }
    402    return offset >= 0 && offset <= (int32_t)(127 * i->src(s).get()->reg.size);
    403 }
    404 
    405 bool
    406 TargetNV50::isAccessSupported(DataFile file, DataType ty) const
    407 {
    408    if (ty == TYPE_B96 || ty == TYPE_NONE)
    409       return false;
    410    if (typeSizeof(ty) > 4)
    411       return (file == FILE_MEMORY_LOCAL) || (file == FILE_MEMORY_GLOBAL) ||
    412              (file == FILE_MEMORY_BUFFER);
    413    return true;
    414 }
    415 
    416 bool
    417 TargetNV50::isOpSupported(operation op, DataType ty) const
    418 {
    419    if (ty == TYPE_F64 && chipset < 0xa0)
    420       return false;
    421 
    422    switch (op) {
    423    case OP_PRERET:
    424       return chipset >= 0xa0;
    425    case OP_TXG:
    426       return chipset >= 0xa3 && chipset != 0xaa && chipset != 0xac;
    427    case OP_POW:
    428    case OP_SQRT:
    429    case OP_DIV:
    430    case OP_MOD:
    431    case OP_SET_AND:
    432    case OP_SET_OR:
    433    case OP_SET_XOR:
    434    case OP_SLCT:
    435    case OP_SELP:
    436    case OP_POPCNT:
    437    case OP_INSBF:
    438    case OP_EXTBF:
    439    case OP_EXIT: // want exit modifier instead (on NOP if required)
    440    case OP_MEMBAR:
    441    case OP_SHLADD:
    442       return false;
    443    case OP_SAD:
    444       return ty == TYPE_S32;
    445    case OP_SET:
    446       return !isFloatType(ty);
    447    default:
    448       return true;
    449    }
    450 }
    451 
    452 bool
    453 TargetNV50::isModSupported(const Instruction *insn, int s, Modifier mod) const
    454 {
    455    if (!isFloatType(insn->dType)) {
    456       switch (insn->op) {
    457       case OP_ABS:
    458       case OP_NEG:
    459       case OP_CVT:
    460       case OP_CEIL:
    461       case OP_FLOOR:
    462       case OP_TRUNC:
    463       case OP_AND:
    464       case OP_OR:
    465       case OP_XOR:
    466          break;
    467       case OP_ADD:
    468          if (insn->src(s ? 0 : 1).mod.neg())
    469             return false;
    470          break;
    471       case OP_SUB:
    472          if (s == 0)
    473             return insn->src(1).mod.neg() ? false : true;
    474          break;
    475       case OP_SET:
    476          if (insn->sType != TYPE_F32)
    477             return false;
    478          break;
    479       default:
    480          return false;
    481       }
    482    }
    483    if (s >= opInfo[insn->op].srcNr || s >= 3)
    484       return false;
    485    return (mod & Modifier(opInfo[insn->op].srcMods[s])) == mod;
    486 }
    487 
    488 bool
    489 TargetNV50::mayPredicate(const Instruction *insn, const Value *pred) const
    490 {
    491    if (insn->getPredicate() || insn->flagsSrc >= 0)
    492       return false;
    493    for (int s = 0; insn->srcExists(s); ++s)
    494       if (insn->src(s).getFile() == FILE_IMMEDIATE)
    495          return false;
    496    return opInfo[insn->op].predicate;
    497 }
    498 
    499 bool
    500 TargetNV50::isSatSupported(const Instruction *insn) const
    501 {
    502    if (insn->op == OP_CVT)
    503       return true;
    504    if (insn->dType != TYPE_F32)
    505       return false;
    506    return opInfo[insn->op].dstMods & NV50_IR_MOD_SAT;
    507 }
    508 
    509 int TargetNV50::getLatency(const Instruction *i) const
    510 {
    511    // TODO: tune these values
    512    if (i->op == OP_LOAD) {
    513       switch (i->src(0).getFile()) {
    514       case FILE_MEMORY_LOCAL:
    515       case FILE_MEMORY_GLOBAL:
    516       case FILE_MEMORY_BUFFER:
    517          return 100; // really 400 to 800
    518       default:
    519          return 22;
    520       }
    521    }
    522    return 22;
    523 }
    524 
    525 // These are "inverse" throughput values, i.e. the number of cycles required
    526 // to issue a specific instruction for a full warp (32 threads).
    527 //
    528 // Assuming we have more than 1 warp in flight, a higher issue latency results
    529 // in a lower result latency since the MP will have spent more time with other
    530 // warps.
    531 // This also helps to determine the number of cycles between instructions in
    532 // a single warp.
    533 //
    534 int TargetNV50::getThroughput(const Instruction *i) const
    535 {
    536    // TODO: tune these values
    537    if (i->dType == TYPE_F32) {
    538       switch (i->op) {
    539       case OP_RCP:
    540       case OP_RSQ:
    541       case OP_LG2:
    542       case OP_SIN:
    543       case OP_COS:
    544       case OP_PRESIN:
    545       case OP_PREEX2:
    546          return 16;
    547       default:
    548          return 4;
    549       }
    550    } else
    551    if (i->dType == TYPE_U32 || i->dType == TYPE_S32) {
    552       return 4;
    553    } else
    554    if (i->dType == TYPE_F64) {
    555       return 32;
    556    } else {
    557       return 1;
    558    }
    559 }
    560 
    561 static void
    562 recordLocation(uint16_t *locs, uint8_t *masks,
    563                const struct nv50_ir_varying *var)
    564 {
    565    uint16_t addr = var->slot[0] * 4;
    566 
    567    switch (var->sn) {
    568    case TGSI_SEMANTIC_POSITION: locs[SV_POSITION] = addr; break;
    569    case TGSI_SEMANTIC_INSTANCEID: locs[SV_INSTANCE_ID] = addr; break;
    570    case TGSI_SEMANTIC_VERTEXID: locs[SV_VERTEX_ID] = addr; break;
    571    case TGSI_SEMANTIC_PRIMID: locs[SV_PRIMITIVE_ID] = addr; break;
    572    case TGSI_SEMANTIC_LAYER: locs[SV_LAYER] = addr; break;
    573    case TGSI_SEMANTIC_VIEWPORT_INDEX: locs[SV_VIEWPORT_INDEX] = addr; break;
    574    default:
    575       break;
    576    }
    577    if (var->sn == TGSI_SEMANTIC_POSITION && masks)
    578       masks[0] = var->mask;
    579 }
    580 
    581 void
    582 TargetNV50::parseDriverInfo(const struct nv50_ir_prog_info *info)
    583 {
    584    unsigned int i;
    585    for (i = 0; i < info->numOutputs; ++i)
    586       recordLocation(sysvalLocation, NULL, &info->out[i]);
    587    for (i = 0; i < info->numInputs; ++i)
    588       recordLocation(sysvalLocation, &wposMask, &info->in[i]);
    589    for (i = 0; i < info->numSysVals; ++i)
    590       recordLocation(sysvalLocation, NULL, &info->sv[i]);
    591 
    592    if (sysvalLocation[SV_POSITION] >= 0x200) {
    593       // not assigned by driver, but we need it internally
    594       wposMask = 0x8;
    595       sysvalLocation[SV_POSITION] = 0;
    596    }
    597 
    598    Target::parseDriverInfo(info);
    599 }
    600 
    601 } // namespace nv50_ir
    602