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      1 /*
      2  * Copyright  2015 Intel Corporation
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     21  * IN THE SOFTWARE.
     22  */
     23 
     24 #include "brw_context.h"
     25 #include "brw_state.h"
     26 #include "brw_defines.h"
     27 #include "intel_batchbuffer.h"
     28 #include "program/prog_parameter.h"
     29 
     30 void
     31 gen7_upload_constant_state(struct brw_context *brw,
     32                            const struct brw_stage_state *stage_state,
     33                            bool active, unsigned opcode)
     34 {
     35    uint32_t mocs = brw->gen < 8 ? GEN7_MOCS_L3 : 0;
     36 
     37    /* Disable if the shader stage is inactive or there are no push constants. */
     38    active = active && stage_state->push_const_size != 0;
     39 
     40    int dwords = brw->gen >= 8 ? 11 : 7;
     41    BEGIN_BATCH(dwords);
     42    OUT_BATCH(opcode << 16 | (dwords - 2));
     43 
     44    /* Workaround for SKL+ (we use option #2 until we have a need for more
     45     * constant buffers). This comes from the documentation for 3DSTATE_CONSTANT_*
     46     *
     47     * The driver must ensure The following case does not occur without a flush
     48     * to the 3D engine: 3DSTATE_CONSTANT_* with buffer 3 read length equal to
     49     * zero committed followed by a 3DSTATE_CONSTANT_* with buffer 0 read length
     50     * not equal to zero committed. Possible ways to avoid this condition
     51     * include:
     52     *     1. always force buffer 3 to have a non zero read length
     53     *     2. always force buffer 0 to a zero read length
     54     */
     55    if (brw->gen >= 9 && active) {
     56       OUT_BATCH(0);
     57       OUT_BATCH(stage_state->push_const_size);
     58    } else {
     59       OUT_BATCH(active ? stage_state->push_const_size : 0);
     60       OUT_BATCH(0);
     61    }
     62    /* Pointer to the constant buffer.  Covered by the set of state flags
     63     * from gen6_prepare_wm_contants
     64     */
     65    if (brw->gen >= 9 && active) {
     66       OUT_BATCH(0);
     67       OUT_BATCH(0);
     68       OUT_BATCH(0);
     69       OUT_BATCH(0);
     70       /* XXX: When using buffers other than 0, you need to specify the
     71        * graphics virtual address regardless of INSPM/debug bits
     72        */
     73       OUT_RELOC64(brw->batch.bo, I915_GEM_DOMAIN_RENDER, 0,
     74                   stage_state->push_const_offset);
     75       OUT_BATCH(0);
     76       OUT_BATCH(0);
     77    } else if (brw->gen >= 8) {
     78       OUT_BATCH(active ? (stage_state->push_const_offset | mocs) : 0);
     79       OUT_BATCH(0);
     80       OUT_BATCH(0);
     81       OUT_BATCH(0);
     82       OUT_BATCH(0);
     83       OUT_BATCH(0);
     84       OUT_BATCH(0);
     85       OUT_BATCH(0);
     86    } else {
     87       OUT_BATCH(active ? (stage_state->push_const_offset | mocs) : 0);
     88       OUT_BATCH(0);
     89       OUT_BATCH(0);
     90       OUT_BATCH(0);
     91    }
     92 
     93    ADVANCE_BATCH();
     94 
     95    /* On SKL+ the new constants don't take effect until the next corresponding
     96     * 3DSTATE_BINDING_TABLE_POINTER_* command is parsed so we need to ensure
     97     * that is sent
     98     */
     99    if (brw->gen >= 9)
    100       brw->ctx.NewDriverState |= BRW_NEW_SURFACES;
    101 }
    102 
    103 /**
    104  * Creates a streamed BO containing the push constants for the VS or GS on
    105  * gen6+.
    106  *
    107  * Push constants are constant values (such as GLSL uniforms) that are
    108  * pre-loaded into a shader stage's register space at thread spawn time.
    109  *
    110  * Not all GLSL uniforms will be uploaded as push constants: The hardware has
    111  * a limitation of 32 or 64 EU registers (256 or 512 floats) per stage to be
    112  * uploaded as push constants, while GL 4.4 requires at least 1024 components
    113  * to be usable for the VS.  Plus, currently we always use pull constants
    114  * instead of push constants when doing variable-index array access.
    115  *
    116  * See brw_curbe.c for the equivalent gen4/5 code.
    117  */
    118 void
    119 gen6_upload_push_constants(struct brw_context *brw,
    120                            const struct gl_program *prog,
    121                            const struct brw_stage_prog_data *prog_data,
    122                            struct brw_stage_state *stage_state,
    123                            enum aub_state_struct_type type)
    124 {
    125    struct gl_context *ctx = &brw->ctx;
    126 
    127    if (prog_data->nr_params == 0) {
    128       stage_state->push_const_size = 0;
    129    } else {
    130       /* Updates the ParamaterValues[i] pointers for all parameters of the
    131        * basic type of PROGRAM_STATE_VAR.
    132        */
    133       /* XXX: Should this happen somewhere before to get our state flag set? */
    134       if (prog)
    135          _mesa_load_state_parameters(ctx, prog->Parameters);
    136 
    137       gl_constant_value *param;
    138       int i;
    139 
    140       param = brw_state_batch(brw, type,
    141                               prog_data->nr_params * sizeof(gl_constant_value),
    142                               32, &stage_state->push_const_offset);
    143 
    144       STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
    145 
    146       /* _NEW_PROGRAM_CONSTANTS
    147        *
    148        * Also _NEW_TRANSFORM -- we may reference clip planes other than as a
    149        * side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS
    150        * wouldn't be set for them.
    151        */
    152       for (i = 0; i < prog_data->nr_params; i++) {
    153          param[i] = *prog_data->param[i];
    154       }
    155 
    156       if (0) {
    157          fprintf(stderr, "%s constants:\n",
    158                  _mesa_shader_stage_to_string(stage_state->stage));
    159          for (i = 0; i < prog_data->nr_params; i++) {
    160             if ((i & 7) == 0)
    161                fprintf(stderr, "g%d: ",
    162                        prog_data->dispatch_grf_start_reg + i / 8);
    163             fprintf(stderr, "%8f ", param[i].f);
    164             if ((i & 7) == 7)
    165                fprintf(stderr, "\n");
    166          }
    167          if ((i & 7) != 0)
    168             fprintf(stderr, "\n");
    169          fprintf(stderr, "\n");
    170       }
    171 
    172       stage_state->push_const_size = ALIGN(prog_data->nr_params, 8) / 8;
    173       /* We can only push 32 registers of constants at a time. */
    174 
    175       /* From the SNB PRM (vol2, part 1, section 3.2.1.4: 3DSTATE_CONSTANT_VS:
    176        *
    177        *     "The sum of all four read length fields (each incremented to
    178        *      represent the actual read length) must be less than or equal to
    179        *      32"
    180        *
    181        * From the IVB PRM (vol2, part 1, section 3.2.1.3: 3DSTATE_CONSTANT_VS:
    182        *
    183        *     "The sum of all four read length fields must be less than or
    184        *      equal to the size of 64"
    185        *
    186        * The other shader stages all match the VS's limits.
    187        */
    188       assert(stage_state->push_const_size <= 32);
    189    }
    190 }
    191