1 //===- IntrinsicsPTX.td - Defines PTX intrinsics -----------*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines all of the PTX-specific intrinsics. 11 // 12 //===----------------------------------------------------------------------===// 13 14 let TargetPrefix = "ptx" in { 15 multiclass PTXReadSpecialRegisterIntrinsic_v4i32<string prefix> { 16 // FIXME: Do we need the 128-bit integer type version? 17 // def _r64 : Intrinsic<[llvm_i128_ty], [], [IntrNoMem]>; 18 19 // FIXME: Enable this once v4i32 support is enabled in back-end. 20 // def _v4i16 : Intrinsic<[llvm_v4i32_ty], [], [IntrNoMem]>; 21 22 def _x : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, 23 GCCBuiltin<!strconcat(prefix, "_x")>; 24 def _y : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, 25 GCCBuiltin<!strconcat(prefix, "_y")>; 26 def _z : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, 27 GCCBuiltin<!strconcat(prefix, "_z")>; 28 def _w : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, 29 GCCBuiltin<!strconcat(prefix, "_w")>; 30 } 31 32 class PTXReadSpecialRegisterIntrinsic_r32<string name> 33 : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, 34 GCCBuiltin<name>; 35 36 class PTXReadSpecialRegisterIntrinsic_r64<string name> 37 : Intrinsic<[llvm_i64_ty], [], [IntrNoMem]>, 38 GCCBuiltin<name>; 39 } 40 41 defm int_ptx_read_tid : PTXReadSpecialRegisterIntrinsic_v4i32 42 <"__builtin_ptx_read_tid">; 43 defm int_ptx_read_ntid : PTXReadSpecialRegisterIntrinsic_v4i32 44 <"__builtin_ptx_read_ntid">; 45 46 def int_ptx_read_laneid : PTXReadSpecialRegisterIntrinsic_r32 47 <"__builtin_ptx_read_laneid">; 48 def int_ptx_read_warpid : PTXReadSpecialRegisterIntrinsic_r32 49 <"__builtin_ptx_read_warpid">; 50 def int_ptx_read_nwarpid : PTXReadSpecialRegisterIntrinsic_r32 51 <"__builtin_ptx_read_nwarpid">; 52 53 defm int_ptx_read_ctaid : PTXReadSpecialRegisterIntrinsic_v4i32 54 <"__builtin_ptx_read_ctaid">; 55 defm int_ptx_read_nctaid : PTXReadSpecialRegisterIntrinsic_v4i32 56 <"__builtin_ptx_read_nctaid">; 57 58 def int_ptx_read_smid : PTXReadSpecialRegisterIntrinsic_r32 59 <"__builtin_ptx_read_smid">; 60 def int_ptx_read_nsmid : PTXReadSpecialRegisterIntrinsic_r32 61 <"__builtin_ptx_read_nsmid">; 62 def int_ptx_read_gridid : PTXReadSpecialRegisterIntrinsic_r32 63 <"__builtin_ptx_read_gridid">; 64 65 def int_ptx_read_lanemask_eq : PTXReadSpecialRegisterIntrinsic_r32 66 <"__builtin_ptx_read_lanemask_eq">; 67 def int_ptx_read_lanemask_le : PTXReadSpecialRegisterIntrinsic_r32 68 <"__builtin_ptx_read_lanemask_le">; 69 def int_ptx_read_lanemask_lt : PTXReadSpecialRegisterIntrinsic_r32 70 <"__builtin_ptx_read_lanemask_lt">; 71 def int_ptx_read_lanemask_ge : PTXReadSpecialRegisterIntrinsic_r32 72 <"__builtin_ptx_read_lanemask_ge">; 73 def int_ptx_read_lanemask_gt : PTXReadSpecialRegisterIntrinsic_r32 74 <"__builtin_ptx_read_lanemask_gt">; 75 76 def int_ptx_read_clock : PTXReadSpecialRegisterIntrinsic_r32 77 <"__builtin_ptx_read_clock">; 78 def int_ptx_read_clock64 : PTXReadSpecialRegisterIntrinsic_r64 79 <"__builtin_ptx_read_clock64">; 80 81 def int_ptx_read_pm0 : PTXReadSpecialRegisterIntrinsic_r32 82 <"__builtin_ptx_read_pm0">; 83 def int_ptx_read_pm1 : PTXReadSpecialRegisterIntrinsic_r32 84 <"__builtin_ptx_read_pm1">; 85 def int_ptx_read_pm2 : PTXReadSpecialRegisterIntrinsic_r32 86 <"__builtin_ptx_read_pm2">; 87 def int_ptx_read_pm3 : PTXReadSpecialRegisterIntrinsic_r32 88 <"__builtin_ptx_read_pm3">; 89 90 let TargetPrefix = "ptx" in 91 def int_ptx_bar_sync : Intrinsic<[], [llvm_i32_ty], []>, 92 GCCBuiltin<"__builtin_ptx_bar_sync">; 93
