1 //===- PTX.td - Describe the PTX Target Machine ---------------*- tblgen -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // This is the top level entry point for the PTX target. 10 //===----------------------------------------------------------------------===// 11 12 //===----------------------------------------------------------------------===// 13 // Target-independent interfaces 14 //===----------------------------------------------------------------------===// 15 16 include "llvm/Target/Target.td" 17 18 //===----------------------------------------------------------------------===// 19 // Subtarget Features 20 //===----------------------------------------------------------------------===// 21 22 //===- Architectural Features ---------------------------------------------===// 23 24 def FeatureDouble : SubtargetFeature<"double", "SupportsDouble", "true", 25 "Do not demote .f64 to .f32">; 26 27 def FeatureNoFMA : SubtargetFeature<"no-fma","SupportsFMA", "false", 28 "Disable Fused-Multiply Add">; 29 30 //===- PTX Version --------------------------------------------------------===// 31 32 def FeaturePTX20 : SubtargetFeature<"ptx20", "PTXVersion", "PTX_VERSION_2_0", 33 "Use PTX Language Version 2.0">; 34 35 def FeaturePTX21 : SubtargetFeature<"ptx21", "PTXVersion", "PTX_VERSION_2_1", 36 "Use PTX Language Version 2.1">; 37 38 def FeaturePTX22 : SubtargetFeature<"ptx22", "PTXVersion", "PTX_VERSION_2_2", 39 "Use PTX Language Version 2.2">; 40 41 def FeaturePTX23 : SubtargetFeature<"ptx23", "PTXVersion", "PTX_VERSION_2_3", 42 "Use PTX Language Version 2.3">; 43 44 //===- PTX Target ---------------------------------------------------------===// 45 46 def FeatureSM10 : SubtargetFeature<"sm10", "PTXTarget", "PTX_SM_1_0", 47 "Use Shader Model 1.0">; 48 def FeatureSM11 : SubtargetFeature<"sm11", "PTXTarget", "PTX_SM_1_1", 49 "Use Shader Model 1.1">; 50 def FeatureSM12 : SubtargetFeature<"sm12", "PTXTarget", "PTX_SM_1_2", 51 "Use Shader Model 1.2">; 52 def FeatureSM13 : SubtargetFeature<"sm13", "PTXTarget", "PTX_SM_1_3", 53 "Use Shader Model 1.3">; 54 def FeatureSM20 : SubtargetFeature<"sm20", "PTXTarget", "PTX_SM_2_0", 55 "Use Shader Model 2.0", [FeatureDouble]>; 56 def FeatureSM21 : SubtargetFeature<"sm21", "PTXTarget", "PTX_SM_2_1", 57 "Use Shader Model 2.1", [FeatureDouble]>; 58 def FeatureSM22 : SubtargetFeature<"sm22", "PTXTarget", "PTX_SM_2_2", 59 "Use Shader Model 2.2", [FeatureDouble]>; 60 def FeatureSM23 : SubtargetFeature<"sm23", "PTXTarget", "PTX_SM_2_3", 61 "Use Shader Model 2.3", [FeatureDouble]>; 62 63 def FeatureCOMPUTE10 : SubtargetFeature<"compute10", "PTXTarget", 64 "PTX_COMPUTE_1_0", 65 "Use Compute Compatibility 1.0">; 66 def FeatureCOMPUTE11 : SubtargetFeature<"compute11", "PTXTarget", 67 "PTX_COMPUTE_1_1", 68 "Use Compute Compatibility 1.1">; 69 def FeatureCOMPUTE12 : SubtargetFeature<"compute12", "PTXTarget", 70 "PTX_COMPUTE_1_2", 71 "Use Compute Compatibility 1.2">; 72 def FeatureCOMPUTE13 : SubtargetFeature<"compute13", "PTXTarget", 73 "PTX_COMPUTE_1_3", 74 "Use Compute Compatibility 1.3">; 75 def FeatureCOMPUTE20 : SubtargetFeature<"compute20", "PTXTarget", 76 "PTX_COMPUTE_2_0", 77 "Use Compute Compatibility 2.0", 78 [FeatureDouble]>; 79 80 //===----------------------------------------------------------------------===// 81 // PTX supported processors 82 //===----------------------------------------------------------------------===// 83 84 class Proc<string Name, list<SubtargetFeature> Features> 85 : Processor<Name, NoItineraries, Features>; 86 87 def : Proc<"generic", []>; 88 89 // Processor definitions for compute/shader models 90 def : Proc<"compute_10", [FeatureCOMPUTE10]>; 91 def : Proc<"compute_11", [FeatureCOMPUTE11]>; 92 def : Proc<"compute_12", [FeatureCOMPUTE12]>; 93 def : Proc<"compute_13", [FeatureCOMPUTE13]>; 94 def : Proc<"compute_20", [FeatureCOMPUTE20]>; 95 def : Proc<"sm_10", [FeatureSM10]>; 96 def : Proc<"sm_11", [FeatureSM11]>; 97 def : Proc<"sm_12", [FeatureSM12]>; 98 def : Proc<"sm_13", [FeatureSM13]>; 99 def : Proc<"sm_20", [FeatureSM20]>; 100 def : Proc<"sm_21", [FeatureSM21]>; 101 def : Proc<"sm_22", [FeatureSM22]>; 102 def : Proc<"sm_23", [FeatureSM23]>; 103 104 // Processor definitions for common GPU architectures 105 def : Proc<"g80", [FeatureSM10]>; 106 def : Proc<"gt200", [FeatureSM13]>; 107 def : Proc<"gf100", [FeatureSM20, FeatureDouble]>; 108 def : Proc<"fermi", [FeatureSM20, FeatureDouble]>; 109 110 //===----------------------------------------------------------------------===// 111 // Register File Description 112 //===----------------------------------------------------------------------===// 113 114 include "PTXRegisterInfo.td" 115 116 //===----------------------------------------------------------------------===// 117 // Instruction Descriptions 118 //===----------------------------------------------------------------------===// 119 120 include "PTXInstrInfo.td" 121 122 def PTXInstrInfo : InstrInfo; 123 124 //===----------------------------------------------------------------------===// 125 // Assembly printer 126 //===----------------------------------------------------------------------===// 127 // PTX uses the MC printer for asm output, so make sure the TableGen 128 // AsmWriter bits get associated with the correct class. 129 def PTXAsmWriter : AsmWriter { 130 string AsmWriterClassName = "InstPrinter"; 131 bit isMCAsmWriter = 1; 132 } 133 134 //===----------------------------------------------------------------------===// 135 // Target Declaration 136 //===----------------------------------------------------------------------===// 137 138 def PTX : Target { 139 let InstructionSet = PTXInstrInfo; 140 let AssemblyWriters = [PTXAsmWriter]; 141 } 142
